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path: root/drivers/gpu/drm/msm
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2023-07-11drm/msm/dpu: drop empty features mask MERGE_3D_SM8150_MASKDmitry Baryshkov
The MERGE_3D_SM8150_MASK features mask is zero. Drop it completely. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545384/ Link: https://lore.kernel.org/r/20230704022136.130522-19-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline INTF_BLK and INTF_BLK_DSI_TE macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545378/ Link: https://lore.kernel.org/r/20230704022136.130522-18-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline WB_BLK macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545380/ Link: https://lore.kernel.org/r/20230704022136.130522-17-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline various PP_BLK_* macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545371/ Link: https://lore.kernel.org/r/20230704022136.130522-16-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline MERGE_3D_BLK macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545382/ Link: https://lore.kernel.org/r/20230704022136.130522-15-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545370/ Link: https://lore.kernel.org/r/20230704022136.130522-14-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline LM_BLK macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545362/ Link: https://lore.kernel.org/r/20230704022136.130522-13-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline DSPP_BLK macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545359/ Link: https://lore.kernel.org/r/20230704022136.130522-12-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: inline SSPP_BLK macrosDmitry Baryshkov
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545377/ Link: https://lore.kernel.org/r/20230704022136.130522-11-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: correct indentation for CTL definitionsDmitry Baryshkov
Shift dpu_ctl_cfg contents to correct the indentation of CTL blocks. This is done in preparation to expanding the rest of hardware block defines, so that all blocks have similar indentation. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545374/ Link: https://lore.kernel.org/r/20230704022136.130522-10-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: drop zero features from dpu_ctl_cfg dataDmitry Baryshkov
Drop useless zero assignments to the dpu_ctl_cfg::features field. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545366/ Link: https://lore.kernel.org/r/20230704022136.130522-9-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: drop zero features from dpu_mdp_cfg dataDmitry Baryshkov
Drop useless zero assignments to the dpu_mdp_cfg::features field. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545369/ Link: https://lore.kernel.org/r/20230704022136.130522-8-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: expand .clk_ctrls definitionsDmitry Baryshkov
Use more standard initialisation for .clk_ctrls definitions. Define a single .clk_ctrls field and use array init inside. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545368/ Link: https://lore.kernel.org/r/20230704022136.130522-7-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: drop enum dpu_mdp and MDP_TOP valueDmitry Baryshkov
Since there is always just a single MDP_TOP instance, drop the enum dpu_mdp and corresponding index value. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545357/ Link: https://lore.kernel.org/r/20230704022136.130522-6-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: drop dpu_mdss_cfg::mdp_count fieldDmitry Baryshkov
There is always a single MDP TOP block. Drop the mdp_count field and stop declaring dpu_mdp_cfg instances as arrays. Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545355/ Link: https://lore.kernel.org/r/20230704022136.130522-5-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: simplify peer LM handlingDmitry Baryshkov
For each LM there is at max 1 peer LM. Thus there is no need to have a mask for the peer LM enumeration. Change that to have an ID of the peer LM. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545352/ Link: https://lore.kernel.org/r/20230704022136.130522-4-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu: always use MSM_DP/DSI_CONTROLLER_nDmitry Baryshkov
In several catalog entries we did not use existing MSM_DP_CONTROLLER_n constants. Fill them in. Also use freshly defined MSM_DSI_CONTROLLER_n for DSI interfaces. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545353/ Link: https://lore.kernel.org/r/20230704022136.130522-3-dmitry.baryshkov@linaro.org
2023-07-11drm/msm: enumerate DSI interfacesDmitry Baryshkov
Follow the DP example and define MSM_DSI_CONTROLLER_n enumeration. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545351/ Link: https://lore.kernel.org/r/20230704022136.130522-2-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dsi: Hook up refgen regulatorKonrad Dybcio
Consume the refgen supply on configurations that may use it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545333/ Link: https://lore.kernel.org/r/20230628-topic-refgen-v3-4-9fbf0e605d23@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-07-11drm/msm/dpu: remove struct drm_dsc_config from struct msm_display_infoKuogee Hsieh
Since struct drm_dsc_config is stored at atomic_enable() instead of display setup time during boot up, saving struct drm_dsc_config at struct msm_display_info is not necessary. Lets drop the dsc member from struct msm_display_info. Changes in v4: -- fix "Since" at commit text Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/543866/ Link: https://lore.kernel.org/r/1687454686-10340-3-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-07-11drm/msm/dpu: retrieve DSI DSC struct through priv->dsi[0]Kuogee Hsieh
Currently struct drm_dsc_config for DSI is populated at display setup during system boot up. This mechanism works fine with embedded display but not for pluggable displays as the struct drm_dsc_config will become stale once external display is unplugged. In preparation of adding support for DP DSC support move storing of DSI DSC struct to atomic_enable() so that same mechanism will work for both embedded display and pluggable displays. Changes in v4: -- fix checkpatch.pl warning Changes in v5: -- delete dpu_encoder_get_dsc_config() from atomic_mode_set Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/543867/ Link: https://lore.kernel.org/r/1687454686-10340-2-git-send-email-quic_khsieh@quicinc.com [DB: fixed commit message] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-07-11drm/client: Send hotplug event after registering a clientThomas Zimmermann
Generate a hotplug event after registering a client to allow the client to configure its display. Remove the hotplug calls from the existing clients for fbdev emulation. This change fixes a concurrency bug between registering a client and receiving events from the DRM core. The bug is present in the fbdev emulation of all drivers. The fbdev emulation currently generates a hotplug event before registering the client to the device. For each new output, the DRM core sends an additional hotplug event to each registered client. If the DRM core detects first output between sending the artificial hotplug and registering the device, the output's hotplug event gets lost. If this is the first output, the fbdev console display remains dark. This has been observed with amdgpu and fbdev-generic. Fix this by adding hotplug generation directly to the client's register helper drm_client_register(). Registering the client and receiving events are serialized by struct drm_device.clientlist_mutex. So an output is either configured by the initial hotplug event, or the client has already been registered. The bug was originally added in commit 6e3f17ee73f7 ("drm/fb-helper: generic: Call drm_client_add() after setup is done"), in which adding a client and receiving a hotplug event switched order. It was hidden, as most hardware and drivers have at least on static output configured. Other drivers didn't use the internal DRM client or still had struct drm_mode_config_funcs.output_poll_changed set. That callback handled hotplug events as well. After not setting the callback in amdgpu in commit 0e3172bac3f4 ("drm/amdgpu: Don't set struct drm_driver.output_poll_changed"), amdgpu did not show a framebuffer console if output events got lost. The bug got copy-pasted from fbdev-generic into the other fbdev emulation. Reported-by: Moritz Duge <MoritzDuge@kolahilft.de> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2649 Fixes: 6e3f17ee73f7 ("drm/fb-helper: generic: Call drm_client_add() after setup is done") Fixes: 8ab59da26bc0 ("drm/fb-helper: Move generic fbdev emulation into separate source file") Fixes: b79fe9abd58b ("drm/fbdev-dma: Implement fbdev emulation for GEM DMA helpers") Fixes: 63c381552f69 ("drm/armada: Implement fbdev emulation as in-kernel client") Fixes: 49953b70e7d3 ("drm/exynos: Implement fbdev emulation as in-kernel client") Fixes: 8f1aaccb04b7 ("drm/gma500: Implement client-based fbdev emulation") Fixes: 940b869c2f2f ("drm/msm: Implement fbdev emulation as in-kernel client") Fixes: 9e69bcd88e45 ("drm/omapdrm: Implement fbdev emulation as in-kernel client") Fixes: e317a69fe891 ("drm/radeon: Implement client-based fbdev emulation") Fixes: 71ec16f45ef8 ("drm/tegra: Implement fbdev emulation as in-kernel client") Fixes: 0e3172bac3f4 ("drm/amdgpu: Don't set struct drm_driver.output_poll_changed") Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: Moritz Duge <MoritzDuge@kolahilft.de> Tested-by: Torsten Krah <krah.tm@gmail.com> Tested-by: Paul Schyska <pschyska@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: David Airlie <airlied@gmail.com> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Javier Martinez Canillas <javierm@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Inki Dae <inki.dae@samsung.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v5.2+ Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # msm Link: https://patchwork.freedesktop.org/patch/msgid/20230710091029.27503-1-tzimmermann@suse.de
2023-07-11drm/msm: stop storing the array of CRTCs in struct msm_drm_privateDmitry Baryshkov
The array of CRTC in the struct msm_drm_private duplicates a list of CRTCs in the drm_device. Drop it and use the existing list for CRTC enumeration. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/538068/ Link: https://lore.kernel.org/r/20230519150734.3879916-1-dmitry.baryshkov@linaro.org
2023-07-11drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blkKonrad Dybcio
SDM845 was the first SoC to include both PCC v4 and GC v1.8. We don't currently support any other blocks but the common config for these two can be reused for a large amount of SoCs. Rename it to indicate the origin of that combo. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/533003/ Link: https://lore.kernel.org/r/20230420-topic-dpu_gc-v1-1-d9d1a5e40917@linaro.org [DB: also applied to new catalog files] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-26drm: Clear fd/handle callbacks in struct drm_driverThomas Zimmermann
Clear all assignments of struct drm_driver's fd/handle callbacks to drm_gem_prime_fd_to_handle() and drm_gem_prime_handle_to_fd(). These functions are called by default. Add a TODO item to convert vmwgfx to the defaults as well. v2: * remove TODO item (Zack) * also update amdgpu's amdgpu_partition_driver Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Simon Ser <contact@emersion.fr> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Jeffrey Hugo <quic_jhugo@quicinc.com> # qaic Link: https://patchwork.freedesktop.org/patch/msgid/20230620080252.16368-3-tzimmermann@suse.de
2023-06-19Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Backmerging into drm-misc-next to get commit 2c1c7ba457d4 ("drm/amdgpu: support partition drm devices"), which is required to fix commit 0adec22702d4 ("drm: Remove struct drm_driver.gem_prime_mmap"). Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2023-06-19drm: Remove struct drm_driver.gem_prime_mmapThomas Zimmermann
All drivers initialize this field with drm_gem_prime_mmap(). Call the function directly and remove the field. Simplifies the code and resolves a long-standing TODO item. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230613150441.17720-3-tzimmermann@suse.de
2023-06-19drm/msm: Initialize mmap offset after constructing the buffer objectThomas Zimmermann
Only the msm driver provides its own implementation of gem_prime_mmap from struct drm_driver. All other drivers use the drm_gem_prime_mmap() helper. Initialize the mmap offset when constructing the buffer object in msm and reduce the gem_prime_mmap code to the generic helper. Prepares msm for the removal of struct drm_driver.gem_prime_mmap. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230613150441.17720-2-tzimmermann@suse.de
2023-06-18drm/msm/a6xx: Add A610 speedbin supportKonrad Dybcio
A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125 (trinket) and SM6225 (khaje). Trinket does not support speed binning (only a single SKU exists) and we don't yet support khaje upstream. Hence, add a fuse mapping table for bengal to allow for per-chip frequency limiting. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542780/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Add A619_holi speedbin supportKonrad Dybcio
A619_holi is implemented on at least two SoCs: SM4350 (holi) and SM6375 (blair). This is what seems to be a first occurrence of this happening, but it's easy to overcome by guarding the SoC-specific fuse values with of_machine_is_compatible(). Do just that to enable frequency limiting on these SoCs. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542772/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Use adreno_is_aXYZ macros in speedbin matchingKonrad Dybcio
Before transitioning to using per-SoC and not per-Adreno speedbin fuse values (need another patchset to land elsewhere), a good improvement/stopgap solution is to use adreno_is_aXYZ macros in place of explicit revision matching. Do so to allow differentiating between A619 and A619_holi. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542777/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Use "else if" in GPU speedbin rev matchingKonrad Dybcio
The GPU can only be one at a time. Turn a series of ifs into if + elseifs to save some CPU cycles. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542770/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Fix some A619 tunablesKonrad Dybcio
Adreno 619 expects some tunables to be set differently. Make up for it. Fixes: b7616b5c69e6 ("drm/msm/adreno: Add A619 support") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542782/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Add A610 supportKonrad Dybcio
A610 is one of (if not the) lowest-tier SKUs in the A6XX family. It features no GMU, as it's implemented solely on SoCs with SMD_RPM. What's more interesting is that it does not feature a VDDGX line either, being powered solely by VDDCX and has an unfortunate hardware quirk that makes its reset line broken - after a couple of assert/ deassert cycles, it will hang for good and will not wake up again. This GPU requires mesa changes for proper rendering, and lots of them at that. The command streams are quite far away from any other A6XX GPU and hence it needs special care. This patch was validated both by running an (incomplete) downstream mesa with some hacks (frames rendered correctly, though some instructions made the GPU hangcheck which is expected - garbage in, garbage out) and by replaying RD traces captured with the downstream KGSL driver - no crashes there, ever. Add support for this GPU on the kernel side, which comes down to pretty simply adding A612 HWCG tables, altering a few values and adding a special case for handling the reset line. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542779/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Add support for A619_holiKonrad Dybcio
A619_holi is a GMU-less variant of the already-supported A619 GPU. It's present on at least SM4350 (holi) and SM6375 (blair). No mesa changes are required. Add the required kernel-side support for it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542775/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/adreno: Disable has_cached_coherent in GMU wrapper configurationsKonrad Dybcio
A610 and A619_holi don't support the feature. Disable it to make the GPU stop crashing after almost each and every submission - the received data on the GPU end was simply incomplete in garbled, resulting in almost nothing being executed properly. Extend the disablement to adreno_has_gmu_wrapper, as none of the GMU wrapper Adrenos that don't support yet seem to feature it. Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542774/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Introduce GMU wrapper supportKonrad Dybcio
Some (particularly SMD_RPM, a.k.a non-RPMh) SoCs implement A6XX GPUs but don't implement the associated GMUs. This is due to the fact that the GMU directly pokes at RPMh. Sadly, this means we have to take care of enabling & scaling power rails, clocks and bandwidth ourselves. Reuse existing Adreno-common code and modify the deeply-GMU-infused A6XX code to facilitate these GPUs. This involves if-ing out lots of GMU callbacks and introducing a new type of GMU - GMU wrapper (it's the actual name that Qualcomm uses in their downstream kernels). This is essentially a register region which is convenient to model as a device. We'll use it for managing the GDSCs. The register layout matches the actual GMU_CX/GX regions on the "real GMU" devices and lets us reuse quite a bit of gmu_read/write/rmw calls. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542766/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Move CX GMU power counter enablement to hw_initKonrad Dybcio
Since the introduction of A6xx support, we've been enabling the CX GMU power counter 0 in a bit of a weird spot. Move it to hw_init so that GMU wrapper GPUs can reuse the same code paths. As a bonus, this order makes it easier to compare mainline and downstream register access traces. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542765/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Extend and explain UBWC configKonrad Dybcio
Rename lower_bit to hbb_lo and explain what it signifies. Add explanations (wherever possible to other tunables). Port setting min_access_length, ubwc_mode and hbb_hi from downstream. Reviewed-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542764/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw initKonrad Dybcio
Currently we're only deasserting REG_A6XX_RBBM_GBIF_HALT, but we also need REG_A6XX_GBIF_HALT to be set to 0. This is typically done automatically on successful GX collapse, but in case that fails, we should take care of it. Also, add a memory barrier to ensure it's gone through before jumping to further initialization. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542760/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Add a helper for software-resetting the GPUKonrad Dybcio
Introduce a6xx_gpu_sw_reset() in preparation for adding GMU wrapper GPUs and reuse it in a6xx_gmu_force_off(). This helper, contrary to the original usage in GMU code paths, adds a readback+delay sequence to ensure that the reset is never deasserted too quickly due to e.g. OoO execution going crazy. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542758/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Improve a6xx_bus_clear_pending_transactions()Konrad Dybcio
Unify the indentation and explain the cryptic 0xF value. Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542756/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Move a6xx_bus_clear_pending_transactions to a6xx_gpuKonrad Dybcio
This function is responsible for telling the GPU to halt transactions on all of its relevant buses, drain them and leave them in a predictable state, so that the GPU can be e.g. reset cleanly. Move the function to a6xx_gpu.c, remove the static keyword and add a prototype in a6xx_gpu.h to accomodate for the move. Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542762/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Move force keepalive vote removal to a6xx_gmu_force_off()Konrad Dybcio
As pointed out by Akhil during the review process of GMU wrapper introduction [1], it makes sense to move this write into the function that's responsible for forcibly shutting the GMU off. It is also very convenient to move this to GMU-specific code, so that it does not have to be guarded by an if-condition to avoid calling it on GMU wrapper targets. Move the write to the aforementioned a6xx_gmu_force_off() to achieve that. No effective functional change. [1] https://lore.kernel.org/linux-arm-msm/20230501194022.GA18382@akhilpo-linux.qualcomm.com/ Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542752/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/a6xx: Remove static keyword from sptprac en/disable functionsKonrad Dybcio
These two will be reused by at least A619_holi in the non-gmu paths. Turn them non-static them to make it possible. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542751/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-18drm/msm/adreno: Use adreno_is_revn for A690Konrad Dybcio
The adreno_is_revn rework came at the same time as A690 introduction and that resulted in it not covering all cases. Fix it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542754/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-16drm/msm/dsi: split dsi_ctrl_config() functionDmitry Baryshkov
It makes no sense to pass NULL parameters to dsi_ctrl_config() in the disable case. Split dsi_ctrl_config() into enable and disable parts and drop unused params. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/542559/ Link: https://lore.kernel.org/r/20230614224402.296825-2-dmitry.baryshkov@linaro.org
2023-06-16drm/msm/dsi: dsi_host: drop unused clocksDmitry Baryshkov
Several source clocks are not used anymore, so stop handling them. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/542558/ Link: https://lore.kernel.org/r/20230614224402.296825-1-dmitry.baryshkov@linaro.org
2023-06-16drm/msm/dpu: remove unused INTF_NONE interfacesDmitry Baryshkov
sm6115, sm6375 and qcm2290 do not have INTF_0. Drop corresponding interface definitions. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/542180/ Link: https://lore.kernel.org/r/20230613001004.3426676-4-dmitry.baryshkov@linaro.org
2023-06-16drm/msm/dpu: correct MERGE_3D lengthDmitry Baryshkov
Each MERGE_3D block has just two registers. Correct the block length accordingly. Fixes: 4369c93cf36b ("drm/msm/dpu: initial support for merge3D hardware block") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/542177/ Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230613001004.3426676-3-dmitry.baryshkov@linaro.org
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-05 15:18:07 +0000