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path: root/drivers/gpu/drm/msm/hdmi/hdmi_phy.c
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2016-03-03drm/msm: rename hdmi symbolsArnd Bergmann
Global symbols in the kernel should be prefixed by the name of the subsystem and/or driver to avoid conflicts when all code is built-in. In this case, function names like 'hdmi_register' or 'hdmi_set_mode' are way too generic for an MSM specific DRM driver, so I'm renaming them all to msm_hdmi_* here. I also rename a lot of the 'static' symbols along with the global names for consistency, even though those are relatively harmless; they might only be slightly confusing when they show up in backtraces. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: HDMI 8996 PHY/PLL supportArchit Taneja
Add support for the HDMI PHY/PLL found in MSM8996/APQ8096. Unlike the previous PHYs supported in the driver, this doesn't need the powerup/powerdown ops. The PLL prepare/unprepare clock ops enable/disable the phy itself. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Manage HDMI PLL through PHY driverArchit Taneja
Add a helper to initialize PLL in the PHY driver. HDMI PLLs are going to have their own mmio base different from that of PHY. For the clock code in hdmi_phy_8960.c, some changes were needed for it to work with the updated register offsets. Create a copy of the updated clock code in hdmi_pll_8960.c, instead of rewriting it in hdmi_phy_8960.c itself. This removes the need to place CONFIG_COMMON_CLOCK checks all around, makes the code more legible, and also removes some old checkpatch warnings with the original code. The older hdmi pll clock ops in hdmi_phy_8960.c will be removed later. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Create a separate HDMI PHY driverArchit Taneja
Create a PHY device that represents the TX PHY and PLL parts of the HDMI block. This makes management of PHY specific resources (regulators and clocks) much easier, and makes the PHY and PLL usable independently. It also simplifies the core HDMI driver, which currently assigns phy ops among many other things. The PHY driver implementation done here is very similar to the PHY driver we already have for DSI. Keep the old hdmi_phy_funcs ops for now. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). The driver doesn't use the common PHY framework for now. This is because it's hard to map our ops with the ops provided by the framework. The bindings used for this is the generic phy bindings. So, this can be adapted to the PHY framework in the future, if possible. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>