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path: root/drivers/gpu/drm/i915/gt/intel_lrc.c
AgeCommit message (Expand)Author
2020-05-28drm/i915/gt: Start timeslice on partial submissionChris Wilson
2020-05-28drm/i915/gt: Prevent timeslicing into unpreemptable requestsChris Wilson
2020-05-26drm/i915/execlists: Shortcircuit queue_prio() for no internal levelsChris Wilson
2020-05-19drm/i915/gt: Incorporate the virtual engine into timeslicingChris Wilson
2020-05-19drm/i915/gt: Kick virtual siblings on timeslice outChris Wilson
2020-05-18drm/i915/gt: Reuse the tasklet priority for virtual as their siblingsChris Wilson
2020-05-14drm/i915/gt: Transfer old virtual breadcrumbs to irq_workerChris Wilson
2020-05-14drm/i915: Drop no-semaphore boostingChris Wilson
2020-05-13drm/i915: Mark the addition of the initial-breadcrumb in the requestChris Wilson
2020-05-13drm/i915/gt: Reset execlists registers before HWSPChris Wilson
2020-05-11drm/i915/gt: Restore Cherryview back to full-ppgttChris Wilson
2020-05-11drm/i915/gt: Mark up the racy read of execlists->context_tagChris Wilson
2020-05-09drm/i915: Replace zero-length array with flexible-arrayGustavo A. R. Silva
2020-05-08drm/i915/gt: Improve precision on defer_request assertChris Wilson
2020-05-07drm/i915/gen12: Add aux table invalidate for all enginesMika Kuoppala
2020-05-07drm/i915: Remove wait priority boostingChris Wilson
2020-05-07drm/i915: Mark concurrent submissions with a weak-dependencyChris Wilson
2020-05-07drm/i915/gen12: Invalidate aux table entries forciblyMika Kuoppala
2020-05-07drm/i915/gen12: Flush L3Mika Kuoppala
2020-05-07drm/i915/gen12: Fix HDC pipeline flushMika Kuoppala
2020-05-07Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"Mika Kuoppala
2020-05-05drm/i915/gt: Stop holding onto the pinned_default_stateChris Wilson
2020-05-05drm/i915/execlists: Record the active CCID from before resetChris Wilson
2020-05-05drm/i915/gt: Small tidy of gen8+ breadcrumb emissionChris Wilson
2020-05-01drm/i915/gt: Make timeslicing an explicit engine propertyChris Wilson
2020-04-30drm/i915/gt: Always enable busy-stats for execlistsChris Wilson
2020-04-29drm/i915/gt: Keep a no-frills swappable copy of the default context stateChris Wilson
2020-04-28drm/i915/execlists: Verify we don't submit two identical CCIDsChris Wilson
2020-04-28drm/i915/execlists: Track inflight CCIDChris Wilson
2020-04-28drm/i915/execlists: Avoid reusing the same logical CCIDChris Wilson
2020-04-27drm/i915/gt: Sanitize GT firstChris Wilson
2020-04-27drm/i915/execlists: Check preempt-timeout target before submit_portsChris Wilson
2020-04-25drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTLMika Kuoppala
2020-04-25drm/i915: Add per ctx batchbuffer wa for timestampMika Kuoppala
2020-04-25drm/i915: Add engine scratch register to live_lrc_fixedMika Kuoppala
2020-04-24drm/i915: Make define for lrc state offsetMika Kuoppala
2020-04-24drm/i915/selftests: Add context batchbuffers registers to live_lrc_fixedMika Kuoppala
2020-04-23drm/i915/gt: Carefully order virtual_submission_taskletChris Wilson
2020-04-22drm/i915/execlists: Drop request-before-CS assertionChris Wilson
2020-04-21drm/i915/gt: Poison residual state [HWSP] across resume.Chris Wilson
2020-04-17drm/i915/gt: Scrub execlists state on resumeChris Wilson
2020-04-08drm/i915/gt: prefer struct drm_device based loggingJani Nikula
2020-04-07drm/i915/gt: Yield the timeslice if caught waiting on a user semaphoreChris Wilson
2020-04-03drm/i915/gt: Free request pool from virtual enginesChris Wilson
2020-04-02drm/i915/execlists: Peek at the next submission for error interruptsChris Wilson
2020-03-31drm/i915/execlists: Pause CS flow before resetChris Wilson
2020-03-31drm/i915/gt: Include a few tracek for timeslicingChris Wilson
2020-03-31drm/i915/execlists: Double check breadcrumb before crying foulChris Wilson
2020-03-30drm/i915/execlists: Explicitly reset both reg and context runtimeChris Wilson
2020-03-30drm/i915/execlists: Include priority info in trace_portsChris Wilson
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