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path: root/drivers/gpu/drm/i915/display
AgeCommit message (Expand)Author
2020-09-28drm/i915: Replace some gamma_mode ifs with switchesVille Syrjälä
2020-09-28drm/i915: Polish bdw_read_lut_10() a bitVille Syrjälä
2020-09-28drm/i915: Shuffle chv_cgm_gamma_pack() around a bitVille Syrjälä
2020-09-28drm/i915: Reset glk degamma index after programming/readoutVille Syrjälä
2020-09-28drm/i915: s/glk_read_lut_10/bdw_read_lut_10/Ville Syrjälä
2020-09-28drm/i915: Include the LUT sizes in the state dumpVille Syrjälä
2020-09-28drm/i915: Move MST master transcoder dump earlierVille Syrjälä
2020-09-28drm/i915: Fix state checker hw.active/hw.enable readoutVille Syrjälä
2020-09-28drm/i915: Don't hide the intel_crtc_atomic_check() callVille Syrjälä
2020-09-28drm/i915: Enable async flips in i915Karthik B S
2020-09-28Documentation/gpu: Add asynchronous flip documentation for i915Karthik B S
2020-09-28drm/i915: WA for platforms with double buffered address update enable bitKarthik B S
2020-09-28drm/i915: Add dedicated plane hook for async flip caseKarthik B S
2020-09-28drm/i915: Do not call drm_crtc_arm_vblank_event in async flipsKarthik B S
2020-09-28drm/i915: Add checks specific to async flipsKarthik B S
2020-09-28drm/i915: Add support for async flips in I915Karthik B S
2020-09-28drm/i915: Add enable/disable flip done and flip done handlerKarthik B S
2020-09-24drm/i915: Use the correct bpp when validating "4:2:0 only" modesVille Syrjälä
2020-09-24drm/i915: Decouple intel_dp_{min,output}_bpp() from crtc_stateVille Syrjälä
2020-09-24drm/i915: Extract intel_dp_output_format()Ville Syrjälä
2020-09-24drm/i915: dont retry stream management at seq_num_m roll overRamalingam C
2020-09-24drm/i915: terminate reauth at stream management failureRamalingam C
2020-09-23Merge tag 'drm-misc-next-2020-09-21' of git://anongit.freedesktop.org/drm/drm...Dave Airlie
2020-09-17drm/i915: Nuke force_min_cdclk_changedVille Syrjälä
2020-09-17drm/i915: Remove the old global state stuffVille Syrjälä
2020-09-17drm/i915: Do YCbCr 444->420 conversion via DP protocol convertersVille Syrjälä
2020-09-17drm/i915: DP->HDMI TMDS clock limits vs. deep colorVille Syrjälä
2020-09-17drm/i915: Extract intel_hdmi_has_audio()Ville Syrjälä
2020-09-17drm/i915: Handle downstream facing ports w/o EDIDVille Syrjälä
2020-09-17drm/i915: Configure DP 1.3+ protocol converted HDMI modeVille Syrjälä
2020-09-17drm/i915: Deal with TMDS DFP clock limitsVille Syrjälä
2020-09-17drm/i915: Reworkd DP DFP clock handlingVille Syrjälä
2020-09-17drm/dp: Redo drm_dp_downstream_max_clock() as drm_dp_downstream_max_dotclock()Ville Syrjälä
2020-09-17drm/dp: Pimp drm_dp_downstream_max_bpc()Ville Syrjälä
2020-09-17drm/i915: Reworkd DFP max bpc handlingVille Syrjälä
2020-09-17drm/i915/lspcon: Do not send infoframes to non-HDMI sinksVille Syrjälä
2020-09-15drm/i915/pll: Centralize PLL_ENABLE register lookupAnusha Srivatsa
2020-09-15drm: add constant N value in helper fileChandan Uddaraju
2020-09-15drm/i915: Nuke pointless variableVille Syrjälä
2020-09-15drm/i915: Introduce HPD_PORT_TC<n>Ville Syrjälä
2020-09-15drm/i915: Move hpd_pin setup to encoder initVille Syrjälä
2020-09-15drm/i915: Add VBT AUX CH H and IVille Syrjälä
2020-09-15drm/i915: Add VBT DVO ports H and IVille Syrjälä
2020-09-15drm/i915: Add AUX_CH_{H,I} power domain handlingVille Syrjälä
2020-09-15drm/i915: Add PORT_{H,I} to intel_port_to_power_domain()Ville Syrjälä
2020-09-15drm/i915: Add more AUX CHs to the enumVille Syrjälä
2020-09-15drm/i915: Reduce INTEL_DISPLAY_ENABLED to just treat outputs as disconnectedVille Syrjälä
2020-09-15drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputsVille Syrjälä
2020-09-14drm/i915: Drop the drm_atomic_helper_calc_timestamping_constants() callVille Syrjälä
2020-09-14drm/atomic-helper: Remove the timestamping constant update from drm_atomic_he...Ville Syrjälä
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