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path: root/drivers/gpu/drm/i915/display/intel_psr.c
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2024-10-30drm/i915/display: use x100 version for full version and releaseJani Nikula
Use x100, or ver * 100 + rel, versions for full IP version checks, similar to what xe driver does: - Replace IP_VER(14, 1) inline with 1401, etc. - Convert DISPLAY_VER_FULL() to DISPLAY_VERx100() - Convert IS_DISPLAY_VER_FULL() to IS_DISPLAY_VERx100() - Convert IS_DISPLAY_VER_STEP() to IS_DISPLAY_VERx100_STEP() This makes ver.rel versions easier to use, follows the xe driver pattern, and drops the dependency on the IP_VER() macro. v2: Rebase, drop IP_VER() from xe compat headers v3: Rebase Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241029155536.753413-1-jani.nikula@intel.com
2024-10-29drm/i915/psr: Change psr size limits checkSuraj Kandpal
Change the check to only check for psr size limits till Pre-Xe2 since after that the psr size is equal to maximum pipe size anyways. --v2 -Check only size limit until pre-Xe2 [Matt] --v3 -Make sure psr_max_{h,v} and max_bpp are equal to crtc_{h,v}_display and pipe_bpp [Ankit] Bspec: 69885, 68858 Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241028130012.199090-1-suraj.kandpal@intel.com
2024-10-23drm/i915/psr: vbt.psr.enable is only for eDP panelsJouni Högander
We don't want to check vbt.psr.enable on DP Panel Replay as it is targeted for eDP panel usage only. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241021073349.1222331-1-jouni.hogander@intel.com
2024-10-08drm/i915/psr: Implement Wa 14019834836Jouni Högander
This patch implements HW workaround 14019834836 for display version 30. v2: - move Wa 14019834836 to it's own function - apply only for display version 30 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240926064759.1313335-3-jouni.hogander@intel.com
2024-10-08drm/i915/psr: Add new SU area calculation helper to apply workaroundsJouni Högander
intel_psr2_sel_fetch_update is already quite long function. Now we are about to add one more HW workaround. Let's split applying workarounds to selective update area into a separate function. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240926064759.1313335-2-jouni.hogander@intel.com
2024-10-02drm/i915:Remove unused parameter in marcoHe Lugang
The parameter dev_priv is actually not used in macro PORT_ALPM_CTL and PORT_ALPM_LFPS_CTL,so remove it to simplify the code. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: He Lugang <helugang@uniontech.com> Link: https://patchwork.freedesktop.org/patch/msgid/6C2E07E089F0CB73+20240925064016.733173-1-helugang@uniontech.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-09-30Revert "drm/i915/psr: Implement WA to help reach PC10"Jouni Högander
This reverts commit c2579a217799ba577fa39a2a12643a277334e691. Reverting this commit as it is suspected being culprit on regression. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1649 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930071329.1630583-1-jouni.hogander@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-09-23drm/i915/psr: Implement WA to help reach PC10Suraj Kandpal
To reach PC10 when PKG_C_LATENCY is configure we must do the following things 1) Enter PSR1 only when delayed_vblank < 6 lines and DC5 can be entered 2) Allow PSR2 deep sleep when DC5 can be entered 3) DC5 can be entered when all transocoder have either PSR1, PSR2 or eDP 1.5 PR ALPM enabled and VBI is disabled and flips and pushes are not happening. --v2 -Switch condition and do an early return [Jani] -Do some checks in compute_config [Jani] -Do not use register reads as a method of checking states for DPKGC or delayed vblank [Jani] -Use another way to see is vblank interrupts are disabled or not [Jani] --v3 -Use has_psr to check if psr can be enabled or not for dc5_entry cond [Uma] -Move the dc5 entry computation to psr_compute_config [Jouni] -No need to change sequence of enabled and activate, so dont make hsw_psr1_activate return anything [Jouni] -Use has_psr to stop psr1 activation [Jouni] -Use lineage no. in WA -Add the display ver restrictions for WA --v4 -use more appropriate name for check_vblank_limit() [Jouni] -Cover the case for idle frames when dpkgc is not configured [Jouni] -Check psr only for edp [Jouni] --v5 -move psr1 handling to plane update [Jouni] -add todo for cases when vblank is enabled when psr enabled [Jouni] -use intel_display instead of drm_i915_private --v6 -check target_dc_state [Jouni] -fix condition in pre/post plane update [Jouni] --v7 -fix has_psr condition [Uma] -fix typo in commit subject [Uma] -put psr1_wa check in its own helper [Uma] -fix the dc_entry check [Jouni] -use HAS_PSR() to cover two edp one with psr and one nonpsr [Jouni] WA: 22019444797 Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240920091203.1043308-2-suraj.kandpal@intel.com
2024-09-23drm/i915/psr: Add intel_psr_needs_block_dc_vblank for blocking dc entryJouni Högander
We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't prevent it in case of Panel Replay. Panel Replay switches main link off on DC entry. This means vblank interrupts are not fired and is a problem if user-space is polling for vblank events. For this purpose add new function to query need for dc entry blocking on. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240920062340.1333777-2-jouni.hogander@intel.com
2024-09-18drm/i915/psr: Fix PSR sink enable sequenceVille Syrjälä
According to the eDP spec, the source must first configure all PSR related DPCD registers apart from the actual enable bit, and only then set the enable bit. Split the current single DPCD write to two to match the spec. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240911151836.16800-1-ville.syrjala@linux.intel.com Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
2024-09-18drm/i915/psr: eDP Panel Replay is not supported on pipes other than A and BJouni Högander
Do not allow Panel Replay if pipe is other than A or B. Bspec: 68920 Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2736 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916085706.2160511-1-jouni.hogander@intel.com
2024-09-13drm/i915/dp: Fix AUX IO power enabling for eDP PSRImre Deak
Panel Self Refresh on eDP requires the AUX IO power to be enabled whenever the output (main link) is enabled. This is required by the AUX_PHY_WAKE/ML_PHY_LOCK signaling initiated by the HW automatically to re-enable the main link after it got disabled in power saving states (see eDP v1.4b, sections 5.1, 6.1.3.3.1.1). The Panel Replay mode on non-eDP outputs on the other hand is only supported by keeping the main link active, thus not requiring the above AUX_PHY_WAKE/ML_PHY_LOCK signaling (eDP v1.4b, section 6.1.3.3.1.2). Thus enabling the AUX IO power for this case is not required either. Based on the above enable the AUX IO power only for eDP/PSR outputs. Bspec: 49274, 53370 v2: - Add a TODO comment to adjust the requirement for AUX IO based on whether the ALPM/main-link off mode gets enabled. (Rodrigo) Cc: Animesh Manna <animesh.manna@intel.com> Fixes: b8cf5b5d266e ("drm/i915/panelreplay: Initializaton and compute config for panel replay") Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240910111847.2995725-1-imre.deak@intel.com
2024-09-11drm/i915/psr: Do not wait for PSR being idle on on Panel ReplayJouni Högander
We do not have ALPM on DP Panel Replay. Due to this SRD_STATUS[SRD State] doesn't change from SRDENT_ON after Panel Replay is enabled until it gets disabled. On eDP Panel Replay DEEP_SLEEP is not reached. _psr2_ready_for_pipe_update_locked is waiting DEEP_SLEEP bit getting reset. Take these into account in Panel Replay code by not waiting PSR getting idle after enabling VBI. Fixes: 29fb595d4875 ("drm/i915/psr: Panel replay uses SRD_STATUS to track it's status") Cc: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240906070033.289015-5-jouni.hogander@intel.com
2024-09-11drm/i915/psr: Add connector debugfs files for MST connector as wellJouni Högander
Connector debugfs files are currently not add for MST connector. We can now add them as we have taken into account possibility to have NULL in connector->encoder in intel_attached_dp. v2: remove TODO comment Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240906070033.289015-4-jouni.hogander@intel.com
2024-09-05drm/i915/display: include media/cec-notifier.h and linux/debugfs.h where neededJani Nikula
Use a forward declaration for struct cec_notifier instead of including media/cec-notifier.h in intel_display_types.h, and only include it where needed. Also realize that a lot of places depend on including linux/debugfs.h via intel_display_types.h -> media/cec-notifier.h -> media/cec.h, and include that too where needed. v2: hsw_ips.c also needs debugfs.h (kernel test robot) Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240827104521.4151471-1-jani.nikula@intel.com
2024-09-03drm/i915/psr: convert intel_psr.[ch] to struct intel_displayJani Nikula
Going forward, struct intel_display shall replace struct drm_i915_private as the main display device data pointer type. Convert intel_psr.[ch] to struct intel_display. Some stragglers are left behind where needed. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/4399b98b07019a8063adbec1043ff7eabb7c1080.1725012870.git.jani.nikula@intel.com
2024-08-22drm/i915/display: rename IS_DISPLAY_IP_STEP() to IS_DISPLAY_VER_STEP()Jani Nikula
Unify macro naming on VER. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/6861e02f3adf15d56e89890000eb195070c33c9b.1724180287.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-08-21drm/i915/psr: Prevent Panel Replay if CRC calculation is enabledJouni Högander
Similarly as for PSR2 CRC calculation seems to timeout when Panel Replay is enabled. Fix this by falling back to PSR if CRC calculation is enabled. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2266 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240819092549.1298233-1-jouni.hogander@intel.com
2024-06-25drm/i915/psr: Modify dg2_activate_panel_replay to support eDPJouni Högander
There are couple of bits in PSR2_CTL which needs to be written in case of eDP Panel Replay Bspec: 68920 v2: use boolean instead of assuming eDP Panel Replay mean Early Transport Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-12-jouni.hogander@intel.com
2024-06-25drm/i915/psr: Check Early Transport for Panel Replay as wellJouni Högander
Move Early Transport validity check to be performed for Panel Replay as well and use Early Transport for eDP Panel Replay always. v2:set crtc_state->enable_psr2_su_region_et directly (not in if block) Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-11-jouni.hogander@intel.com
2024-06-25drm/i915/psr: Perform scanline indication check for Panel Replay as wellJouni Högander
Scanline indication needs to be checked and configure for both PSR2 and Panel Replay Selective Update. Move this check to intel_sel_update_config_valid. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-10-jouni.hogander@intel.com
2024-06-25drm/i915/psr: Perform psr2 checks related to ALPM for Panel ReplayJouni Högander
eDP1.5 support ALPM with Panel Replay as well. We need to check ALPM related things for Panel Replay as well. Bspec: 68920 v5: - instead of using crtc_state->has_panel_replay provide aux_less flag v4: - do not move _compute_psr2_sdp_prior_scanline_indication - move ALPM related checks to separate function v3: move vblank check as well v2: do not move Vblank >= PSR2_CTL Block Count Number maximum line count check Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-9-jouni.hogander@intel.com
2024-06-25drm/i915/psr: HW will not allow PR on eDP when HDCP enabledJouni Högander
Take into account in Panel Replay compute config that HW will not allow PR on eDP when HDCP enabled. v2: add debug message to print out why Panel Replay is not possible Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-7-jouni.hogander@intel.com
2024-06-25drm/i915/psr: 128b/132b Panel Replay is not supported on eDPJouni Högander
Take into account that 128b/132b Panel Replay is not supported on eDP. Bspec: 68920 v2: - make crtc_state as const - add debug message to print out why Panel Replay is not possible Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-6-jouni.hogander@intel.com
2024-06-25drm/i915/psr: Check panel Early Transport capability for eDP PRJouni Högander
Our HW doesn't support panel replay without Early Transport on eDP. Bspec: 68920 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-5-jouni.hogander@intel.com
2024-06-25drm/i915/psr: enable sink for eDP1.5 Panel ReplayJouni Högander
eDP1.5 allows Panel Replay on eDP as well. Take this into account when enabling sink PSR/Panel Replay. Write also PANEL_REPLAY_CONFIG2 register accordingly. v3: - set DP_PANEL_REPLAY_CRC_VERIFICATION in PANEL_REPLAY_CONFIG2 - PANEL_REPLAY_CONFIG2 is available in DP2.1 as well v2: do not configure ALPM for DP2.0 Panel Replay Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-4-jouni.hogander@intel.com
2024-06-25drm/i915/psr: Inform Panel Replay source support on eDP as wellJouni Högander
Display version >= 20 support eDP 1.5. Inform Panel Replay source support on eDP for display version >= 20. Bspec: 68920 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-3-jouni.hogander@intel.com
2024-06-25drm/i915/psr: Check panel ALPM capability for eDP Panel ReplayJouni Högander
Our HW doesn't support Panel Replay without AUX_LESS ALPM on eDP. Check panel support for this and prevent eDP panel replay if it doesn't exits. Bspec: 68920 v3: remove excessive parens v2: use intel_alpm_aux_less_wake_supported Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240619062131.4021196-2-jouni.hogander@intel.com
2024-06-24drm/i915/psr: Set DP_PSR_SU_REGION_SCANLINE_CAPTURE bit when neededJouni Högander
Setting DP_PSR_SU_REGION_SCANLINE_CAPTURE (Selective Update Region Scan Line Capture Indication in spec) bit was dropped when psr_enable_sink was split to _psr_enable_sink and _panel_replay_enable_sink. Add setting it back. Fixes: 32f0045f905c ("drm/i915/psr: Split enabling sink for PSR and Panel Replay") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240620103312.903977-1-jouni.hogander@intel.com
2024-06-19Revert "drm/i915/psr: Disable early transport by default"Jouni Högander
This reverts commit f3c2031db7dfdf470a2d9bf3bd1efa6edfa72d8d. We want to notice possible issues faced with PSR2 Region Early Transport as early as possible -> let's revert patch disabling Region Early Transport by default. Also eDP 1.5 Panel Replay requires Early Transport. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-9-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Add new debug bit to disable Panel ReplayJouni Högander
Add new debug bit to be used with i915_edp_psr_debug debugfs interface. This can be used to disable Panel Replay. v2: ensure that fastset is performed when the bit changes Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-8-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR onlyJouni Högander
Enabling/disabling Panel Replay on sink side has to be done before link training. We can't disable it in sink side on PSR disable. Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-7-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Disable PSR2 SU Region ET if enable_psr module parameter is setJouni Högander
Currently PSR2 SU Region Early Transport is enabled by default on Lunarlake if panel supports it despite enable_psr module parameter value. This patch makes it possible for user to limit used PSR mode and prevent SU Region Early Transport by setting enable_psr as 2. With default (-1) PSR2 SU Region Early Transport is allowed. v2: fix/improve commit desciption Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-6-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Disable Panel Replay if PSR mode is set via module parameterJouni Högander
If user is specifically limiting PSR mode to PSR1 or PSR2: disable Panel Replay. With default value -1 all modes are allowed including Panel Replay. Disabling PSR using value 0 disables Panel Replay as well. Also own compute config helper is added for Panel Replay. This makes sense because number of Panel Replay specific checks are increasing. v2: Squash adding Panel Replay compute config helper Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-5-jouni.hogander@intel.com
2024-06-19drm/i915/display: Wa 16021440873 is writing wrong registerJouni Högander
Wa 16021440873 is writing wrong register. Instead of PIPE_SRCSZ_ERLY_TPT write CURPOS_ERLY_TPT. v2: use right offset as well Fixes: 29cdef8539c3 ("drm/i915/display: Implement Wa_16021440873") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-3-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Set SU area width as pipe src widthJouni Högander
Currently SU area width is set as MAX_INT. This is causing problems. Instead set it as pipe src width. Fixes: 86b26b6aeac7 ("drm/i915/psr: Carry su area in crtc_state") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-2-jouni.hogander@intel.com
2024-06-12drm/i915: Rename all bigjoiner to joinerStanislav Lisovskiy
Lets unify both bigjoiner and ultrajoiner under simple "joiner" name, because in future we might have multiple configurations, involving multiple bigjoiners, ultrajoiner, however it is possible to use same api for handling both. v2: - Renamed back some bigjoiner specific parts for now(Ville) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> [vsyrjala: Catch a few more cases] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607075457.15700-1-stanislav.lisovskiy@intel.com
2024-06-11drm/i915/psr: Wake time is aux less wake time for Panel ReplayJouni Högander
When checking vblank length used wake time is aux less wake time for eDP Panel Replay (vblank length is not checked for DP2.0 Panel Replay). Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-14-jouni.hogander@intel.com
2024-06-11drm/i915/psr: Check vblank against IO buffer wake time on LunarlakeJouni Högander
As Lunarlake doesn't have block count configuration vblank should be checked against IO buffer wake time. Bspec: 68920 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-13-jouni.hogander@intel.com
2024-06-11drm/i915/psr: Take into account SU SDP scanline indication in vblank checkJouni Högander
SU SDP scanline indication should be taken into account when checking vblank length. In Bspec we have: PSR2_CTL[ SU SDP scanline indication ] = 0: (TRANS_VBLANK Vertical Blank End- TRANS_VBLANK Vertical Blank Start) > PSR2_CTL Block Count Number value in lines PSR2_CTL[ SU SDP scanline indication ] = 1: (TRANS_VBLANK Vertical Blank End- TRANS_VBLANK Vertical Blank Start- 1) > PSR2_CTL Block Count Number value in lines Bspec: 49274 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-12-jouni.hogander@intel.com
2024-06-11drm/i915/psr: Move vblank length check to separate functionJouni Högander
We are about to add more complexity to vblank length check. It makes sense to move it to separate function for sake of clarity. v2: change name to wake_lines_fit_into_vblank Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-11-jouni.hogander@intel.com
2024-06-11drm/i915/psr: Print Panel Replay status instead of frame lock statusJouni Högander
Currently Panel Replay status printout is printing frame lock status. It should print Panel Replay status instead. Panel Replay status register field follows PSR status register field. Use existing PSR code for that. Fixes: ef75c25e8fed ("drm/i915/panelreplay: Debugfs support for panel replay") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-10-jouni.hogander@intel.com
2024-06-11drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_validJouni Högander
Early Transport is possible and in our HW mandatory on eDP Panel Replay. Add parameter to intel_psr2_config_et_valid to differentiate validity check for Panel Replay. v2: fix intel_dp->psr_dpcd[0] check Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-9-jouni.hogander@intel.com
2024-06-11drm/i915/alpm: Share alpm support checks with PSR codeJouni Högander
Convert intel_alpm_aux_wake_supported and intel_alpm_aux_less_wake_supported as non-static. Use them in intel_psr.c instead of local variables. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-8-jouni.hogander@intel.com
2024-06-11drm/i915/psr: Split enabling sink for PSR and Panel ReplayJouni Högander
Current intel_psr_enable_sink is a mess due to partly reusing PSR bit definitions for Panel Replay. Even thought PSR and Panel Replay enable registers do have common bits they still have also different bits and same bits with different meaning. For sake of clarity split enabling sink to PSR and Panel Replay specific parts. Also fix issue caused by using psr->panel_replay_enabled to early. Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-7-jouni.hogander@intel.com
2024-06-07drm/i915: pass dev_priv explicitly to MTL_CLKGATE_DIS_TRANSJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the MTL_CLKGATE_DIS_TRANS register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b330d86c5e3012513daa36dceffd2db45f0d7850.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-03drm/i915/psr: Add Early Transport into psr debugfs interfaceJouni Högander
We want to have sink Early Transport capability and usage in our psr debugfs status interface. v4: use su_region_et_enabled instead of psr2_su_region_et_valid v3: remove extra space from "PSR mode: disabled" v2: printout "Selective Update enabled (Early Transport)" instead of "Selective Update Early Transport enabled" Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-7-jouni.hogander@intel.com
2024-06-03drm/i915/psr: Allow setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE via debugfsJouni Högander
Currently setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE (0x20) via psr_debug debugfs interface is not allowed. This patch allows it. v3: - ensure psr is disabled/enabled if enable_psr2_su_region_et changes - remove extra space v2: ensure that fastset is performed when the bit changes Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-6-jouni.hogander@intel.com
2024-06-03drm/i915/psr: Use enable boolean from intel_crtc_state for Early TransportJouni Högander
When enabling Early Transport use intel_crtc_state->enable_psr2_su_region_et instead of psr2_su_region_et_valid. Reviewed-by: Animesh Manna <animesh.manna@intel.com> Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-4-jouni.hogander@intel.com
2024-06-03drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_configJouni Högander
We are currently not getting Early Transport status information in intel_psr_pipe_get_config. Fix this. Reviewed-by: Animesh Manna <animesh.manna@intel.com> Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-3-jouni.hogander@intel.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 07:30:52 +0000