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path: root/drivers/gpu/drm/i915/display/intel_display.c
AgeCommit message (Expand)Author
2024-09-11drm/i915/dmc: Convert DMC code to intel_displayVille Syrjälä
2024-09-11drm/i915/power: Convert "i830 power well" code to intel_displayVille Syrjälä
2024-09-05drm/i915/display: pass display to intel_crtc_for_pipe()Jani Nikula
2024-09-05drm/i915/display: include drm/drm_vblank.h where neededJani Nikula
2024-09-03drm/i915/pps: convert intel_pps.[ch] to struct intel_displayJani Nikula
2024-08-29drm/i915/dsb: Use chained DSBs for LUT programmingVille Syrjälä
2024-08-29drm/i915/dsb: s/dsb/dsb_color_vblank/Ville Syrjälä
2024-08-29drm/i915/dsb: Account for VRR properly in DSB scanline stuffVille Syrjälä
2024-08-23drm/i915/tv: convert to struct intel_displayJani Nikula
2024-08-21drm/i915/display: allow creation of Xe2 ccs framebuffersJuha-Pekka Heikkila
2024-08-12drm/i915/bios: convert to struct intel_displayJani Nikula
2024-08-08drm/i915: Replace double blank with single blank after commaAndi Shyti
2024-08-06drm/i915: Replace BPP_X16_FMT()/ARGS() with FXP_Q4_FMT()/ARGS()Imre Deak
2024-08-06drm/i915: Replace to_bpp_int() with fxp_q4_to_int()Imre Deak
2024-07-12drm/i915: Make vrr_{enabling,disabling}() usable outside intel_display.cVille Syrjälä
2024-06-24drm/i915: Use vblank worker to unpin old legacy cursor fb safelyVille Syrjälä
2024-06-20drm/i915: Pass the whole atomic state to intel_color_prepare_commit()Ville Syrjälä
2024-06-20drm/i915: Add async flip tracepointVille Syrjälä
2024-06-13drm/i915: Factor out function to modeset commit a set of pipesImre Deak
2024-06-12drm/i915: Rename bigjoiner master/slave to bigjoiner primary/secondaryStanislav Lisovskiy
2024-06-12drm/i915: Rename all bigjoiner to joinerStanislav Lisovskiy
2024-06-11drm/i915/display: Skip Panel Replay on pipe comparison if no active planesJouni Högander
2024-06-11drm/i915: Compute CMRR and calculate vtotalMitul Golani
2024-06-11drm/i915: Define and compute Transcoder CMRR registersMitul Golani
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_SET_CONTEXT_LATENCYJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_N2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_M2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_N1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_M1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_N2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_M2Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_N1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_M1Jani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to CHV_CANVASJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to CHV_BLENDJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_ARB_CTLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PFIT_PGM_RATIOSJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PFIT_CONTROLJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_MULTJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to PIPESRCJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VSYNCSHIFTJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to BCLRPATJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VSYNCJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VBLANKJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VTOTALJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HSYNCJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HBLANKJani Nikula
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HTOTALJani Nikula
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-31 13:55:26 +0000