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path: root/drivers/gpu/drm/amd/display
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2023-06-30drm/amd/display: 3.2.241Aric Cyr
This version brings along the following: - Improve debugging mechanism for Gaming FAMS - Add monitor specific edid quirks - Fixes for Phantom pipe - Fixes for Shapper LUT - Clean up asserts Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Take full update path if number of planes changedAlvin Lee
[Description] - A full update is required if the number of planes for a given stream changes - The new fast update path only checked for stream and plane updates, but there could be a plane addition or removal without one of the stream and plane updates triggering a full update - Add an explicit check for number of planes changing for a full update Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Create debugging mechanism for Gaming FAMSGianna Binder
[WHY] To enable FAMS even during gaming sessions. [HOW] By leveraging a new dc.debug parameter. Reviewed-by: Felipe Clark <felipe.clark@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Gianna Binder <gianna.binder@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Add monitor specific edid quirkAurabindo Pillai
Disable FAMS on a Samsung Odyssey G9 monitor. Experiments show that this monitor does not work well under some use cases, and is likely implementation specific bug on the monitor's firmware. Cc: stable@vger.kernel.org Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: For new fast update path, loop through each surfaceAlvin Lee
[Description] - Previous implementation didn't consider multiple surfaces in a flip - Loop through each surface in each flip to ensure the update path is correct Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Remove Phantom Pipe Check When Calculating K1 and K2Austin Zheng
[Why] K1 and K2 not being setting properly when subVP is active. [How] Have phantom pipes use the same programing as the main pipes without checking the paired stream Cc: stable@vger.kernel.org Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Limit new fast update path to addr and gamma / colorAlvin Lee
[Description] - We want to limit the new fast update path to address and gamma updates only. - Add a check in dc_update_planes_and_stream to only take the new fast update path if we only have the specific fast updates defined. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Fix the delta clamping for shaper LUTHarry Wentland
The shaper LUT requires a 10-bit value of the delta between segments. We were using dc_fixpt_clamp_u0d10() to do that but it doesn't do what we want it to do. It will preserve 10-bit precision after the decimal point, but that's not quite what we want. We want 14-bit precision and discard the 4 most-significant bytes. To do that we'll do dc_fixpt_clamp_u0d14() & 0x3ff instead. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: program DPP shaper and 3D LUT if updatedMelissa Wen
If shaper and 3D LUT data updates, lut_3d bit in update_flag is updated and we need to call set_input_transfer_func to program DPP shaper and 3D LUTs. Small cleanup of code style in the related if-condition. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30Revert "drm/amd/display: edp do not add non-edid timings"Hersen Wu
This change causes regression when eDP and external display in mirror mode. When external display supports low resolution than eDP, use eDP timing to driver external display may cause corruption on external display. This reverts commit e749dd10e5f292061ad63d2b030194bf7d7d452c. Cc: stable@vger.kernel.org Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2655 Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30Revert "drm/amd: Disable PSR-SU on Parade 0803 TCON"Mario Limonciello
This reverts commit 072030b1783056b5de8b0fac5303a5e9dbc6cfde. This is no longer necessary when using newer DMUB F/W. Cc: stable@vger.kernel.org Cc: Sean Wang <sean.ns.wang@amd.com> Cc: Marc Rossi <Marc.Rossi@amd.com> Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Cc: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Set minimum requirement for using PSR-SU on PhoenixMario Limonciello
The same parade TCON issue can potentially happen on Phoenix, and the same PSR resilience changes have been ported into the DMUB firmware. Don't allow running PSR-SU unless on the newer firmware. Cc: stable@vger.kernel.org Cc: Sean Wang <sean.ns.wang@amd.com> Cc: Marc Rossi <Marc.Rossi@amd.com> Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Cc: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Set minimum requirement for using PSR-SU on RembrandtMario Limonciello
A number of parade TCONs are causing system hangs when utilized with older DMUB firmware and PSR-SU. Some changes have been introduced into DMUB firmware to add resilience against these failures. Don't allow running PSR-SU unless on the newer firmware. Cc: stable@vger.kernel.org Cc: Sean Wang <sean.ns.wang@amd.com> Cc: Marc Rossi <Marc.Rossi@amd.com> Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Cc: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@amd.com> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2443 Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Correct `DMUB_FW_VERSION` macroMario Limonciello
The `DMUB_FW_VERSION` macro has a mistake in that the revision field is off by one byte. The last byte is typically used for other purposes and not a revision. Cc: stable@vger.kernel.org Cc: Sean Wang <sean.ns.wang@amd.com> Cc: Marc Rossi <Marc.Rossi@amd.com> Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Cc: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Remove assertsHong-lu Cheng
[why] Endless assert caused by LinesInDETChroma=0. [how] Don't floor for LinesInDETChroma=0 Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Hong-lu Cheng <hong-lu.cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: Work around bad DPCD state on link lossIlya Bakoulin
[Why] This display doesn't properly indicate link loss through DPCD bits such as CR_DONE / CHANNEL_EQ_DONE / SYMBOL_LOCKED / INTERLANE_ALIGN_DONE, which all remain set. In addition, DPCD200Eh doesn't match the value of DPCD204h in all cases. For these reasons, we can miss re-training the link, since we don't properly detect link loss with this display. [Why] Add display-specific workaround to read DPCD204h, so that we can detect link loss based on 128b132b-specific status bits in this register. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd/display: perform a bounds check before filling dirty rectanglesHamza Mahfooz
Currently, it is possible for us to access memory that we shouldn't. Since, we acquire (possibly dangling) pointers to dirty rectangles before doing a bounds check to make sure we can actually accommodate the number of dirty rectangles userspace has requested to fill. This issue is especially evident if a compositor requests both MPO and damage clips at the same time, in which case I have observed a soft-hang. So, to avoid this issue, perform the bounds check before filling a single dirty rectangle and WARN() about it, if it is ever attempted in fill_dc_dirty_rect(). Cc: stable@vger.kernel.org # 6.1+ Fixes: 30ebe41582d1 ("drm/amd/display: add FB_DAMAGE_CLIPS support") Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-30drm/amd: Disable PSR-SU on Parade 0803 TCONMario Limonciello
A number of users have reported that there are random hangs occurring caused by PSR-SU specifically on panels that contain the parade 0803 TCON. Users have been able to work around the issue by disabling PSR entirely. To avoid these hangs, disable PSR-SU when this TCON is found. Cc: stable@vger.kernel.org Cc: Sean Wang <sean.ns.wang@amd.com> Cc: Marc Rossi <Marc.Rossi@amd.com> Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Suggested-by: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@amd.com> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2443 Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: 3.2.240Aric Cyr
This version brings along the following: - DCN314 fixes - DCN32x fixes - New fast update sequence enablement - DC mode clock switching enablement for DCN32x - DP link loss fix - New debugfs entry to set MST link settings Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: Enable dc mode clock switching for DCN32xAlvin Lee
- DC mode clock switch interface was previously only executed for DCN303. Enable it for DCN32x so that the interface is called correctly - Assign function pointers for DCN32x that are used in the dc mode interface - Update the dc mode interface to work generically for each ASIC - In update_clocks, make sure to consider softmax if we're in DC mode Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: Fix 128b132b link loss handlingIlya Bakoulin
[Why] We don't check 128b132b-specific bits in LANE_ALIGN_STATUS_UPDATED DPCD registers when parsing link loss status, which can cause us to miss a link loss notification from some sinks. [How] Add a 128b132b-specific status bit check. Cc: stable@vger.kernel.org # 6.3+ Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: fix odm k2 div calculationDmytro Laktyushkin
Correct setting is div by 2 for odm. Seamless odm transitions are enabled with enable_dp_dig_pixel_rate_div_policy debug flag. Fixes: a2c7356f526d ("drm/amd/display: fix pixel rate update sequence") Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: Add MST Preferred Link Setting EntryFangzhi Zuo
When using debugfs to change MST link settings, we need to wait until the next stream update to apply the preferred link setting. So, trigger a hotplug event right after the preferred link setting is applied. Reviewed-by: Wayne Lin <wayne.lin@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: disable seamless boot if force_odm_combine is enabledLeo Chen
[Why & How] Having seamless boot on while forcing debug option ODM combine 2 to 1 will cause some corruptions because of some missing programmings. Cc: stable@vger.kernel.org # 6.1+ Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Leo Chen <sancchen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: Disable DC Mode Capping On DCN321Austin Zheng
Why: Limiting clocks to DC mode max results in some display modes to no longer be supported How: Disable the path that limits the clock values Fixes: 3b718dcaf163 ("drm/amd/display: Filter out AC mode frequencies on DC mode systems") Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: enable the new fast update path for supported ASICsAlvin Lee
The new fast update sequence is now supported on some ASICs. So, enable it by default for all applicable ASICs. Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: Clear update flags at end of flipAlvin Lee
Clear update flags so the next flip does not have any redundant programming (if a subsequent flip does not have a stream or plane update, the update flags are not cleared). Fixes: 0baae6246307 ("drm/amd/display: Refactor fast update to use new HWSS build sequence") Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: Fix pipe check condition for manual triggerAlvin Lee
Condition for programming manually trigger used the wrong pipe (always used top pipe instead of the one we are iterating through). Fixes: 0baae6246307 ("drm/amd/display: Refactor fast update to use new HWSS build sequence") Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: add missing ABM registersSridevi Arvindekar
[Why] We are currently missing some ABM registers. [How] Add the missing registers to dce_abm.h. Reviewed-by: Jun Lei <jun.lei@amd.com> Reviewed-by: Chris Park <chris.park@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Sridevi Arvindekar <sridevi.arvindekar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: Add Clock Table Entry With Max DC ValuesAustin Zheng
Why: Certain display configs resulted in underflow How: Add an entry containing all max DC clock timings Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: add a NULL pointer checkSung-huai Wang
[Why & How] We have to check if stream is properly initialized before calling find_matching_pll(), otherwise we might end up trying to deferecence a NULL pointer. Cc: stable@vger.kernel.org # 6.1+ Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Sung-huai Wang <danny.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23Partially revert "drm/amd/display: Fix possible underflow for displays with ↵Daniel Miess
large vblank" This partially reverts commit de231189e7bf ("drm/amd/display: Fix possible underflow for displays with large vblank"). [Why] The increased value of VBlankNomDefaultUS causes underflow at the desktop of an IP KVM setup [How] Change the value from 800 back to 668 Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23Revert "drm/amd/display: Move DCN314 DOMAIN power control to DMCUB"Daniel Miess
This reverts commit e383b12709e32d6494c948422070c2464b637e44. Controling hubp power gating using the DMCUB isn't stable so we are reverting this change to move control back into the driver. Cc: stable@vger.kernel.org # 6.3+ Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: disable RCO for DCN314Daniel Miess
[Why] RCO is causing error messages on some DCN314 systems [How] Force disable RCO for DCN314 Fixes: 17fbdbda9cc8 ("drm/amd/display: Enable dcn314 DPP RCO") Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23drm/amd/display: disable power gating for DCN314Daniel Miess
[Why] Power gating is causing error messages on some DCN314 systems [How] Force disable power gating for DCN314 Fixes: 4cc1cebe08bf ("drm/amd/display: Re-enable DPP/HUBP Power Gating") Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-23amd/display/dc: remove repeating expressionWang Ming
Identify issues that arise by using the tests/doubletest.cocci semantic patch. Need to remove duplicate expression in if statement. Signed-off-by: Wang Ming <machel@vivo.com> Reviewed-by: Ammar Faizi <ammarfaizi2@gnuweeb.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-19Backmerge tag 'v6.4-rc7' of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next Linux 6.4-rc7 Need this to pull in the msm work. Signed-off-by: Dave Airlie <airlied@redhat.com>
2023-06-15drm/dp_mst: Clear MSG_RDY flag before sending new messageWayne Lin
[Why] The sequence for collecting down_reply from source perspective should be: Request_n->repeat (get partial reply of Request_n->clear message ready flag to ack DPRX that the message is received) till all partial replies for Request_n are received->new Request_n+1. Now there is chance that drm_dp_mst_hpd_irq() will fire new down request in the tx queue when the down reply is incomplete. Source is restricted to generate interveleaved message transactions so we should avoid it. Also, while assembling partial reply packets, reading out DPCD DOWN_REP Sideband MSG buffer + clearing DOWN_REP_MSG_RDY flag should be wrapped up as a complete operation for reading out a reply packet. Kicking off a new request before clearing DOWN_REP_MSG_RDY flag might be risky. e.g. If the reply of the new request has overwritten the DPRX DOWN_REP Sideband MSG buffer before source writing one to clear DOWN_REP_MSG_RDY flag, source then unintentionally flushes the reply for the new request. Should handle the up request in the same way. [How] Separete drm_dp_mst_hpd_irq() into 2 steps. After acking the MST IRQ event, driver calls drm_dp_mst_hpd_irq_send_new_request() and might trigger drm_dp_mst_kick_tx() only when there is no on going message transaction. Changes since v1: * Reworked on review comments received -> Adjust the fix to let driver explicitly kick off new down request when mst irq event is handled and acked -> Adjust the commit message Changes since v2: * Adjust the commit message * Adjust the naming of the divided 2 functions and add a new input parameter "ack". * Adjust code flow as per review comments. Changes since v3: * Update the function description of drm_dp_mst_hpd_irq_handle_event Changes since v4: * Change ack of drm_dp_mst_hpd_irq_handle_event() to be an array align the size of esi[] Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: Convert to kdoc formats in dc/core/dc.cSrinivasan Shanmugam
Fixes the following gcc with W=1: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3483: warning: Cannot understand * ******************************************************************************* drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:4204: warning: Cannot understand * ******************************************************************************* Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: Clean up dcn10_optc.c kdocSrinivasan Shanmugam
Fixes the following W=1 kernel build warning: display/dc/dcn10/dcn10_optc.c:45: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * apply_front_porch_workaround TODO FPGA still need? display/dc/dcn10/dcn10_optc.c:136: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * program_timing_generator used by mode timing set display/dc/dcn10/dcn10_optc.c:391: warning: Function parameter or member 'optc' not described in 'optc1_set_timing_double_buffer' display/dc/dcn10/dcn10_optc.c:391: warning: Function parameter or member 'enable' not described in 'optc1_set_timing_double_buffer' display/dc/dcn10/dcn10_optc.c:404: warning: Function parameter or member 'optc' not described in 'optc1_unblank_crtc' display/dc/dcn10/dcn10_optc.c:404: warning: expecting prototype for unblank_crtc(). Prototype was for optc1_unblank_crtc() instead display/dc/dcn10/dcn10_optc.c:427: warning: Function parameter or member 'optc' not described in 'optc1_blank_crtc' display/dc/dcn10/dcn10_optc.c:427: warning: expecting prototype for blank_crtc(). Prototype was for optc1_blank_crtc() instead display/dc/dcn10/dcn10_optc.c:496: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Enable CRTC display/dc/dcn10/dcn10_optc.c:895: warning: Cannot understand ***************************************************************************** on line 895 - I thought it was a doc line Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: Correct kdoc formats in dcn32_resource_helpers.cSrinivasan Shanmugam
Fixes the following gcc with W=1: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_resource_helpers.c:285: warning: Function parameter or member 'dc' not described in 'dcn32_determine_det_override' drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_resource_helpers.c:285: warning: Function parameter or member 'context' not described in 'dcn32_determine_det_override' drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_resource_helpers.c:285: warning: Function parameter or member 'pipes' not described in 'dcn32_determine_det_override' drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_resource_helpers.c:624: warning: Cannot understand * ***************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_resource_helpers.c:676: warning: Cannot understand * ***************************************************************** Cc: Alvin Lee <alvin.lee2@amd.com> Cc: Stylon Wang <stylon.wang@amd.com> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: Provide function name for 'optc32_enable_crtc()'Srinivasan Shanmugam
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_optc.c:109: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Enable CRTC Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: Correct and remove excess function parameter names in kdocSrinivasan Shanmugam
Fixes the following gcc with W=1: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:872: warning: Excess function parameter 'drr_pipe' description in 'subvp_drr_schedulable' drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:1030: warning: Cannot understand * **************************************************** Cc: Stylon Wang <stylon.wang@amd.com> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: Correct kdoc formats in dcn10_opp.cSrinivasan Shanmugam
Fixes the following W=1 kernel build warning: display/dc/dcn10/dcn10_opp.c:52: warning: Function parameter or member 'oppn10' not described in 'opp1_set_truncation' display/dc/dcn10/dcn10_opp.c:52: warning: Function parameter or member 'params' not described in 'opp1_set_truncation' display/dc/dcn10/dcn10_opp.c:52: warning: expecting prototype for set_truncation(). Prototype was for opp1_set_truncation() instead display/dc/dcn10/dcn10_opp.c:161: warning: Function parameter or member 'oppn10' not described in 'opp1_set_pixel_encoding' display/dc/dcn10/dcn10_opp.c:161: warning: Function parameter or member 'params' not described in 'opp1_set_pixel_encoding' display/dc/dcn10/dcn10_opp.c:161: warning: expecting prototype for set_pixel_encoding(). Prototype was for opp1_set_pixel_encoding() instead display/dc/dcn10/dcn10_opp.c:183: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Set Clamping Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: Add missing function parameter 'optc' & 'enable' to kdoc in ↵Srinivasan Shanmugam
optc3_set_timing_double_buffer() Fixes the following gcc with W=1: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:285: warning: Function parameter or member 'optc' not described in 'optc3_set_timing_double_buffer' drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:285: warning: Function parameter or member 'enable' not described in 'optc3_set_timing_double_buffer' Cc: Harry Wentland <harry.wentland@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: don't free stolen console memory during suspendAlex Deucher
Don't free the memory if we are hitting this as part of suspend. This way we don't free any memory during suspend; see amdgpu_bo_free_kernel(). The memory will be freed in the first non-suspend modeset or when the driver is torn down. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2568 Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15Revert "drm/amd/display: fix dpms_off issue when disabling bios mode"Alex Deucher
This reverts commit 58e67bb3c131da5ee14e4842b08e53f4888dce0a. This patch was reverted, but came back again as commit 58e67bb3c131 ("drm/amd/display: fix dpms_off issue when disabling bios mode") Revert it again as it breaks Asus G513QY / 6800M laptops. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2259 Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Zhongwei <Zhongwei.Zhang@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Mike Lothian <mike@fireburn.co.uk> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: 3.2.239Aric Cyr
This version brings along following fixes: - Improvement on eDP - PSR bug fixes - SubVP bug fixes - Improvements on pipe handling to address potential issues - Freesync bug fix - DPIA bug fix - Fix multi-display issues Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amd/display: fix pixel rate update sequenceDmytro Laktyushkin
The k1/k2 pixel rate dividers in dccg should only be updated on stream enable and do not actually depend on whether odm combine is active. This removes an on flip update of these and fixes the calculate function to ignore odm status for dp steams. Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15Revert "drm/amd/display: reallocate DET for dual displays with high pixel ↵Samson Tam
rate ratio" Revert commit 5f3401eeb064 ("drm/amd/display: reallocate DET for dual displays with high pixel rate ratio") [Why] Previously had modified DET allocation algorithm to allocate less DET segments for lower pixel rate display and more DET segments for higher pixel rate display. But noticed it is causing underflow when higher pixel rate display is not displaying at higher mode [How] Roll back change Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-30 11:12:50 +0000