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path: root/drivers/gpu/drm/amd/display
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2020-12-01drm/amd/display: turn DPMS off on connector unplugAurabindo Pillai
[Why&How] Set dpms off on the connector that was unplugged, for the side effect of releasing some references held through deallocation of MST payload. This is the expected behaviour for non MST devices as well. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-01drm/amd/display: Clear dc remote sinks on MST disconnectAurabindo Pillai
[Why&How] Recent changes to upstream mst code remove the callback which cleared the internal state for mst. Move the missing functionality that was previously called through the destroy call back for mst connector destroy Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: don't expose rotation prop for cursor planeSimon Ser
Setting any rotation on the cursor plane is ignored by amdgpu. Because of DCE/DCN design, it's not possible to rotate the cursor. Instead of displaying the wrong result, stop advertising the rotation property for the cursor plane. Now that we check all cursor plane properties in amdgpu_dm_atomic_check, remove the TODO. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Simon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: check cursor scalingSimon Ser
Don't allow user-space to set different scaling parameters for the cursor plane and for the primary plane. Because of DCE/DCN design, it's not possible to have a mismatch. The old check in dm_update_plane_state is superseded by this new check. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Simon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: disallow cropping for cursor planeSimon Ser
Looking at handle_cursor_update, it doesn't seem like src_{x,y,w,h} are picked up by DC. I also tried to change these parameters via a test KMS client, and amdgpu ignored them. Instead of displaying the wrong result, reject the atomic commit. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Simon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: add cursor FB size checkSimon Ser
This patch expands the cursor checks added in "drm/amd/display: add basic atomic check for cursor plane" to also include a FB size check. Without this patch, setting a FB smaller than max_cursor_size with an invalid width would result in amdgpu error messages and a fallback to a 64-byte width: [drm:hubp1_cursor_set_attributes [amdgpu]] *ERROR* Invalid cursor pitch of 100. Only 64/128/256 is supported on DCN. Note that DC uses the word "pitch" when actually checking the FB width. Indeed, the function handle_cursor_update does this: attributes.pitch = attributes.width; In my tests, the cursor FB actually had a pitch of 512 bytes. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Simon Ser <contact@emersion.fr> Reported-by: Pierre-Loup A. Griffais <pgriffais@valvesoftware.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: init soc bounding box for dcn3.01.Yongqiang Sun
[Why & How] Update init soc bounding box and bw bounding box for DCN3.01. Remove pp smu interface which isn't used. v2: squash in removal of stable function definition (Alex) Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: To update backlight restore mechanismCamille Cho
[Why] Cached backlight is never being updated since panel_cntl specific registers were moved from abm to panel_cntl. [How] Update cached backlight in set_abm_immediate_disable as what we used to do. Also, update the priority of backlight restore mechanism so that cached backlight has the highest priority since it is always correct. Signed-off-by: Camille Cho <Camille.Cho@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: 3.2.113Aric Cyr
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: enable pipe power gating by defaultSung Joon Kim
[why] ASIC requirement. [how] Make disable_*_power_gate to false. Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Add GAMCOR memory shutdown supportJacky Liao
[Why] The GAMCOR memory blocks should be powered down when they're not in use. This will reduce power consumption. [How] Write to GAMCOR_MEM_PWR_FORCE to put memory to shutdown when GAMCOR is not used. Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: remove macro which is in header alreadyYongqiang Sun
[Why & How] Remove temp macro since the enum is in header file already. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Check multiple internal displays for power optimization.Yongqiang Sun
[Why & How] only apply multiple display power optimization in case there are more than one internal display. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Add internal display infoYongqiang Sun
[Why & How] Get internal display info from vbios and pass it to dmub fw to determine if multiple display optmization is needed. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Add BLNDGAM memory shutdown supportJacky Liao
[Why] The BLNDGAM memory blocks should be powered down when they're not in use. This will reduce power consumption. [How] 1. Write to BLNDGAM_MEM_PWR_FORCE to put memory to shutdown when BLNDGAM is not used. 2. Added a debug option to allow this behaviour to be turned off Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Clear sticky vsc sdp error bitWyatt Wood
[Why] Need to clear sticky error bits generated during hpd irq from receiver. [How] Clear sticky vsc sdp error bit. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: change hw sequenceSherry
[Why] t9 delay func is called twice after setting power off, the unexpected action results in a doubling of the added 140ms t9 delay [How] If the backlight has been turned off, does not turn it off again Signed-off-by: Sherry <Yao.Wang1@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: expose clk_mgr functions for reuseEric Yang
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: intermittent underflow observed when PIP is toggled in Full ↵Tashfique Abdullah
screen [Why] The MPCC may change and request data when the pipes are switching from 2 to 1 or 1 to 2. During the switch there is a possibility of underflow and flicker/missing data. [How] During VBlank the MPCC won't request data. The trick is to delay and wait on VBlank, ONLY when pipes are either turning on or off, right before MPCC is reset for the pipes. Signed-off-by: Tashfique Abdullah <tabdullah@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Add DMCU memory low power supportJacky Liao
[Why] On some platforms, DMCU is no longer used. In these cases, some DMCU memory should be completely powered off to save power. [How] 1. Set DMCU_ERAM_MEM_PWR_FORCE to shutdown memory when DMCU is not in use 2. Added a debug option to allow this behaviour to be turned off 3. Set all memory low power debug options to off first, to not immediately cause problems Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Enable stutter for dcn3.01.Yongqiang Sun
[Why & How] Enable stutter for DCN3.01. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Update panel registerChris Park
[Why] Incorrect panel register settings are applied for power sequence because the register macro is not defined in resource. [How] Implement same register space to future resource files. Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Source minimum HBlank supportAshley Thomas
[Why] Some sink devices wish to have access to the minimum HBlank supported by the ASIC. [How] Make the ASIC minimum HBlank available in Source Device information address 0x340. Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: add i2c speed arbitration for dc_i2c and hdcp_i2cCharlene Liu
[why] HDCP 1.4 failed on SL8800 SW w/a test driver use. [how] slower down the HW i2c speed when used by HW i2c. this request: each acquired_i2c_engine setup the i2c speed needed. and set the I2c engine for HDCP use at release_engine. this covers SW using HW I2c engine and HDCP using HW I2c engine. for dmcu using HW I2c engine, needs add similar logic in dmcufw. Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Fix fall-through warnings for ClangGustavo A. R. Silva
In preparation to enable -Wimplicit-fallthrough for Clang, fix multiple warnings by explicitly adding multiple break statements instead of just letting the code fall through to the next case. Link: https://github.com/KSPP/linux/issues/115 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Avoid HDCP initialization in devices without outputRodrigo Siqueira
The HDCP feature requires at least one connector attached to the device; however, some GPUs do not have a physical output, making the HDCP initialization irrelevant. This patch disables HDCP initialization when the graphic card does not have output. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24drm/amd/display: Add DPCS regs for dcn302 link encoderBhawanpreet Lakha
dpcs reg are missing for dcn302 link encoder regs list, so add them. Just like dcn3 Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-20drm: Pass the full state to connectors atomic functionsMaxime Ripard
The current atomic helpers have either their object state being passed as an argument or the full atomic state. The former is the pattern that was done at first, before switching to the latter for new hooks or when it was needed. Now that the CRTCs have been converted, let's move forward with the connectors to provide a consistent interface. The conversion was done using the coccinelle script below, and built tested on all the drivers. @@ identifier connector, connector_state; @@ struct drm_connector_helper_funcs { ... struct drm_encoder* (*atomic_best_encoder)(struct drm_connector *connector, - struct drm_connector_state *connector_state); + struct drm_atomic_state *state); ... } @@ identifier connector, connector_state; @@ struct drm_connector_helper_funcs { ... void (*atomic_commit)(struct drm_connector *connector, - struct drm_connector_state *connector_state); + struct drm_atomic_state *state); ... } @@ struct drm_connector_helper_funcs *FUNCS; identifier state; identifier connector, connector_state; identifier f; @@ f(..., struct drm_atomic_state *state, ...) { <+... - FUNCS->atomic_commit(connector, connector_state); + FUNCS->atomic_commit(connector, state); ...+> } @@ struct drm_connector_helper_funcs *FUNCS; identifier state; identifier connector, connector_state; identifier var, f; @@ f(struct drm_atomic_state *state, ...) { <+... - var = FUNCS->atomic_best_encoder(connector, connector_state); + var = FUNCS->atomic_best_encoder(connector, state); ...+> } @ connector_atomic_func @ identifier helpers; identifier func; @@ ( static struct drm_connector_helper_funcs helpers = { ..., .atomic_best_encoder = func, ..., }; | static struct drm_connector_helper_funcs helpers = { ..., .atomic_commit = func, ..., }; ) @@ identifier connector_atomic_func.func; identifier connector; symbol state; @@ func(struct drm_connector *connector, - struct drm_connector_state *state + struct drm_connector_state *connector_state ) { ... - state + connector_state ... } @ ignores_state @ identifier connector_atomic_func.func; identifier connector, connector_state; @@ func(struct drm_connector *connector, struct drm_connector_state *connector_state) { ... when != connector_state } @ adds_state depends on connector_atomic_func && !ignores_state @ identifier connector_atomic_func.func; identifier connector, connector_state; @@ func(struct drm_connector *connector, struct drm_connector_state *connector_state) { + struct drm_connector_state *connector_state = drm_atomic_get_new_connector_state(state, connector); ... } @ depends on connector_atomic_func @ identifier connector_atomic_func.func; identifier connector_state; identifier connector; @@ func(struct drm_connector *connector, - struct drm_connector_state *connector_state + struct drm_atomic_state *state ) { ... } @ include depends on adds_state @ @@ #include <drm/drm_atomic.h> @ no_include depends on !include && adds_state @ @@ + #include <drm/drm_atomic.h> #include <drm/...> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Cc: Melissa Wen <melissa.srw@gmail.com> Cc: Haneen Mohammed <hamohammed.sa@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201118094758.506730-1-maxime@cerno.tech
2020-11-18drm/amd/display: Add comments to hdcp property change codeBhawanpreet Lakha
[Why] These comments are helpful in understanding which case each if statement handles. [How] Add comments for state transitions (9 possible cases) Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Zhan Liu <zhan.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-18drm/amd/display: Add display only once.Bhawanpreet Lakha
[Why] We call add display multiple times because DESIRED->ENABLED cannot happen instantaneously. We can't compare the new_state/old_state to avoid this because on unplug we set the state to DESIRED and on hotplug the state will still be DESIRED. [How] Add a flag to dm_connector_state to keep track of when to enable or disable HDCP Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Zhan Liu <zhan.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-18drm/amd/display: Always get CRTC updated constant values inside commit tailRodrigo Siqueira
We recently improved our display atomic commit and tail sequence to avoid some issues related to concurrency. One of the major changes consisted of moving the interrupt disable and the stream release from our atomic commit to our atomic tail (commit 6d90a208cfff ("drm/amd/display: Move disable interrupt into commit tail")) . However, the new code introduced inside our commit tail function was inserted right after the function drm_atomic_helper_update_legacy_modeset_state(), which has routines for updating internal data structs related to timestamps. As a result, in certain conditions, the display module can reach a situation where we update our constants and, after that, clean it. This situation generates the following warning: amdgpu 0000:03:00.0: drm_WARN_ON_ONCE(drm_drv_uses_atomic_modeset(dev)) WARNING: CPU: 6 PID: 1269 at drivers/gpu/drm/drm_vblank.c:722 drm_crtc_vblank_helper_get_vblank_timestamp_internal+0x32b/0x340 [drm] ... RIP: 0010:drm_crtc_vblank_helper_get_vblank_timestamp_internal+0x32b/0x340 [drm] ... Call Trace: ? dc_stream_get_vblank_counter+0x57/0x60 [amdgpu] drm_crtc_vblank_helper_get_vblank_timestamp+0x1c/0x20 [drm] drm_get_last_vbltimestamp+0xad/0xc0 [drm] drm_reset_vblank_timestamp+0x63/0xd0 [drm] drm_crtc_vblank_on+0x85/0x150 [drm] amdgpu_dm_atomic_commit_tail+0xaf1/0x2330 [amdgpu] commit_tail+0x99/0x130 [drm_kms_helper] drm_atomic_helper_commit+0x123/0x150 [drm_kms_helper] amdgpu_dm_atomic_commit+0x11/0x20 [amdgpu] drm_atomic_commit+0x4a/0x50 [drm] drm_atomic_helper_set_config+0x7c/0xc0 [drm_kms_helper] drm_mode_setcrtc+0x20b/0x7e0 [drm] ? tomoyo_path_number_perm+0x6f/0x200 ? drm_mode_getcrtc+0x190/0x190 [drm] drm_ioctl_kernel+0xae/0xf0 [drm] drm_ioctl+0x245/0x400 [drm] ? drm_mode_getcrtc+0x190/0x190 [drm] amdgpu_drm_ioctl+0x4e/0x80 [amdgpu] __x64_sys_ioctl+0x91/0xc0 do_syscall_64+0x38/0x90 entry_SYSCALL_64_after_hwframe+0x44/0xa9 ... For fixing this issue we rely upon a refactor introduced on drm_atomic_helper_update_legacy_modeset_state ("Remove the timestamping constant update from drm_atomic_helper_update_legacy_modeset_state()") which decouples constant values update from drm_atomic_helper_update_legacy_modeset_state to a new helper. Basically, this commit uses this new helper and place it right after our release module to avoid a situation where our CRTC struct gets wrong values. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1373 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: update vgh bounding boxYongqiang Sun
[Why & How] Update bounding box as per spread sheet. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Increase sr enter/exit in rn ddr4 watermark tableWyatt Wood
[Why] After removing added latency for HostVM by default, DDR4 sr exit latencies were no longer large enough for some panels and caused underflow. [How] Add 1us to sr enter/exit watermark. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: 3.2.112Aric Cyr
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: correct data typeRaymond Yang
[Why] We should use int for counting variable [How] Change type from bool to uint32_t Signed-off-by: Raymond Yang <rayyang@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Expose new CRC window propertyWayne Lin
[Why] Instead of calculating CRC on whole frame, add flexibility to calculate CRC on specific frame region. [How] Add few crc window coordinate properties. By default, CRC is calculated on whole frame unless user space specifies the CRC calculation window. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: [FW Promotion] Release 0.0.42Anthony Koo
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Add dual edp optimization flag.Yongqiang Sun
[Why & How] Add a dual edp power optimization flag, so driver will notify this flag to dmub FW to determine if apply the power optimization. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: set dpp dto as per requested clk for lower case.Yongqiang Sun
[Why] Blue screen when PNP with multiple monitor or hotplug external monitor when playing video due to dpp dto isn't programmed properly. If lower dpp clock, dpp dto need to be programmed first, and actual dpp clk not avalable yet. [How] set dpp dto as per request clk for lower case before dpp clk update, and after dpp clk updated set dpp dto again with actual dpp clk. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Add I2C memory low power supportJacky Liao
[Why] The I2C memory blocks should be powered down when they are not in use. This will reduce power consumption. [How] 1. Write to I2C_LIGHT_SLEEP_FORCE to put memory in light sleep when released 2. Added a debug option to allow this behaviour to be turned off Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Detect dynamic backlight support in eDP sinkRoy Chan
[Why] Check if the eDP sink supports the dynamic backlight control [How] Query the dynamic backlight capability in DPCD (eDP case only) Signed-off-by: Roy Chan <roy.chan@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: minor restructuring of pbn calculation functionsWenjing Liu
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: fix cursor calculation for 1xnY rotated display groupsSamson Tam
[Why] Cursor is missing on displays 2 and up when doing rotated display groups in 1xnY setup. Calculation puts cursor out of bounds so it is not enabled. [How] In dcn10_set_cursor_position(), add in viewport.y into cursor calculations for 1xnY rotated display groups. For pipe split, check viewport.y for both pipes and use lower one to normalize cursor position before calculations. Add odm 2:1 support ( using same calculations as pipe split ). Signed-off-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: remove unused dml variablesDmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Handle Unknown Result for SMU Periodic Retraining on DCN2.1Sung Lee
[WHY & HOW] Currently if VBIOSSMC_Result_UnknownCmd is returned as result of smu msg there is no way to know. Put 1 in param so if 1 is returned, this unknown case is handled. Signed-off-by: Sung Lee <sung.lee@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Populate hostvm parameter before DML calculationSung Lee
[Why] If the system does not have hostvm enabled, disabling it for DML validation will allow more modes to pass at lower voltage levels. [How] When initializing HostVM save state to hubbub and read back when populating DML pipes from context. Signed-off-by: Sung Lee <sung.lee@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Hook up PSR residency command to DSATWyatt Wood
[Why] Use GPINT command to get PSR residency from FW. [How] Hook up PSR residency command to DSAT. Since PSR Count Request is deprecated, we will use this. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Program dpp dto based on actual dpp clkYongqiang Sun
[Why] dpp dto phase and modulo are programmed with actual dpp global clk and pipe clk. Need to use actual dpp clk to prgoram dpp dto modulo to get more accuracy ratio. [How] assign actual dpp clk to dccg for dpp modulo programming. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Update dmub codeBhawanpreet Lakha
There is a delta in the dmub code - add boot options - add boot status - remove unused auto_load_is_done func pointer Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-13drm/amd/display: Set new format info for converted metadata.Bas Nieuwenhuizen
If we use DCC modifiers this can increase the number of planes from the initial 1 plane with metadata, so that we get a valid modifier from getfb2. Since the code didn't update the format_info getfb2 would only ever return 1 plane with a modifier for which userspace expects > 1. This moves the format lookup to amdgpu_display.c so we do not have issues when DC is not compiled. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 08:28:34 +0000