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path: root/drivers/gpu/drm/amd/amdgpu
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2020-11-13drm/amdgpu: switch to use smuio callbacks for AI familyHawking Zhang
Switch to smuio callbacks: use smuio v9_0 callbacks for Vega10/12, smuio v11_0 callbacks for Vega20/Arcturus. APUs don't support enable/disable rom clock gating and also don't support read bios from rom. So APU flag check is needed in clock gating callbacks and asic funciton for read bios from rom to prevent access unknown offset on APU. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-13drm/amdgpu: implement smuio v11_0 callbacksHawking Zhang
Vega20/Arcturus will use smuio v11_0 callbacks Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-13drm/amdgpu: implement smuio v9_0 callbacksHawking Zhang
Vega10/12 will use smuio v9_0 callbacks Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-13drm/amdgpu: add amdgpu_smuio structureHawking Zhang
Add amdgpu_smuio structure in amdgpu_device to provide various callback functions to support smuio ip funcitonality Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-13gpu: drm: amd: amdgpu: amdgpu: Mark global variables as __maybe_unusedLee Jones
These 3 variables are used in *some* sourcefiles which include amdgpu.h, but not *all*. This leads to a flurry of build warnings. Fixes the following W=1 kernel build warning(s): from drivers/gpu/drm/amd/amdgpu/amdgpu.h:67, drivers/gpu/drm/amd/amdgpu/amdgpu.h:198:19: warning: ‘no_system_mem_limit’ defined but not used [-Wunused-const-variable=] drivers/gpu/drm/amd/amdgpu/amdgpu.h:197:19: warning: ‘debug_evictions’ defined but not used [-Wunused-const-variable=] drivers/gpu/drm/amd/amdgpu/amdgpu.h:196:18: warning: ‘sched_policy’ defined but not used [-Wunused-const-variable=] NB: Repeats ~650 times - snipped for brevity. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amdgpu: update gfx golden setting for dimgrey_cavefishTao Zhou
Set LDS_CONFIG to 0x20 on dimgrey_cavefish to fix GPU hang. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drivers: amdgpu: amdgpu_display: Fixed the spelling of falg to flagBhaskar Chowdhury
s/falg/flag/p Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amd/amdgpu/amdgpu_kms: Remove 'struct drm_amdgpu_info_device dev_info' ↵Lee Jones
from the stack Place it on the heap instead. Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c: In function ‘amdgpu_info_ioctl’: drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:979:1: warning: the frame size of 1128 bytes is larger than 1024 bytes [-Wframe-larger-than=] Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amd/amdgpu/amdgpu_device: Provide documentation for 'reg_addr' paramsLee Jones
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:594: warning: Function parameter or member 'reg_addr' not described in 'amdgpu_device_indirect_rreg' drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:624: warning: Function parameter or member 'reg_addr' not described in 'amdgpu_device_indirect_rreg64' Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drivers: amdgpu: amdgpu_display.c: Fix a spelling doens\'t to doesn\'tBhaskar Chowdhury
s/doens't/doesn't/p Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setupBokun Zhang
- When we are under SRIOV setup, the rev_id cannot be read properly. Therefore, we will return default value for it Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amd/amdgpu: Fix incorrect logic to increment VCN doorbell indexBokun Zhang
- The original logic uses a counter based index assignment, which is incorrect if we only assign VCN1 to this VF but no VCN0 The doorbell index is absolute, so we can calculate it by using index variable i and j Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amdgpu: enable DCN for navi10 headless SKUTianci.Yin
There is a NULL pointer crash when DCN disabled on headless SKU. On normal SKU, the variable adev->ddev.mode_config.funcs is initialized in dm_hw_init(), and it is fine to access it in amdgpu_device_resume(). But on headless SKU, DCN is disabled, the funcs variable is not initialized, then crash arises. Enable DCN to fix this issue. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amd/amdgpu: Import amdgpu_amdkfd_gfx_v9 header file into implementationRamesh Errabolu
[Why] Prevent compiler warnings when building amdgpu kernel module [How] Add the include directive for amdgpu_amdkfd_gfx_v9 header file Fixes: aeee2a48ec9239 ("drm/amd/amdgpu: Enable arcturus devices to access the method kgd_gfx_v9_get_cu_occupancy that is already defined") Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reported-by: kernel test robot <lkp@intel.com>
2020-11-10drm/amdgpu: add ta firmware load for green-sardineRoman Li
[Why] In preparation to enabling hdcp on green sardine. [How] Add green-sardine ta f/w loading in psp_v12 Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10Merge tag 'amd-drm-next-5.11-2020-11-05' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-next-5.11-2020-11-05: amdgpu: - Add initial support for Vangogh - Add support for Green Sardine - Add initial support for Dimgrey Cavefish - Scatter/Gather display support for Renoir - Updates for Sienna Cichlid - Updates for Navy Flounder - SMU7 power improvements - Modifier support for gfx9+ - CI BACO fixes - Arcturus SMU fixes - Lots of code cleanups - DC fixes - Kernel doc fixes - Add more GPU HW client information to page fault error logging - MPO clock tuning for RV - FP fixes for DCN3 on ARM and PPC radeon: - Expose voltage via hwmon on Sumo APUs amdkfd: - Fix unique id handling - Misc fixes From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201105222749.201798-1-alexander.deucher@amd.com
2020-11-04drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher
Avoids confusion in configurations. v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled v3: rebase on latest code Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amd/amdgpu: Enable arcturus devices to access the method ↵Ramesh Errabolu
kgd_gfx_v9_get_cu_occupancy that is already defined [Why] Allow user to know number of compute units (CU) that are in use at any given moment. [How] Remove the keyword static for the method kgd_gfx_v9_get_cu_occupancy Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amd/amdgpu: switch on/off vcn power profile modeKenneth Feng
switch to vcn power profile mode when a video is playing. this can optimize the power/performance when the workload is on the vcn. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: update module paramter doc of amdgpu_dpmKevin Wang
the vega20 isn't supported swsmu. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: do not initialise global variables to 0 or NULLDeepak R Varma
Initializing global variable to 0 or NULL is not necessary and should be avoided. Issue reported by checkpatch script as: ERROR: do not initialise globals to 0 (or NULL). Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: set LDS_CONFIG=0x20 on Navy Flounder to fix a GPU hang (v2)Marek Olšák
v2: squash in build fix Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: Change the way to determine framebuffer typeGang Ba
Determine FRAMEBUFFER_PUBLIC/PRIVATE only based host-accessibility, not peer-accesssibility Signed-off-by: Gang Ba <gaba@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: fix off by one in amdgpu_vm_handle_faultChristian König
The value is inclusive, not exclusive. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: enable GFXOFF for dimgrey_cavefishTao Zhou
GFXOFF has been supported by PMFW, enable it directly in driver for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: resolved ASD loading issue on siennaJohn Clements
updated fw header v2 parser to set asd fw memory Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: Enable FGCG for VangoghJinzhou.Su
Add flags AMD_CG_SUPPORT_GFX_FGCG for Vangogh Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/amdgpu: Add Fine Grain Clock Gating for GFX10Jinzhou.Su
1. Add FGCG for gfx10 2. Get FGCG status for pm info debugfs Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04drm/ttm: replace context flags with bools v2Christian König
The ttm_operation_ctx structure has a mixture of flags and bools. Drop the flags and replace them with bools as well. v2: fix typos, improve comments Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/398686/
2020-11-04drm/ttm: rework no_retry handling v2Christian König
During eviction we do want to trigger the OOM killer. Only while doing new allocations we should try to avoid that and return -ENOMEM to the application. v2: rename the flag to gfp_retry_mayfail. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/398685/
2020-11-02drm/amdgpu: use "*" adjacent to data nameDeepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/amdgpu: use "*" adjacent to data nameDeepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/sdma: use "*" adjacent to data nameDeepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/jpeg: use "*" adjacent to data nameDeepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/umc: use "*" adjacent to data nameDeepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/vcn: use "*" adjacent to data nameDeepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding style standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu: improve code indentation and alignmentDeepak R Varma
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. The patch covers various .c files for this driver. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/amdgpu: improve code indentation and alignmentDeepak R Varma
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. The patch corrects issues for various amdgpu_*.c files for this driver. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/nbio: improve code indentation and alignmentDeepak R Varma
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/vcn: improve code indentation and alignmentDeepak R Varma
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/gfx: improve code indentation and alignmentDeepak R Varma
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu/dce: improve code indentation and alignmentDeepak R Varma
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu: fix spelling mistake: "Successed" -> "Succeeded"Colin Ian King
There is a spelling mistake in a deb_dbg message. Fix it. Reviewed-by: Madhav Chauhan <madhav.chauhan@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu: allow TMZ on vangoghAlex Deucher
Uses the same pathes as navi. Reviewed-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu: replace ih ip block for vega20 and arcturusAlex Sierra
[Why] Vega20 and Arcturus asics use oss 5.0 version. [How] Replace ih ip block by navi10 for vega20 and arcturus. Signed-off-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu: update golden setting for sienna_cichlidLikun Gao
Update golden setting for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02amdgpu: Add mmhub MGCG and MGLS for vangoghJinzhou.Su
Add AMD_CG_SUPPORT_MC_MGCG and AMD_CG_SUPPORT_MC_LS Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amdgpu: disable gfxoff if VCN is busyJiansong Chen
Toggle on/off gfxoff during video playback to fix gpu hang. v2: change sequence to be more compatible with original code. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02Merge drm/drm-next into drm-misc-nextMaxime Ripard
Daniel needs -rc2 in drm-misc-next to merge some patches Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-11-01amd/amdgpu: Disable VCN DPG mode for PicassoVeerabadhran Gopalakrishnan
Concurrent operation of VCN and JPEG decoder in DPG mode is causing ring timeout due to power state. Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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