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path: root/drivers/gpu/drm/amd/amdgpu
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2021-04-07Merge tag 'drm-misc-next-2021-04-01' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.13: UAPI Changes: Cross-subsystem Changes: Core Changes: - mst: Improve topology logging - edid: Rework and improvements for displayid Driver Changes: - anx7625: Regulators support - bridge: Support for the Chipone ICN6211, Lontium LT8912B - lt9611: Fix 4k panels handling Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20210401110552.2b3yetlgsjtlotcn@gilmour
2021-03-26Merge tag 'amd-drm-next-5.13-2021-03-23' of ↵Daniel Vetter
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.13-2021-03-23: amdgpu: - Debugfs cleanup - Various cleanups and spelling fixes - Flexible array cleanups - Initial AMD Freesync HDMI - Display fixes - 10bpc dithering improvements - Display ASSR support - Clean up and unify powerplay and swsmu interfaces - Vangogh fixes - Add SMU gfx busy queues for RV/PCO - PCIE DPM fixes - S0ix fixes - GPU metrics data fixes - DCN secure display support - Backlight type override - Add initial support for Aldebaran - RAS fixes - Prime fixes for A+A systems - Reset fixes - Initial resource cursor support - Drop legacy IO BAR requirements - Various power fixes amdkfd: - MMU notifier fixes - APU fixes radeon: - Debugfs cleanups - Flexible array cleanups UAPI: - amdgpu: Add a new INFO ioctl interface to query video capabilities rather than hardcoding them in userspace. This allows us to provide fine grained asic capabilities (e.g., if a particular part is bandwidth limited, we can limit the capabilities). Proposed userspace: https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps - amdkfd: bump the driver version. There was a problem with reporting some RAS features on older versions of the driver. Proposed userspace: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c36bb9f49bb960f90f9a8cdb7e80a21 Danvet: A bunch of conflicts all over, but it seems to compile ... I did put the call to dc_allow_idle_optimizations() on a single line since it looked a bit too jarring to be left alone. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210324040147.1990338-1-alexander.deucher@amd.com
2021-03-24drm/ttm: switch to per device LRU lockChristian König
Instead of having a global lock for potentially less contention. Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/424010/
2021-03-23drm/amdgpu: Mark Aldebaran HW support as experimentalFelix Kuehling
The HW is not in production yet. Driver support is still in development. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: revert "reserve backup pages for bad page retirment"Christian König
As noted during the review this approach doesn't make sense at all. We should not apply any limitation on the VRAM applications can use inside the kernel. If an application or end user wants to reserve a certain amount of VRAM for bad pages handling we should do this in the upper layer. This reverts commit f89b881c81d9a6481fc17b46b351ca38f5dd6f3a. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: revert "use the new cursor in the VM code"Christian König
We are seeing VM page faults with this. Revert the change until the bugs are fixed. This reverts commit 94ae8dc55790de8979b58428672c8e0b97ee0dae. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Fix memory leakxinhui pan
drm_gem_object_put() should be paired with drm_gem_object_lookup(). All gem objs are saved in fb->base.obj[]. Need put the old first before assign a new obj. Trigger VRAM leak by running command below $ service gdm restart Signed-off-by: xinhui pan <xinhui.pan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: drop extraneous hw_status updateAlex Deucher
We set the same variable a few lines above. Drop the duplicate setting. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu/display: re-enable freesync video patchesNikola Cornij
Since this is a "revert of a revert", the end effect is that freesync video is back to its original state, the way it was before the first revert. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Keep pending_reset valid during smu reset the ASICshaoyunl
SMU internal might need to check this pending_reset setting to decide the reset method Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Enable light SBR in XGMI+passthrough configurationshaoyunl
This is to fix the case where it only enable the light SMU on normal device init. This feature actually need to be enabled after ASIC been reset as well. Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Use dev_info if VFCT table not validFeifei Xu
Some ASICs do not have GOP driver to copy vbios image into VFCT table. And it will go to next check. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: drop legacy IO bar supportAlex Deucher
It was leftover from radeon where it was required for some specific old hardware. It hasn't been required for ages and the driver already falls back to MMIO when legacy IO is not available. Legacy IO also seems to be problematic on on some thunderbolt devices. Drop it. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Johnson <nicholas.johnson-opensource@outlook.com.au>
2021-03-23drm/amdgpu: nuke the ih reentrant lockChristian König
Interrupts on are non-reentrant on linux. This is just an ancient leftover from radeon where irq processing was kicked of from different places. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdkfd: Fix recursive lock warningsFelix Kuehling
memalloc_nofs_save/restore are no longer sufficient to prevent recursive lock warnings when holding locks that can be taken in MMU notifiers. Use memalloc_noreclaim_save/restore instead. Fixes: f920e413ff9c ("mm: track mmu notifiers in fs_reclaim_acquire/release") Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: fix send ras disable cmd when asic not support rasStanley.Yang
cause: It is necessary to send ras disable command to ras-ta during gfx block ras later init, because the ras capability is disable read from vbios for vega20 gaming, but the ras context is released during ras init process, this will cause send ras disable command to ras-to failed. how: Delay releasing ras context, the ras context will be released after gfx block later init done. Changed from V1: move release_ras_context into ras_resume Changed from V2: check BIT(UMC) is more reasonable before access eeprom table Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: update ecc query support for arcturusHawking Zhang
arcturus and sienna_cichlid share the same version of umc_info interface (umc_info v33). arcturus uses umc_config to indicate ECC capability, while sienna_cichlid uses umc_config1 to indicate ECC capability. driver needs to check either umc_config or umc_config1 to decide ECC capability for ASICs that use umc_info v33 interface. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: use the new cursor in the VM codeChristian König
Separate the drm_mm_node walking from the actual handling. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: use the new cursor in amdgpu_ttm_bo_eviction_valuableChristian König
Separate the drm_mm_node walking from the actual handling. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: use new cursor in amdgpu_mem_visibleChristian König
Separate the drm_mm_node walking from the actual handling. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: use the new cursor in amdgpu_ttm_access_memoryChristian König
Separate the drm_mm_node walking from the actual handling. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: use new cursor in amdgpu_ttm_io_mem_pfnChristian König
Separate the drm_mm_node walking from the actual handling. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: use the new cursor in amdgpu_fill_bufferChristian König
Separate the drm_mm_node walking from the actual handling. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: use the new cursor in amdgpu_ttm_copy_mem_to_memChristian König
Separate the drm_mm_node walking from the actual handling. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: new resource cursor (v2)Christian König
Allows to walk over the drm_mm nodes in a TTM resource object. v2: squash in fix from Felix Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Tested-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Free PDB0 bo before bo_finiLijo Lazar
Cleanup pdb0 bo before bo_fini gets called Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: support query ecc cap for SIENNA_CICHLIDHawking Zhang
driver needs to query umc_info_v3_3 for ecc capability in sienna_cichlid Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: fix a few compiler warningsOak Zeng
1. make function mmhub_v1_7_setup_vm_pt_regs static 2. indent a if statement Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: fix compile error on architecture s390 (v2)Oak Zeng
ioremap_cache is not supported on some architecture such as s390. Put the codes into a #ifdef to fix some compile error reported by test robot. v2: squash in non-x86 fix Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reported-by: Kernel test robot <lkp@intel.com> Reviewed-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23Revert "drm/amdgpu: During compute disable GFXOFF for Sienna_Cichlid"Harish Kasiviswanathan
This reverts commit 73bf5cad2696fe3a21f70101821405db839ea18e. Fixed in newer firmware Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Replace in_task() in gfx_v8_0_parse_sq_irq()Sebastian Andrzej Siewior
gfx_v8_0_parse_sq_irq() is using in_task() to distinguish if it is invoked from a workqueue worker or directly from the interrupt handler. The usage of in_interrupt() in drivers is phased out and Linus clearly requested that code which changes behaviour depending on context should either be separated or the context be conveyed in an argument passed by the caller, which usually knows the context. gfx_v8_0_parse_sq_irq() is invoked directly either from a worker or from the interrupt service routine. The worker is only bypassed if the worker is already busy. Add an argument `from_wq' to gfx_v8_0_parse_sq_irq() which is true if invoked from the worker. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Remove in_interrupt() usage in gfx_v9_0_kiq_read_clock()Sebastian Andrzej Siewior
gfx_v9_0_get_gpu_clock_counter() acquires a mutex_t lock and is the only caller of gfx_v9_0_kiq_read_clock(). If it safe to acquire a mutex_t then gfx_v9_0_get_gpu_clock_counter() is always invoked from preemptible context. Remove in_interrupt() because it superfluous as it will always return false. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Replace in_interrupt() usage in gmc_v*_process_interrupt()Sebastian Andrzej Siewior
The usage of in_interrupt() in gmc_v*_process_interrupt() is intended to use a different code path if invoked from the interrupt handler vs invoked from the workqueue. The usage of in_interrupt() in drivers is phased out and Linus clearly requested that code which changes behaviour depending on context should either be separated or the context be conveyed in an argument passed by the caller, which usually knows the context. gmc_v*_process_interrupt() is invoked via the ->process() callback from amdgpu_ih_process() which in turn is invoked either from amdgpu_irq_handler() (the interrupt handler) or from amdgpu_irq_handle_*() which is a workqueue. amdgpu_irq::ih is always processed from the interrupt handler, the other three struct amdgpu_ih_ring members are processed from a workqueue. Replace the in_interrupt() check with a comparison against adev->irq.ih. A similar check is already done to check if the ih pointer is from ih_soft. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Fix spelling mistake "disabed" -> "disabled"Colin Ian King
There is a spelling mistake in a drm debug message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: update secure display TA headerJinzhou Su
update secure display TA header file. Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu:disable XGMI TA unload for A+A aldebaranFeifei Xu
In gpu reset, XGMI TA unload will cause gpu hang. Skip it on A+A aldebaran. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Enable light SBR for SMU on passthrough and XGMI configurationshaoyunl
SMU introduce the new interface to enable light Secondary Bus Reset mode, driver enable it on passthrough + XGMI configuration Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: skip read eeprom for device that pending on XGMI resetshaoyunl
Read eeprom through SMU doesn't works stable on XGMI reset during test. skip it for now Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: fix S0ix handling when the CONFIG_AMD_PMC=mAlex Deucher
Need to check the module variant as well. Acked-by: Prike Liang <Prike.Liang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu : Fix asic reset regression issue introduce by 8f211fe8ac7c4fshaoyunl
This recent change introduce SDMA interrupt info printing with irq->process function. These functions do not require a set function to enable/disable the irq Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: add ih waiter on process until checkpointJonathan Kim
Add IH function to allow caller to wait until ring entries are processed until the checkpoint write pointer. This will be primarily used by HMM to drain pending page fault interrupts before memory unmap to prevent HMM from handling stale interrupts. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: fb BO should be ttm_bo_type_deviceNirmoy Das
FB BO should not be ttm_bo_type_kernel type and amdgpufb_create_pinned_object() pins the FB BO anyway. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Reset the devices in the XGMI hive duirng probeshaoyunl
In passthrough configuration, hypervisior will trigger the SBR(Secondary bus reset) to the devices without sync to each other. This could cause device hang since for XGMI configuration, all the devices within the hive need to be reset at a limit time slot. This serial of patches try to solve this issue by co-operate with new SMU which will only do minimum house keeping to response the SBR request but don't do the real reset job and leave it to driver. Driver need to do the whole sw init and minimum HW init to bring up the SMU and trigger the reset(possibly BACO) on all the ASICs at the same time Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Andrey Grodzovsky andrey.grodzovsky@amd.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Add reset_list for device list used for resetshaoyunl
The gmc.xgmi.head list originally is designed for device list in the XGMI hive. Mix use it for reset purpose will prevent the reset function to adjust XGMI device list which is required in next change Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Andrey Grodzovsky andrey.grodzovsky@amd.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Init the cp MQD if it's not be initialized beforeshaoyunl
The MQD might not be initialized duirng first init period if the device need to be reset druing probe. Driver need to proper init them in gpu recovery period Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Add kfd init_complete flag to check from amdgpu sideshaoyunl
amdgpu driver may be in reset state during init which will not initialize the kfd, driver need to initialize the KFD after reset by check the flag Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23Revert "drm/amdgpu: add psp RAP L0 check support"Kevin Wang
This reverts commit d86fd724e59af96ae5ab6630f4f07a076e9b80cd. Disable PSP RAP L0 self test until to RAP feature ready. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Verify bo size can fit framebuffer size on init.Mark Yacoub
To initialize the framebuffer, call drm_gem_fb_init_with_funcs which verifies that the BO size can fit the FB size by calculating the minimum expected size of each plane. The bug was caught using igt-gpu-tools test: kms_addfb_basic.too-high and kms_addfb_basic.bo-too-small Tested on ChromeOS Zork by turning on the display and running a YT video. === Changes from v1 === 1. Added new line under declarations. 2. Use C style comment. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Sean Paul <seanpaul@chromium.org> Signed-off-by: Mark Yacoub <markyacoub@chromium.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Check if FB BAR is enabled for ROM readLijo Lazar
Some configurations don't have FB BAR enabled. Avoid reading ROM image from FB BAR region in such cases. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-03-23drm/amdgpu: Set GTT_USWC flag to enable freesync v2Shashank Sharma
This patch sets 'AMDGPU_GEM_CREATE_CPU_GTT_USWC' as input parameter flag, during object creation of an imported DMA buffer. In absence of this flag: 1. Function amdgpu_display_supported_domains() doesn't add AMDGPU_GEM_DOMAIN_GTT as supported domain. 2. Due to which, Function amdgpu_display_user_framebuffer_create() refuses to create framebuffer for imported DMA buffers. 3. Due to which, AddFB() IOCTL fails. 4. Due to which, amdgpu_present_check_flip() check fails in DDX 5. Due to which DDX driver doesn't allow flips (goes to blitting) 6. Due to which setting Freesync/VRR property fails for PRIME buffers. So, this patch finally enables Freesync with PRIME buffer offloading. v2 (chk): instead of just checking the flag we copy it over if the exporter is an amdgpu device as well. Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-04 01:48:38 +0000