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path: root/drivers/clk/x86/clk-cgu.c
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2022-10-17clk: mxl: Fix a clk entry by adding relevant flagsRahul Tanwar
One of the clock entry "dcl" clk has some HW limitations. One is that its rate can only by changed by changing its parent clk's rate & two is that HW does not support enable/disable for this clk. Handle above two limitations by adding relevant flags. Add standard flag CLK_SET_RATE_PARENT to handle rate change and add driver internal flag DIV_CLK_NO_MASK to handle enable/disable. Fixes: d058fd9e8984 ("clk: intel: Add CGU clock driver for a new SoC") Reviewed-by: Yi xin Zhu <yzhu@maxlinear.com> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> Link: https://lore.kernel.org/r/a4770e7225f8a0c03c8ab2ba80434a4e8e9afb17.1665642720.git.rtanwar@maxlinear.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-17clk: mxl: Add option to override gate clksRahul Tanwar
In MxL's LGM SoC, gate clocks can be controlled either from CGU clk driver i.e. this driver or directly from power management driver/daemon. It is dependent on the power policy/profile requirements of the end product. To support such use cases, provide option to override gate clks enable/disable by adding a flag GATE_CLK_HW which controls if these gate clks are controlled by HW i.e. this driver or overridden in order to allow it to be controlled by power profiles instead. Reviewed-by: Yi xin Zhu <yzhu@maxlinear.com> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> Link: https://lore.kernel.org/r/bdc9c89317b5d338a6c4f1d49386b696e947a672.1665642720.git.rtanwar@maxlinear.com [sboyd@kernel.org: Add braces on many line if-else] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-17clk: mxl: Remove redundant spinlocksRahul Tanwar
Patch 1/4 of this patch series switches from direct readl/writel based register access to regmap based register access. Instead of using direct readl/writel, regmap API's are used to read, write & read-modify-write clk registers. Regmap API's already use their own spinlocks to serialize the register accesses across multiple cores in which case additional driver spinlocks becomes redundant. Hence, remove redundant spinlocks from driver in this patch 2/4. Reviewed-by: Yi xin Zhu <yzhu@maxlinear.com> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> Link: https://lore.kernel.org/r/a8a02c8773b88924503a9fdaacd37dd2e6488bf3.1665642720.git.rtanwar@maxlinear.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-17clk: mxl: Switch from direct readl/writel based IO to regmap based IORahul Tanwar
Earlier version of driver used direct io remapped register read writes using readl/writel. But we need secure boot access which is only possible when registers are read & written using regmap. This is because the security bus/hook is written & coupled only with regmap layer. Switch the driver from direct readl/writel based register accesses to regmap based register accesses. Additionally, update the license headers to latest status. Reviewed-by: Yi xin Zhu <yzhu@maxlinear.com> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> Link: https://lore.kernel.org/r/2610331918206e0e3bd18babb39393a558fb34f9.1665642720.git.rtanwar@maxlinear.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-07-24clk: intel: Avoid unnecessary memset by improving codeRahul Tanwar
memset can be avoided in a loop if the variables used are declared inside the loop. Move such variables declaration inside the loop to avoid memset. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/26624b65d0e6b958c4765a406b9929d1a9ce1c2c.1594880946.git.rahul.tanwar@linux.intel.com [sboyd@kernel.org: Drop NULL assignment that is overwritten] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-07-24clk: intel: Improve locking in the driverRahul Tanwar
Remove/reduce unnecessary spin locking of the code. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/79c0f5f9f5bc512a7e2b5f3c91f6341f28b5854c.1594880946.git.rahul.tanwar@linux.intel.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-07-24clk: intel: Use devm_clk_hw_register() instead of clk_hw_register()Rahul Tanwar
To ensure that clks are unregistered in case of any failure, use devm_clk_hw_register() instead of clk_hw_register(). Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/7ef7009b4e9f986fd6dfbf487c0e85de68a4ba9b.1594880946.git.rahul.tanwar@linux.intel.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-28clk: intel: remove redundant initialization of variable rate64Colin Ian King
The variable rate64 is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lkml.kernel.org/r/20200528221219.535804-1-colin.king@canonical.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-26clk: intel: Add CGU clock driver for a new SoCRahul Tanwar
Clock Generation Unit(CGU) is a new clock controller IP of a forthcoming Intel network processor SoC named Lightning Mountain(LGM). It provides programming interfaces to control & configure all CPU & peripheral clocks. Add common clock framework based clock controller driver for CGU. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lkml.kernel.org/r/42a4f71847714df482bacffdcd84341a4052800b.1587102634.git.rahul.tanwar@linux.intel.com [sboyd@kernel.org: Kill init function to alloc and cleanup newline] Signed-off-by: Stephen Boyd <sboyd@kernel.org>