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path:
root
/
drivers
/
clk
/
sunxi
/
clk-sunxi.c
Age
Commit message (
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)
Author
2015-01-05
ARM: sunxi: Add "allwinner,sun6i-a31s" to mach-sunxi
Hans de Goede
2014-12-21
clk: sunxi: Give sunxi_factors_register a registers parameter
Hans de Goede
2014-12-21
clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider
Chen-Yu Tsai
2014-12-21
clk: sunxi: Remove ahb1_sdram from sun6i/sun8i protected clocks list
Chen-Yu Tsai
2014-11-23
clk: sunxi: Implement A31 PLL6 as a divs clock for 2x output
Chen-Yu Tsai
2014-11-23
clk: sunxi: Specify number of child clocks for divs clocks
Chen-Yu Tsai
2014-11-23
clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driver
Chen-Yu Tsai
2014-11-11
clk: sunxi: unify APB1 clock
Emilio López
2014-10-21
clk: sunxi: Add support for bus clock gates on Allwinner A80 SoC
Chen-Yu Tsai
2014-10-21
clk: sunxi: make factors clock mux mask configurable
Chen-Yu Tsai
2014-09-27
clk: sunxi: Move mbus to mod0 file
Maxime Ripard
2014-09-27
clk: sunxi: Move mod0 clock to a file of its own
Maxime Ripard
2014-09-27
clk: sunxi: Introduce mbus compatible
Maxime Ripard
2014-09-27
clk: sunxi: factors: Invert the probing logic
Maxime Ripard
2014-09-13
clk: sunxi: add correct divider table for sun4i-apb0 clock
Chen-Yu Tsai
2014-07-28
clk: sunxi: add __iomem markings to MMIO pointers
Emilio López
2014-07-04
clk: sunxi: Add A23 clocks support
Chen-Yu Tsai
2014-07-04
clk: sunxi: Add support for table-based divider clocks
Chen-Yu Tsai
2014-07-04
clk: sunxi: move "ahb_sdram" to protected clock list
Chen-Yu Tsai
2014-07-04
clk: sunxi: register clock gates with clkdev
Chen-Yu Tsai
2014-06-11
clk: sun6i: Protect SDRAM gating bit
Maxime Ripard
2014-06-11
clk: sun6i: Protect CPU clock
Maxime Ripard
2014-06-11
clk: sunxi: Rework clock protection code
Maxime Ripard
2014-06-11
clk: sunxi: Move the GMAC clock to a file of its own
Maxime Ripard
2014-06-11
clk: sunxi: Move the 24M oscillator to a file of its own
Maxime Ripard
2014-06-11
clk: sunxi: Remove calls to clk_put
Maxime Ripard
2014-06-11
clk: sunxi: Implement A31 USB clock
Maxime Ripard
2014-06-07
Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/...
Linus Torvalds
2014-05-20
clk: sunxi: fix function type for CLK_OF_DECLARE
Rob Herring
2014-05-20
clk: sunxi: avoid double DT matching
Rob Herring
2014-05-14
clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk
Hans de Goede
2014-05-05
clk: sunxi: Implement MMC phase control
Emilio López
2014-03-19
clk: sunxi: fix thinko in comment
Emilio López
2014-03-19
clk: sunxi: fix some calculations
Emilio López
2014-03-19
clk: sunxi: fix A20 PLL4 calculation
Emilio López
2014-02-18
clk: sunxi: Add new clock compatibles
Maxime Ripard
2014-02-18
clk: sunxi: Add Allwinner A20/A31 GMAC clock unit
Chen-Yu Tsai
2014-02-18
clk: sunxi: Add support for PLL6 on the A31
Maxime Ripard
2014-02-18
clk: sunxi: Add USB clock register defintions
Roman Byshko
2014-02-18
clk: sunxi: Add support for USB clock-register reset bits
Hans de Goede
2014-02-03
clk: sunxi: get divs parent clock name from parent factor clock
Chen-Yu Tsai
2014-02-03
clk: sunxi: add names for pll5, pll6 parent clocks to factors_data
Chen-Yu Tsai
2014-02-03
clk: sunxi: add clock-output-names dt property support
Chen-Yu Tsai
2014-01-27
clk: sunxi: fix overflow when setting up divided factors
Emilio López
2013-12-28
clk: sunxi: Allwinner A20 output clock support
Chen-Yu Tsai
2013-12-28
clk: sunxi: support better factor DT nodes
Emilio López
2013-12-28
clk: sunxi: mod0 support
Emilio López
2013-12-28
clk: sunxi: add PLL5 and PLL6 support
Emilio López
2013-12-28
clk: sunxi: make factors_clk_setup return the clock it registers
Emilio López
2013-12-28
clk: sunxi: add gating support to PLL1
Emilio López
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