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path: root/drivers/clk/qcom/Makefile
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2023-06-13clk: qcom: Add lpass clock controller driver for SC8280XPSrinivas Kandagatla
Add support for the lpass clock controller found on SC8280XP based devices. This would allow lpass peripheral loader drivers to control the clocks and bring the subsystems out of reset. Currently this patch only supports resets as the Q6DSP is in control of LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg channel. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230608125315.11454-4-srinivas.kandagatla@linaro.org
2023-05-26clk: qcom: gpucc-sm8550: Add support for graphics clock controllerJagadeesh Kona
Add support for gpucc driver on SM8550, which provides clocks for the graphics subsystem. Co-developed-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524181800.28717-3-quic_jkona@quicinc.com
2023-05-26clk: qcom: Add support for SM8450 GPUCCKonrad Dybcio
The GPUCC manages the clocks for the Adreno GPU found on the sm8450 SoCs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-4-4f40e282af1d@linaro.org
2023-05-24clk: qcom: Add GCC driver support for SDX75Imran Shaik
Add Global Clock Controller (GCC) support for SDX75 platform. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230512122347.1219-6-quic_tdas@quicinc.com
2023-05-24clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550Jagadeesh Kona
Add support for the video clock controller for video clients to be able to request for videocc clocks on SM8550 platform. Co-developed-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524145203.13153-4-quic_jkona@quicinc.com
2023-05-24clk: qcom: videocc-sm8450: Add video clock controller driver for SM8450Taniya Das
Add support for the video clock controller driver for peripheral clock clients to be able to request for video cc clocks. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524140656.7076-3-quic_tdas@quicinc.com
2023-05-24clk: qcom: Introduce SM8350 VIDEOCCKonrad Dybcio
Add support for the Video Clock Controller found on the SM8350 SoC. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-2-86c714a66a81@linaro.org
2023-04-13clk: qcom: add the GPUCC driver for sa8775pShazad Hussain
Add the clock driver for the Qualcomm Graphics Clock control module. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> [Bartosz: make ready for upstream] Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411125910.401075-3-brgl@bgdev.pl
2023-04-07clk: qcom: Add Global Clock Controller driver for IPQ9574Devi Priya
Add Global Clock Controller (GCC) driver for ipq9574 based devices Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316072940.29137-3-quic_devipriy@quicinc.com
2023-03-15clk: qcom: Add global clock controller driver for MSM8917Otto Pflüger
This driver provides clocks, resets and power domains needed for various components of the MSM8917 SoC and the very similar QM215 SoC. According to [1] in the downstream kernel, the GPU clock has a different source mapping on QM215 (gcc_gfx3d_map vs gcc_gfx3d_map_qm215). [1]: https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LF.UM.8.6.2-28000-89xx.0/include/dt-bindings/clock/msm-clocks-hwio-8952.h#L298 Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230223180935.60546-3-otto.pflueger@abscue.de
2023-03-15clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoCKathiravan T
Add support for the global clock controller found on IPQ5332 SoC. PLL used on IPQ5332 is of type Stromer Plus PLL, however the programming sequence is same as Stromer PLL, so lets re-use the Stromer PLL ops. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230307062232.4889-5-quic_kathirav@quicinc.com
2023-03-13clk: qcom: Add Global Clock Controller (GCC) driver for SM7150Danila Tikhonov
Add support for the global clock controller found on SM7150 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Co-developed-by: David Wronek <davidwronek@gmail.com> Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230213165318.127160-3-danila@jiaxyga.com
2023-03-13clk: qcom: Add GPU clock controller driver for SM6115Konrad Dybcio
Add support for the GPU clock controller found on SM6115. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-11-konrad.dybcio@linaro.org
2023-03-13clk: qcom: Add GPU clock controller driver for SM6375Konrad Dybcio
Add support for the GPU clock controller found on SM6375. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-9-konrad.dybcio@linaro.org
2023-03-13clk: qcom: Add GPU clock controller driver for SM6125Konrad Dybcio
Add support for the GPU clock controller found on SM6125. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208091340.124641-7-konrad.dybcio@linaro.org
2023-02-08clk: qcom: add msm8996 Core Bus Framework (CBF) supportDmitry Baryshkov
Add CBF clock driver as a part of MSM8996 CPU clocks. Significantly based on AngeloGioacchino del Regno's work at [1]. The CBF is an interconnect between two CPU clusters, setting it up properly is required for booting the MSM8996 with all four cores enabled. [1] https://github.com/sonyxperiadev/kernel/blob/aosp/LE.UM.2.3.2.r1.4/drivers/clk/qcom/clk-cpu-8996.c Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [bjorn: Dropped partially uninitialized variable "ret" from cbf_clk_notifier_cb()] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120061417.2623751-4-dmitry.baryshkov@linaro.org
2023-02-08clk: qcom: add the driver for the MSM8996 APCS clocksDmitry Baryshkov
Add a simple driver handling the APCS clocks on MSM8996. For now it supports just a single aux clock, linking GPLL0 to CPU and CBF clocks. Note, there is little sense in registering sys_apcs_aux as a child of gpll0. The PLL is always-on. And listing the gpll0 as a property of the apcs would delay its probing until the GCC has been probed (while we would like for the apcs to be probed as early as possible). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> [bjorn: Fixed spelling of register, per Stephen's feedback] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230126230319.3977109-8-dmitry.baryshkov@linaro.org
2023-01-18clk: qcom: Add QDU1000 and QRU1000 GCC supportTaniya Das
Add Global Clock Controller (GCC) support for QDU1000 and QRU1000 SoCs. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [bjorn: Made gcc_pcie_0_pipe_clk_src use clk_regmap_phy_mux_ops] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112204446.30236-3-quic_molvera@quicinc.com
2023-01-18clk: qcom: add the GCC driver for sa8775pShazad Hussain
Add support for the Global Clock Controller found in the QTI SA8775P platforms. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> [Bartosz: made the driver ready for upstream] Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> [bjorn: Moved to core_initcall(), per request of Konrad] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117180429.305266-3-brgl@bgdev.pl
2023-01-10clk: qcom: add SM8550 DISPCC driverNeil Armstrong
Add support for the display clock controller found in SM8550 based devices. This clock controller feeds the Multimedia Display SubSystem (MDSS). This driver is based on the SM8450 support. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-3-8a03d348c572@linaro.org
2023-01-06clk: qcom: Add TCSR clock driver for SM8550Abel Vesa
The TCSR clock controller found on SM8550 provides refclks for PCIE, USB and UFS. Add clock driver for it. This patch is based on initial code downstream. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230104093450.3150578-5-abel.vesa@linaro.org
2022-12-28clk: qcom: Add camera clock controller driver for SM6350Konrad Dybcio
Add support for the camera clock controller found on SM6350. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213152617.296426-2-konrad.dybcio@linaro.org
2022-12-01clk: qcom: Add GCC driver for SM8550Abel Vesa
Add Global Clock controller (GCC) driver for SM8550 SoC, which includes the gcc resets and gdsc. This patch is based on an initial downstream driver. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130112852.2977816-6-abel.vesa@linaro.org
2022-11-15clk: qcom: Add display clock controller driver for SM6375Konrad Dybcio
Add support for the display clock controller found on SM6375. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221115155808.10899-2-konrad.dybcio@linaro.org
2022-11-09clk: qcom: Add SC8280XP display clock controllerBjorn Andersson
The Qualcomm SC8280XP platform has two display clock controller instances, add support for these. Duplication between the two implementations is reduced by reusing any constant data between the two sets of clock data. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220926203800.16771-3-quic_bjorande@quicinc.com
2022-09-27clk: qcom: Add global clock controller driver for SM6375Konrad Dybcio
Add support for the global clock controller found on SM6375. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-3-konrad.dybcio@somainline.org
2022-09-27clk: qcom: Add SC8280XP GPU clock controllerBjorn Andersson
Add driver for the GPU clock controller in the Qualcomm SC8280XP platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Included kernel.h and lower-cased hex numbers] Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220926173025.4747-3-quic_bjorande@quicinc.com
2022-09-26clk: qcom: Add support for Display Clock Controller on SM8450Dmitry Baryshkov
Add support for the dispcc on Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220908222850.3552050-4-dmitry.baryshkov@linaro.org
2022-09-26clk: qcom: Add display clock controller driver for SM6115Adam Skladowski
Add support for the display clock controller found in SM6115/SM4250 based devices. This clock controller feeds the Multimedia Display SubSystem (MDSS). This driver is based upon one submitted for QCM2290. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220911164635.182973-3-a39.skl@gmail.com
2022-09-13clk: qcom: Add driver for MSM8909 GCCStephan Gerhold
The Global Clock Controller (GCC) in the MSM8909 SoC provides clocks, resets and power domains for the various hardware blocks in the SoC. Add a driver for it to make it possible to enable additional functionality for the SoC. Work on this driver was originally started independently by Dominik, I picked it up and added missing clocks/resets, as well as various cleanup to bring it into shape for mainline. Co-developed-by: Dominik Kobinski <dominikkobinski314@gmail.com> Signed-off-by: Dominik Kobinski <dominikkobinski314@gmail.com> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220706134132.3623415-3-stephan.gerhold@kernkonzept.com
2022-07-06clk: qcom: add support for SM8350 GPUCCRobert Foss
The GPUCC manages the clocks for the Adreno GPU found on the sm8350 SoCs. Signed-off-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706154337.2026269-3-robert.foss@linaro.org
2022-07-06clk: qcom: add camera clock controller driver for SM8450 SoCVladimir Zapolskiy
Add camera clock controller driver found on Qualcomm SM8450 SoC. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220701062744.2757931-1-vladimir.zapolskiy@linaro.org
2022-06-25clk: qcom: regmap: add PHY clock source implementationDmitry Baryshkov
On recent Qualcomm platforms the QMP PIPE clocks feed into a set of muxes which must be parked to the "safe" source (bi_tcxo) when corresponding GDSC is turned off and on again. Currently this is handcoded in the PCIe driver by reparenting the gcc_pipe_N_clk_src clock. However the same code sequence should be applied in the pcie-qcom endpoint, USB3 and UFS drivers. Rather than copying this sequence over and over again, follow the example of clk_rcg2_shared_ops and implement this parking in the enable() and disable() clock operations. Supplement the regmap-mux with the new clk_regmap_phy_mux type, which implements such multiplexers as a simple gate clocks. This is possible since each of these multiplexers has just two clock sources: one coming from the PHY and a reference (XO) one. If the clock is running off the from-PHY source, report it as enabled. Report it as disabled otherwise (if it uses reference source). This way the PHY will disable the pipe clock before turning off the GDSC, which in turn would lead to disabling corresponding pipe_clk_src (and thus it being parked to a safe, reference clock source). And vice versa, after enabling the GDSC the PHY will enable the pipe clock, which would cause pipe_clk_src to be switched from a safe source to the working one. Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220608105238.2973600-2-dmitry.baryshkov@linaro.org
2022-05-19clk: qcom: add sc8280xp GCC driverBjorn Andersson
Add support for the Global Clock Controller found in the Qualcomm SC8280XP platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20220505025457.1693716-3-bjorn.andersson@linaro.org
2022-04-12clk: qcom: lpass: Add support for LPASS clock controller for SC7280Taniya Das
The Low Power Audio subsystem core and audio clocks are required for Audio client to be able to request for the clocks and power domains. Signed-off-by: Taniya Das <tdas@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220223172248.18877-2-tdas@codeaurora.org
2022-03-09clk: qcom: Add display clock controller driver for SM6125Martin Botka
Add support for the display clock controller found on SM6125 based devices. This allows display drivers to probe and control their clocks. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303131812.302302-4-marijn.suijten@somainline.org
2022-03-09clk: qcom: Fix sorting of SDX_GCC_65 in Makefile and KconfigMarijn Suijten
In order to keep at least the list of `CONFIG_SM_` drivers sorted alphabetically, SDX_GCC_65 should have been moved one line up. This in turn makes it easier and cleaner to add the followup SM_DISPCC_6125 driver in the right place, right before SM_DISPCC_8250. Fixes: d79afa201328 ("clk: qcom: Add SDX65 GCC support") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303131812.302302-2-marijn.suijten@somainline.org
2022-03-08clk: qcom: Add GPU clock controller driver for SM6350Konrad Dybcio
Add support for the GPU clock controller found on SM6350. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220222011534.3502-4-konrad.dybcio@somainline.org
2022-03-08clk: qcom: Add display clock controller driver for SM6350Konrad Dybcio
Add support for the display clock controller found on SM6350. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220222011534.3502-2-konrad.dybcio@somainline.org
2022-02-10clk: qcom: Add display clock controller driver for QCM2290Loic Poulain
Add support for the display clock controller found in QCM2290 based devices. This clock controller feeds the Multimedia Display SubSystem (MDSS). It's a porting of dispcc-scuba GPL-2.0 driver from CAF msm-4.19 kernel: https://source.codeaurora.org/quic/la/kernel/msm-4.19/tree/drivers/clk/qcom/dispcc-scuba.c?h=LE.UM.4.4.1.r3 Global clock name references (parent_names) have been replaced by parent_data and parent_hws. Clocks marked enable_safe_config have their clk_rcg2_ops moved to clk_rcg2_shared_ops. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1644432308-21099-2-git-send-email-loic.poulain@linaro.org
2021-12-16clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driverAngeloGioacchino Del Regno
Add support for the global clock controller found on MSM8956 and MSM8976 SoCs. Since the multimedia clocks are actually in the GCC on these SoCs, this will allow drivers to probe and control basically all the required clocks. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Co-developed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208091036.132334-3-marijn.suijten@somainline.org
2021-12-16clk: qcom: Add clock driver for SM8450Vinod Koul
This adds Global Clock controller (GCC) driver for SM8450 SoC including the gcc resets and gdsc. This patch is based on initial code downstream by Vivek Aknurwar <viveka@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211207114003.100693-3-vkoul@kernel.org
2021-12-16clk: qcom: Add SDX65 GCC supportVamsi Krishna Lanka
Add Global Clock Controller (GCC) support for SDX65 SoCs from Qualcomm. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/b5ea8a00d4e8418b57f4444d0b5243c1acc41808.1638861860.git.quic_vamslank@quicinc.com
2021-10-13clk: qcom: camcc: Add camera clock controller driver for SC7280Taniya Das
Add support for the camera clock controller found on SC7280 based devices. This would allow camera drivers to probe and control their clocks. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1633567425-11953-2-git-send-email-tdas@codeaurora.org [sboyd@kernel.org: Make some VCOs unsigned long] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13clk: qcom: Add lpass clock controller driver for SC7280Taniya Das
Add support for the lpass clock controller found on SC7280 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1633484416-27852-3-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13clk: qcom: Add Global Clock Controller driver for QCM2290Shawn Guo
Add Global Clock Controller (GCC) driver for QCM2290. This is a porting of gcc-scuba driver from CAF msm-4.19, with GDSC support added on top. Because the alpha_pll on the platform has a different register layout (offsets), its own clk_alpha_pll_regs_offset[] is used in the driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210919023308.24498-3-shawn.guo@linaro.org Acked-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Drop duplicate includes, clk.h include, module alias] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29clk: qcom: Add SM6350 GCC driverKonrad Dybcio
This adds Global Clock controller (GCC) driver for SM6350 SoC Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210820203624.232268-3-konrad.dybcio@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28clk: qcom: Add Global Clock controller (GCC) driver for SM6115Iskren Chernev
Add support for the global clock controller found on SM6115 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Based on CAF implementation. GDSCs ported from downstream DT. Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Link: https://lore.kernel.org/r/20210805161107.1194521-3-iskren.chernev@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26clk: qcom: Add msm8994 MMCC driverKonrad Dybcio
Add a driver for managing MultiMedia SubSystem clocks on msm8994 and its derivatives. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210618111435.595689-2-konrad.dybcio@somainline.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26clk: qcom: Add Global Clock Controller driver for MSM8953Vladimir Lypak
This driver provides clocks, resets and power domains for MSM8953 and compatible SoCs: APQ8053, SDM450, SDA450, SDM632, SDA632. Signed-off-by: Vladimir Lypak <junak.pub@gmail.com> Signed-off-by: Adam Skladowski <a_skl39@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com> Link: https://lore.kernel.org/r/IPvVnyRWbHuQFswiFz0W08Kj1dKoH55ddQVyIIPhMJw@cp7-web-043.plabs.ch Signed-off-by: Stephen Boyd <sboyd@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-05 01:49:53 +0000