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2025-07-10x86/lib: Add WBINVD and WBNOINVD helpers to target multiple CPUsZheyun Shen
Extract KVM's open-coded calls to do writeback caches on multiple CPUs to common library helpers for both WBINVD and WBNOINVD (KVM will use both). Put the onus on the caller to check for a non-empty mask to simplify the SMP=n implementation, e.g. so that it doesn't need to check that the one and only CPU in the system is present in the mask. [sean: move to lib, add SMP=n helpers, clarify usage] Signed-off-by: Zheyun Shen <szy0127@sjtu.edu.cn> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Kai Huang <kai.huang@intel.com> Link: https://lore.kernel.org/r/20250128015345.7929-2-szy0127@sjtu.edu.cn Link: https://lore.kernel.org/20250522233733.3176144-5-seanjc@google.com
2025-07-10x86/lib: Add WBNOINVD helper functionsKevin Loughlin
In line with WBINVD usage, add WBNOINVD helper functions. Explicitly fall back to WBINVD (via alternative()) if WBNOINVD isn't supported even though the instruction itself is backwards compatible (WBNOINVD is WBINVD with an ignored REP prefix), so that disabling X86_FEATURE_WBNOINVD behaves as one would expect, e.g. in case there's a hardware issue that affects WBNOINVD. Opportunistically, add comments explaining the architectural behavior of WBINVD and WBNOINVD, and provide hints and pointers to uarch-specific behavior. Note, alternative() ensures compatibility with early boot code as needed. [ bp: Massage, fix typos, make export _GPL. ] Signed-off-by: Kevin Loughlin <kevinloughlin@google.com> Co-developed-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Kai Huang <kai.huang@intel.com> Acked-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/20250522233733.3176144-4-seanjc@google.com
2025-07-10x86/lib: Drop the unused return value from wbinvd_on_all_cpus()Sean Christopherson
Drop wbinvd_on_all_cpus()'s return value; both the "real" version and the stub always return '0', and none of the callers check the return. Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/20250522233733.3176144-3-seanjc@google.com
2025-07-10arm64: dts: rockchip: Enable HDMI receiver on RK3588 EVB1Sebastian Reichel
Enable HDMI input port of the RK3588 EVB1. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20250704-rk3588-evb1-hdmi-rx-v1-1-248315c36ccd@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-10arm64: dts: rockchip: fix PHY handling for ROCK 4DSebastian Reichel
Old revisions of the ROCK 4D board have a dedicated crystal to supply the RTL8211F PHY's 25MHz clock input. At least some newer revisions instead use REFCLKO25M_GMAC0_OUT. The DT already has this half-prepared, but there are some issues: 1. The DT relies on auto-selecting the right PHY driver, which requires that it works good enough to read the ID registers. This does not work without the clock, which is handled by the PHY driver. By updating the compatible to contain the RTL8211F IDs, so that the operating system can choose the right PHY driver without relying on a pre-powered PHY. 2. Despite the name REFCLKO25M_GMAC0_OUT could also provide a different frequency, so ensure it is explicitly set to 25 MHz as expected by the PHY. 3. While at it switch from deprecated "enable-gpio" to standard "enable-gpios". Fixes: a0fb7eca9c09 ("arm64: dts: rockchip: Add Radxa ROCK 4D device tree") Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20250704-rk3576-rock4d-phy-handling-fixes-v1-1-1d64130c4139@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-10arm64: dts: rockchip: Enable mipi dsi on rk3568-evb1-v10Andy Yan
Enable the w552793baa 1080x1920 dsi panel on rk3568 evb1. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Link: https://lore.kernel.org/r/20250706113831.330799-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-10arm64: dts: rockchip: Add UFS support on the ROCK 4DDetlev Casanova
This device supports removable UFS chips, add support for it. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Link: https://lore.kernel.org/r/20250708155010.401446-1-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-07-10arm64: dts: ti: k3-am69-sk: Add bootph-all property to enable Ethernet bootChintan Vankar
Ethernet boot requires CPSW nodes to be present starting from R5 SPL stage. Add bootph-all property to required nodes to enable Ethernet boot for SK-AM69. Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Chintan Vankar <c-vankar@ti.com> Link: https://lore.kernel.org/r/20250709105326.232608-5-c-vankar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-10arm64: dts: ti: k3-j722s-evm: Add bootph-all property to enable Ethernet bootChintan Vankar
Ethernet boot requires CPSW nodes to be present starting from R5 SPL stage. Add bootph-all property to required nodes to enable Ethernet boot for J722S-EVM. Reviewed-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Chintan Vankar <c-vankar@ti.com> Link: https://lore.kernel.org/r/20250709105326.232608-4-c-vankar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-10arm64: dts: ti: k3-am62p5-sk: Add bootph-all property to enable Ethernet bootChintan Vankar
Ethernet boot requires CPSW nodes to be present starting from R5 SPL stage. Add bootph-all property to required nodes to enable Ethernet boot for AM62P5-SK. Reviewed-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Chintan Vankar <c-vankar@ti.com> Link: https://lore.kernel.org/r/20250709105326.232608-3-c-vankar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-10arm64: dts: ti: k3-am68-sk-base-board: Add bootph-all property to enable ↵Chintan Vankar
Ethernet boot Ethernet boot requires CPSW nodes to be present starting from R5 SPL stage. Add bootph-all property to required nodes to enable Ethernet boot on SK-AM68. Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Chintan Vankar <c-vankar@ti.com> Link: https://lore.kernel.org/r/20250709105326.232608-2-c-vankar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-10arm64: dts: ti: Add support for AM62D2-EVMParesh Bhagat
AM62D-EVM evaluation module (EVM) is a low-cost expandable platform board designed for AM62D2 SoC from TI. It supports the following interfaces: * 4 GB LPDDR4 RAM * x2 Gigabit Ethernet expansion connectors * x4 3.5mm TRS Audio Jack Line In * x4 3.5mm TRS Audio Jack Line Out * x2 Audio expansion connectors * x1 Type-A USB 2.0, x1 Type-C dual-role device (DRD) USB 2.0 * x1 UHS-1 capable micro SD card slot * 32 GB eMMC Flash * 512 Mb OSPI NOR flash * x4 UARTs via USB 2.0-B * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs Although AM62D2 and AM62A7 differ in peripheral capabilities example multimedia, VPAC, and display subsystems, the core architecture remains same. To reduce duplication, AM62D support reuses the AM62A dtsi and the necessary overrides will be handled in SOC specific dtsi file and a board specific dts. Add basic support for AM62D2-EVM. Schematics Link - https://www.ti.com/lit/zip/sprcal5 Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250708085839.1498505-5-p-bhagat@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-10arm64: dts: ti: Add pinctrl entries for AM62D2 family of SoCsParesh Bhagat
Update k3-pinctrl file to include pin definitions for AM62D2 family of SoCs. Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Link: https://lore.kernel.org/r/20250708085839.1498505-4-p-bhagat@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-10arm64: dts: ti: Add bootph property to nodes at source for am62aParesh Bhagat
Add bootph property directly into the original definitions of relevant nodes (e.g., power domains, USB controllers, and other peripherals) within their respective DTSI files (ex. main, mcu, and wakeup) for am62a. By defining bootph in the nodes source definitions instead of appending it later in final DTS files, this change ensures that the property is inherently present wherever the nodes are reused across derived device trees. Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250708085839.1498505-2-p-bhagat@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09x86/hyperv: Clean up hv_map/unmap_interrupt() return valuesNuno Das Neves
Fix the return values of these hypercall helpers so they return a negated errno either directly or via hv_result_to_errno(). Update the callers to check for errno instead of using hv_status_success(), and remove redundant error printing. While at it, rearrange some variable declarations to adhere to style guidelines i.e. "reverse fir tree order". Signed-off-by: Nuno Das Neves <nunodasneves@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Link: https://lore.kernel.org/r/1751582677-30930-5-git-send-email-nunodasneves@linux.microsoft.com Signed-off-by: Wei Liu <wei.liu@kernel.org> Message-ID: <1751582677-30930-5-git-send-email-nunodasneves@linux.microsoft.com>
2025-07-09x86/hyperv: Fix usage of cpu_online_mask to get valid cpuNuno Das Neves
Accessing cpu_online_mask here is problematic because the cpus read lock is not held in this context. However, cpu_online_mask isn't needed here since the effective affinity mask is guaranteed to be valid in this callback. So, just use cpumask_first() to get the cpu instead of ANDing it with cpus_online_mask unnecessarily. Fixes: e39397d1fd68 ("x86/hyperv: implement an MSI domain for root partition") Reported-by: Michael Kelley <mhklinux@outlook.com> Closes: https://lore.kernel.org/linux-hyperv/SN6PR02MB4157639630F8AD2D8FD8F52FD475A@SN6PR02MB4157.namprd02.prod.outlook.com/ Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Nuno Das Neves <nunodasneves@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Link: https://lore.kernel.org/r/1751582677-30930-4-git-send-email-nunodasneves@linux.microsoft.com Signed-off-by: Wei Liu <wei.liu@kernel.org> Message-ID: <1751582677-30930-4-git-send-email-nunodasneves@linux.microsoft.com>
2025-07-09x86/hyperv: Fix warnings for missing export.h header inclusionNaman Jain
Fix below warning in Hyper-V drivers that comes when kernel is compiled with W=1 option. Include export.h in driver files to fix it. * warning: EXPORT_SYMBOL() is used, but #include <linux/export.h> is missing Signed-off-by: Naman Jain <namjain@linux.microsoft.com> Reviewed-by: Saurabh Sengar <ssengar@linux.microsoft.com> Link: https://lore.kernel.org/r/20250611100459.92900-3-namjain@linux.microsoft.com Signed-off-by: Wei Liu <wei.liu@kernel.org> Message-ID: <20250611100459.92900-3-namjain@linux.microsoft.com>
2025-07-09KVM: x86: avoid underflow when scaling TSC frequencyPaolo Bonzini
In function kvm_guest_time_update(), __scale_tsc() is used to calculate a TSC *frequency* rather than a TSC value. With low-enough ratios, a TSC value that is less than 1 would underflow to 0 and to an infinite while loop in kvm_get_time_scale(): kvm_guest_time_update(struct kvm_vcpu *v) if (kvm_caps.has_tsc_control) tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz, v->arch.l1_tsc_scaling_ratio); __scale_tsc(u64 ratio, u64 tsc) ratio=122380531, tsc=2299998, N=48 ratio*tsc >> N = 0.999... -> 0 Later in the function: Call Trace: <TASK> kvm_get_time_scale arch/x86/kvm/x86.c:2458 [inline] kvm_guest_time_update+0x926/0xb00 arch/x86/kvm/x86.c:3268 vcpu_enter_guest.constprop.0+0x1e70/0x3cf0 arch/x86/kvm/x86.c:10678 vcpu_run+0x129/0x8d0 arch/x86/kvm/x86.c:11126 kvm_arch_vcpu_ioctl_run+0x37a/0x13d0 arch/x86/kvm/x86.c:11352 kvm_vcpu_ioctl+0x56b/0xe60 virt/kvm/kvm_main.c:4188 vfs_ioctl fs/ioctl.c:51 [inline] __do_sys_ioctl fs/ioctl.c:871 [inline] __se_sys_ioctl+0x12d/0x190 fs/ioctl.c:857 do_syscall_x64 arch/x86/entry/common.c:51 [inline] do_syscall_64+0x59/0x110 arch/x86/entry/common.c:81 entry_SYSCALL_64_after_hwframe+0x78/0xe2 This can really happen only when fuzzing, since the TSC frequency would have to be nonsensically low. Fixes: 35181e86df97 ("KVM: x86: Add a common TSC scaling function") Reported-by: Yuntao Liu <liuyuntao12@huawei.com> Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-07-09Merge tag 'tsa_x86_bugs_for_6.16' into tip-x86-bugsBorislav Petkov (AMD)
Pick up TSA changes from mainline so that attack vectors work can continue ontop. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
2025-07-09riscv: defconfig: spacemit: enable sdhci driver for K1 SoCYixun Lan
Enable sdhci driver support for SpacemiT K1 SoC, so eMMC storage will be probed and activated, Tested on the Banana Pi BPI-F3 board. Signed-off-by: Yixun Lan <dlan@gentoo.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-07-09Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: - Fix bogus KASAN splat on EFI runtime stack - Select JUMP_LABEL unconditionally to avoid boot failure with pKVM and the legacy implementation of static keys - Avoid touching GCS registers when 'arm64.nogcs' has been passed on the command-line - Move a 'cpumask_t' off the stack in smp_send_stop() - Don't advertise SME-related hwcaps to userspace when ID_AA64PFR1_EL1 indicates that SME is not implemented - Always check the VMA when handling an Overlay fault - Avoid corrupting TCR2_EL1 during boot * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/mm: Drop wrong writes into TCR2_EL1 arm64: poe: Handle spurious Overlay faults arm64: Filter out SME hwcaps when FEAT_SME isn't implemented arm64: move smp_send_stop() cpu mask off stack arm64/gcs: Don't try to access GCS registers if arm64.nogcs is enabled arm64: Unconditionally select CONFIG_JUMP_LABEL arm64: efi: Fix KASAN false positive for EFI runtime stack
2025-07-09ARM: tegra: Add device-tree for ASUS VivoTab RT TF600TSvyatoslav Ryhel
Add device-tree for ASUS VivoTab RT TF600T, which is NVIDIA Tegra30-based tablet device with Windows RT. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Link: https://lore.kernel.org/r/20250617070320.9153-3-clamor95@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-09x86/mm: Disable hugetlb page table sharing on 32-bitJann Horn
Only select ARCH_WANT_HUGE_PMD_SHARE on 64-bit x86. Page table sharing requires at least three levels because it involves shared references to PMD tables; 32-bit x86 has either two-level paging (without PAE) or three-level paging (with PAE), but even with three-level paging, having a dedicated PGD entry for hugetlb is only barely possible (because the PGD only has four entries), and it seems unlikely anyone's actually using PMD sharing on 32-bit. Having ARCH_WANT_HUGE_PMD_SHARE enabled on non-PAE 32-bit X86 (which has 2-level paging) became particularly problematic after commit 59d9094df3d7 ("mm: hugetlb: independent PMD page table shared count"), since that changes `struct ptdesc` such that the `pt_mm` (for PGDs) and the `pt_share_count` (for PMDs) share the same union storage - and with 2-level paging, PMDs are PGDs. (For comparison, arm64 also gates ARCH_WANT_HUGE_PMD_SHARE on the configuration of page tables such that it is never enabled with 2-level paging.) Closes: https://lore.kernel.org/r/srhpjxlqfna67blvma5frmy3aa@altlinux.org Fixes: cfe28c5d63d8 ("x86: mm: Remove x86 version of huge_pmd_share.") Reported-by: Vitaly Chikunov <vt@altlinux.org> Suggested-by: Dave Hansen <dave.hansen@intel.com> Signed-off-by: Jann Horn <jannh@google.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Oscar Salvador <osalvador@suse.de> Acked-by: David Hildenbrand <david@redhat.com> Tested-by: Vitaly Chikunov <vt@altlinux.org> Cc:stable@vger.kernel.org Link: https://lore.kernel.org/all/20250702-x86-2level-hugetlb-v2-1-1a98096edf92%40google.com
2025-07-09ARM: tegra: Use I/O memcpy to write to IRAMAaron Kling
Kasan crashes the kernel trying to check boundaries when using the normal memcpy. Signed-off-by: Aaron Kling <webgeek1234@gmail.com> Link: https://lore.kernel.org/r/20250522-mach-tegra-kasan-v1-1-419041b8addb@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-09KVM: arm64: Fix enforcement of upper bound on MDCR_EL2.HPMNBen Horgan
Previously, u64_replace_bits() was used to no effect as the return value was ignored. Convert to u64p_replace_bits() so the value is updated in place. Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Ben Horgan <ben.horgan@arm.com> Fixes: efff9dd2fee7 ("KVM: arm64: Handle out-of-bound write to MDCR_EL2.HPMN") Link: https://lore.kernel.org/r/20250709093808.920284-2-ben.horgan@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-07-09perf/x86/intel/uncore: Add iMC freerunning for Panther LakeKan Liang
PTL uncore imc freerunning counters are the same as the previous HW. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://lore.kernel.org/r/20250707201750.616527-5-kan.liang@linux.intel.com
2025-07-09perf/x86/intel/uncore: Add Panther Lake supportKan Liang
The Panther Lake supports CBOX, MC, sNCU, and HBO uncore PMON. The CBOX is similar to Lunar Lake. The only difference is the number of CBOX. The other three uncore PMON can be retrieved from the discovery table. The global control register resides in the sNCU. The global freeze bit is set by default. It must be cleared before monitoring any uncore counters. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://lore.kernel.org/r/20250707201750.616527-4-kan.liang@linux.intel.com
2025-07-09perf/x86/intel/uncore: Support customized MMIO map sizeKan Liang
For a server platform, the MMIO map size is always 0x4000. However, a client platform may have a smaller map size. Make the map size customizable. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://lore.kernel.org/r/20250707201750.616527-3-kan.liang@linux.intel.com
2025-07-09perf/x86/intel/uncore: Support MSR portal for discovery tablesKan Liang
Starting from the Panther Lake, the discovery table mechanism is also supported in client platforms. The difference is that the portal of the global discovery table is retrieved from an MSR. The layout of discovery tables are the same as the server platforms. Factor out __parse_discovery_table() to parse discover tables. The uncore PMON is Die scope. Need to parse the discovery tables for each die. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://lore.kernel.org/r/20250707201750.616527-2-kan.liang@linux.intel.com
2025-07-09x86/microcode: Move away from using a fake platform deviceGreg Kroah-Hartman
Downloading firmware needs a device to hang off of, and so a platform device seemed like the simplest way to do this. Now that we have a faux device interface, use that instead as this "microcode device" is not anything resembling a platform device at all. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Sohil Mehta <sohil.mehta@intel.com> Link: https://lore.kernel.org/2025070121-omission-small-9308@gregkh
2025-07-09arm64: dts: ti: k3-am62p-verdin: Adjust temperature trip pointsJoão Paulo Gonçalves
While the TI AM62P supports a junction temperature (Tj) of up to 125°C for industrial and automotive parts, Toradex Verdin-AM62P hardware lifetime guarantees consider a 105°C Tj. Change the passive trip points to 95°C and the critical trip points to 105°C to be compliant with the hardware specifications. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Link: https://lore.kernel.org/r/20250623-b4-verdin-am62p-cooling-device-v1-2-cc185ba5843d@toradex.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09arm64: dts: ti: k3-am62p-j722s: Enable freq throttling on thermal alertJoão Paulo Gonçalves
Enable throttling down the CPU frequency when an alert temperature threshold is reached before the critical temperature for shutdown. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Link: https://lore.kernel.org/r/20250623-b4-verdin-am62p-cooling-device-v1-1-cc185ba5843d@toradex.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09vdso/vsyscall: Split up __arch_update_vsyscall() into __arch_update_vdso_clock()Thomas Weißschuh
The upcoming auxiliary clocks need this hook, too. To separate the architecture hooks from the timekeeper internals, refactor the hook to only operate on a single vDSO clock. While at it, use a more robust #define for the hook override. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250701-vdso-auxclock-v1-3-df7d9f87b9b8@linutronix.de
2025-07-09Merge tag 'pm-runtime-6.17-rc1' of ↵Uwe Kleine-König
https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Runtime PM updates related to autosuspend for 6.17 Make several autosuspend functions mark last busy stamp and update the documentation accordingly (Sakari Ailus).
2025-07-09s390/early: Copy last breaking event address to pt_regsHeiko Carstens
In case of an early crash the early program check handler also prints the last breaking event address which is contained within the pt_regs structure. However it is not initialized, and therefore a more or less random value is printed in case of a crash. Copy the last breaking event address from lowcore to pt_regs in case of an early program check to address this. This also makes it easier to analyze early crashes. Reviewed-by: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2025-07-09arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 nodeNeha Malcom Francis
Add DT node for PBIST_14 that is responsible for triggering the PBIST self-tests for the MAIN_R5_2_x cores. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Link: https://lore.kernel.org/r/20250605063506.2005637-3-n-francis@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09arm64: dts: ti: k3-am62-main: Remove eMMC High Speed DDR supportJudith Mendez
For eMMC, High Speed DDR mode is not supported [0], so remove mmc-ddr-1_8v flag which adds the capability. [0] https://www.ti.com/lit/gpn/am625 Fixes: c37c58fdeb8a ("arm64: dts: ti: k3-am62: Add more peripheral nodes") Cc: stable@vger.kernel.org Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20250707191250.3953990-1-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09arm64: dts: ti: k3-am62*: Move eMMC pinmux to top level board fileJudith Mendez
This moves pinmux child nodes for sdhci0 node from k3-am62x-sk-common to each top level board file. This is needed since we require internal pullups for AM62x SK and not for AM62 LP SK since it has external pullups on DATA 1-7. Internal pulls are required for AM62 SK as per JESD84 spec recommendation to prevent unconnected lines floating. Fixes: d19a66ae488a ("arm64: dts: ti: k3-am625-sk: Enable on board peripherals") Cc: stable@vger.kernel.org Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20250707190830.3951619-1-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09arm64: dts: ti: k3-am62a7-sk: fix pinmux for main_uart1Hong Guan
main_uart1 reserved for TIFS firmware traces is routed to the onboard FT4232 via a FET switch which is connected to pin A21 and B21 of the SoC and not E17 and C17. Fix it. Fixes: cf39ff15cc01a ("arm64: dts: ti: k3-am62a7-sk: Describe main_uart1 and wkup_uart") Cc: stable@vger.kernel.org Signed-off-by: Hong Guan <hguan@ti.com> [bb@ti.com: expanded commit message] Signed-off-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250707-uart-fixes-v1-1-8164147218b0@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09riscv: dts: spacemit: Move eMMC under storage-bus for K1Vivian Wang
SDHCI devices in Spacemit K1 use storage-bus translations. Move the node emmc under storage-bus to reflect this fact. Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://lore.kernel.org/r/20250623-k1-dma-buses-rfc-wip-v1-3-c0144082061f@iscas.ac.cn Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09riscv: dts: spacemit: Move UARTs under dma-bus for K1Vivian Wang
UART devices in Spacemit K1 use dma-bus DMA translations. Move these nodes under dma-bus to reflect this fact. Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Reviewed-by: Guodong Xu <guodong@riscstar.com> Link: https://lore.kernel.org/r/20250623-k1-dma-buses-rfc-wip-v1-2-c0144082061f@iscas.ac.cn Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09riscv: dts: spacemit: Add DMA translation buses for K1Vivian Wang
The SpacemiT K1 has various static translations of DMA accesses. Add these as simple-bus nodes with dma-ranges. Devices actually using these translations will be added to or moved inside the bus nodes in later patches. The bus names are assigned according to consensus with SpacemiT [1]. Link: https://lore.kernel.org/r/CAH1PCMaC+imcMZCFYtRdmH6ge=dPgnANn_GqVfsGRS=+YhyJCw@mail.gmail.com [1] Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Reviewed-by: Guodong Xu <guodong@riscstar.com> Link: https://lore.kernel.org/r/20250623-k1-dma-buses-rfc-wip-v1-1-c0144082061f@iscas.ac.cn Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09riscv: dts: spacemit: add pwm14_1 pinctrl settingGuodong Xu
This patch adds the option 1 (hence the name pwm14_1) pinctrl configuration for PWM14 on the SpacemiT K1 SoC. PWM14 option 1 is used for PWM-based backlight control on MIPI displays. This configuration is present on all existing K1 development boards, such as the Banana Pi BPI-F3 and the Milk-V Jupiter. For reference, a more complete list of PWM0-PWM19 pinctrl configurations including all options can be found in [1]. Note: Since the corresponding functionality for other pins is not yet in use or ready for upstreaming, this patch includes only the pwm14_1 setting. [1] https://lore.kernel.org/all/20250411131423.3802611-7-guodong@riscstar.com/ Signed-off-by: Guodong Xu <guodong@riscstar.com> Link: https://lore.kernel.org/r/20250429085048.1310409-5-guodong@riscstar.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09riscv: dts: spacemit: add PWM support for K1 SoCGuodong Xu
The SpacemiT K1 SoC features a PWM controller with 20 independent channels. Add the corresponding 20 PWM nodes to the device tree. Signed-off-by: Guodong Xu <guodong@riscstar.com> Link: https://lore.kernel.org/r/20250429085048.1310409-4-guodong@riscstar.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09arm64: dts: ti: Enable overlays for all DTB filesAndrew Davis
Allow overlays to be applied to any DTB without manually enabling it for each file. This adds around ~10% to the total size of the DTB files on average. Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250702145314.71996-1-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09arm64: dts: ti: k3-am62p-verdin: fix PWM_3_DSI GPIO directionParth Pancholi
PWM_3_DSI is used as the HDMI Hot-Plug Detect (HPD) GPIO for the Verdin DSI-to-HDMI adapter. After the commit 33bab9d84e52 ("arm64: dts: ti: k3-am62p: fix pinctrl settings"), the pin was incorrectly set as output without RXACTIVE, breaking HPD detection and display functionality. The issue was previously hidden and worked by chance before the mentioned pinctrl fix. Fix the pinmux configuration to correctly set PWM_3_DSI GPIO as an input. Fixes: 87f95ea316ac ("arm64: dts: ti: Add Toradex Verdin AM62P") Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20250703084534.1649594-1-parth105105@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09arm64: dts: ti: k3-pinctrl: Enable Schmitt Trigger by defaultAlexander Sverdlin
Switch Schmitt Trigger functions for PIN_INPUT* macros by default. This is HW PoR configuration, the slew rate requirements without ST enabled are pretty tough for these devices. We've noticed spurious GPIO interrupts even with noise-free edges but not meeting slew rate requirements (3.3E+6 V/s for 3.3v LVCMOS). It's not obvious why one might want to disable the PoR-enabled ST on any pin. Just enable it by default. As it's not possible to provide OR-able macros to disable the ST, shall anyone require it, provide a set of new macros with _NOST suffix. Fixes: fe49f2d776f7 ("arm64: dts: ti: Use local header for pinctrl register values") Cc: stable@vger.kernel.org Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://lore.kernel.org/r/20250701105437.3539924-1-alexander.sverdlin@siemens.com [vigneshr@ti.com: Add Fixes tag] Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-09powerpc/secvar: Expose secvars relevant to the key management modeSrish Srinivasan
The PLPKS enabled PowerVM LPAR sysfs exposes all of the secure boot secvars irrespective of the key management mode. The PowerVM LPAR supports static and dynamic key management for secure boot. The key management option can be updated in the management console. The secvars PK, trustedcadb, and moduledb can be consumed both in the static and dynamic key management modes for the loading of signed third-party kernel modules. However, other secvars i.e. KEK, grubdb, grubdbx, sbat, db and dbx, which are used to verify the grub and kernel images, are consumed only in the dynamic key management mode. Expose only PK, trustedcadb, and moduledb in the static key management mode. Co-developed-by: Souradeep <soura@imap.linux.ibm.com> Signed-off-by: Souradeep <soura@imap.linux.ibm.com> Signed-off-by: Srish Srinivasan <ssrish@linux.ibm.com> Tested-by: R Nageswara Sastry <rnsastry@linux.ibm.com> Reviewed-by: Mimi Zohar <zohar@linux.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Nayna Jain <nayna@linux.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250610211907.101384-3-ssrish@linux.ibm.com
2025-07-09powerpc/pseries: Correct secvar format representation for static key managementSrish Srinivasan
On a PLPKS enabled PowerVM LPAR, the secvar format property for static key management is misrepresented as "ibm,plpks-sb-unknown", creating reason for confusion. Static key management mode uses fixed, built-in keys. Dynamic key management mode allows keys to be updated in production to handle security updates without firmware rebuilds. Define a function named plpks_get_sb_keymgmt_mode() to retrieve the key management mode based on the existence of the SB_VERSION property in the firmware. Set the secvar format property to either "ibm,plpks-sb-v<version>" or "ibm,plpks-sb-v0" based on the key management mode, and return the length of the secvar format property. Co-developed-by: Souradeep <soura@imap.linux.ibm.com> Signed-off-by: Souradeep <soura@imap.linux.ibm.com> Signed-off-by: Srish Srinivasan <ssrish@linux.ibm.com> Tested-by: R Nageswara Sastry <rnsastry@linux.ibm.com> Reviewed-by: Mimi Zohar <zohar@linux.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Nayna Jain <nayna@linux.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250610211907.101384-2-ssrish@linux.ibm.com
2025-07-09(powerpc/512) Fix possible `dma_unmap_single()` on uninitialized pointerThomas Fourier
If the device configuration fails (if `dma_dev->device_config()`), `sg_dma_address(&sg)` is not initialized and the jump to `err_dma_prep` leads to calling `dma_unmap_single()` on `sg_dma_address(&sg)`. Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250610142918.169540-2-fourier.thomas@gmail.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-30 12:44:29 +0000