| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2019-05-16 | RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs | Yash Shah | |
| The driver currently supports only SiFive FU540-C000 platform. The initial version of L2 cache controller driver includes: - Initial configuration reporting at boot up. - Support for ECC related functionality. Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> | |||
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index : linux/linux-stable.git | |
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