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2014-05-30MIPS: Add MSI support for XLP9XXGanesan Ramalingam
In XLP9XX, the interrupt routing table for MSI-X has been moved to the PCIe controller's config space from PIC. There are also 32 MSI-X interrupts available per link on XLP9XX. Update XLP MSI/MSI-X code to handle this. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: g@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6912/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-01-24MIPS: Netlogic: XLP9XX PIC updatesJayachandran C
Functions for the XLP9XX interrupt table entry format and other PIC register changes. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6279/
2014-01-24MIPS: Netlogic: Add MSI support for XLPJayachandran C
Add MSI chip and MSIX chip definitions. For MSI, we map the link interrupt to a MSI link IRQ which will do a second level of dispatch based on the MSI status register. The MSI chip definitions use the MSI enable register to enable and disable the MSI irqs. For MSI-X, we split the 32 available MSI-X vectors across the four PCIe links (8 each). These PIC interrupts generate an IRQ per link which uses a second level dispatch as well. The MSI-X chip definition uses the standard functions to enable and disable interrupts. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6270/
2013-09-03MIPS: Netlogic: XLP2XX CPU and PIC frequencyGanesan Ramalingam
Add code to calculate the CPU and PIC frequency for XLP2XX SoCs. Since the PIC frequency on XLP2XX can be configured, add a new macro pic_timer_freq() to be used in netlogic/common/time.c. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5701/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-13MIPS: Netlogic: Fix sign extension in PIC writeJayachandran C
This does not cause a problem yet, but we do not want to write 1 to reserved bits. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5424/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: Netlogic: Avoid using fixed PIC IRT indexJayachandran C
The index for a device interrupt in the PIC interrupt routing table changes for different chips in the XLP family. Avoid using the fixed entries and derive the index value from the SoC device header. Add workarounds for some devices which do not report the IRT index correctly. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5025/ Acked-by: John Crispin <blogic@openwrt.org>
2013-02-21Merge branch 'mips-next-3.9' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
2013-02-17MIPS: Netlogic: Use PIC timer as a clocksourceJayachandran C
The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC frequencey. One of these can be used as a clocksource to provide timestamps that is common across cores. This can be used in place of the count/compare clocksource which is per-CPU. On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits of the PIC counter. On XLP, the whole 64-bit can be used. Provide common macros and functions for PIC timer registers on XLR/XLS and XLP, and use them to register a PIC clocksource. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4786/ Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09MIPS: Netlogic: PIC IRQ handling update for multi-chipJayachandran C
Create struct nlm_pic_irq for interrupts handled by the PIC. This simplifies IRQ handling for multi-SoC as well as the single SoC cases. Also split the setup of percpu and PIC interrupts so that we can configure the PIC interrupts for every node. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4467 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09MIPS: Netlogic: Support for multi-chip configurationJayachandran C
Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a coherent multi-node system. Each SoC has its own set of on-chip devices including PIC. To support this, add a per SoC stucture and use it for the PIC and SYS block addresses instead of using global variables. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4469 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09MIPS: Netlogic: Update PIC access functionsJayachandran C
Remove unused and trivial PIC accesss functions, update nlm_pic_send_ipi() and nlm_set_irt_to_cpu() to use similar logic, and use correct type for reg in nlm_pic_disable_irt(). Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4463 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09MIPS: Netlogic: Fix interrupt table entry initJayachandran C
Used the hardware thread id passed in while writing to IRT in nlm_pic_init_irt() Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4465 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-07-24MIPS: Netlogic: USB support for XLPGanesan Ramalingam
The XLP USB controller appears as a device on the internal SoC PCIe bus, the block has 2 EHCI blocks and 4 OHCI blocks. Change are to: * Add files netlogic/xlp/usb-init.c and asm/netlogic/xlp-hal/usb.h to initialize the USB controller and define PCI fixups. The PCI fixups are to setup interrupts and DMA mask. * Update include/asm/xlp-hal/{iomap.h,pic.h,xlp.h} to add interrupt mapping for EHCI/OHCI interrupts. Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3756/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: Netlogic: Add XLP platform files for XLP SoCJayachandran C
- Update common files to support XLP. - Add arch/mips/include/asm/netlogic/xlp-hal for register definitions and access macros - Add arch/mips/netlogic/xlp/ for XLP specific files. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2967/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>