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2022-12-01ARM: dts: omap: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: omap3-beagle-ab4.dtb: leds: 'heartbeat', 'mmc', 'pmu_stat' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20221127203034.54092-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-01ARM: dts: logicpd: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: logicpd-torpedo-37xx-devkit.dtb: leds: 'user0' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20221125144122.476962-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-11-30Merge tag 'clk-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk fixes from Stephen Boyd: "A set of clk driver fixes that resolve issues for various SoCs. Most of these are incorrect clk data, like bad parent descriptions. When the clk tree is improperly described things don't work, like USB and UFS controllers, because clk frequencies are wonky. Here are the extra details: - Fix the parent of UFS reference clks on Qualcomm SC8280XP so that UFS works properly - Fix the clk ID for USB on AT91 RM9200 so the USB driver continues to probe - Stop using of_device_get_match_data() on the wrong device for a Samsung Exynos driver so it gets the proper clk data - Fix ExynosAutov9 binding - Fix the parent of the div4 clk on Exynos7885 - Stop calling runtime PM APIs from the Qualcomm GDSC driver directly as it leads to a lockdep splat and is just plain wrong because it violates runtime PM semantics by calling runtime PM APIs when the device has been runtime PM disabled" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: qcom: gcc-sc8280xp: add cxo as parent for three ufs ref clks ARM: at91: rm9200: fix usb device clock id clk: samsung: Revert "clk: samsung: exynos-clkout: Use of_device_get_match_data()" dt-bindings: clock: exynosautov9: fix reference to CMU_FSYS1 clk: qcom: gdsc: Remove direct runtime PM calls clk: samsung: exynos7885: Correct "div4" clock parents
2022-12-01mm, slob: rename CONFIG_SLOB to CONFIG_SLOB_DEPRECATEDVlastimil Babka
As explained in [1], we would like to remove SLOB if possible. - There are no known users that need its somewhat lower memory footprint so much that they cannot handle SLUB (after some modifications by the previous patches) instead. - It is an extra maintenance burden, and a number of features are incompatible with it. - It blocks the API improvement of allowing kfree() on objects allocated via kmem_cache_alloc(). As the first step, rename the CONFIG_SLOB option in the slab allocator configuration choice to CONFIG_SLOB_DEPRECATED. Add CONFIG_SLOB depending on CONFIG_SLOB_DEPRECATED as an internal option to avoid code churn. This will cause existing .config files and defconfigs with CONFIG_SLOB=y to silently switch to the default (and recommended replacement) SLUB, while still allowing SLOB to be configured by anyone that notices and needs it. But those should contact the slab maintainers and linux-mm@kvack.org as explained in the updated help. With no valid objections, the plan is to update the existing defconfigs to SLUB and remove SLOB in a few cycles. To make SLUB more suitable replacement for SLOB, a CONFIG_SLUB_TINY option was introduced to limit SLUB's memory overhead. There is a number of defconfigs specifying CONFIG_SLOB=y. As part of this patch, update them to select CONFIG_SLUB and CONFIG_SLUB_TINY. [1] https://lore.kernel.org/all/b35c3f82-f67b-2103-7d82-7a7ba7521439@suse.cz/ Cc: Russell King <linux@armlinux.org.uk> Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Cc: Stafford Horne <shorne@gmail.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Josh Triplett <josh@joshtriplett.org> Cc: Conor Dooley <conor@kernel.org> Cc: Damien Le Moal <damien.lemoal@opensource.wdc.com> Cc: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi> # OMAP1 Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> # riscv k210 Acked-by: Arnd Bergmann <arnd@arndb.de> # arm Acked-by: Roman Gushchin <roman.gushchin@linux.dev> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Reviewed-by: Christoph Lameter <cl@linux.com>
2022-11-30Merge tag 'at91-defconfig-6.2-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 6.2 #2 It contains: - updates for defconfigs to use the new CONFIG_VIDEO_MICROCHIP_ISC, CONFIG_VIDEO_MICROCHIP_XISC config flags that replaced the CONFIG_VIDEO_ATMEL_ISC, CONFIG_VIDEO_ATMEL_XISC. Drivers under CONFIG_VIDEO_ATMEL_* were moved to staging and considered deprecated. * tag 'at91-defconfig-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: multi_v7: switch to new MICROCHIP_ISC driver ARM: configs: sama5/7: switch to new MICROCHIP_ISC driver Link: https://lore.kernel.org/r/20221125142736.385654-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30Merge tag 'arm-soc/for-6.2/devicetree' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 6.2, please pull the following: - Linus adds support for the D-Link DWL-8610AP which is based upon the BCM53016 SoC and the D-Link DIR-890L routers - Maxime resolves a long standing issue affecting Raspberry Pi devices by switching entirely over to the VPU firmware clock provider rather than mixing the "bare metal" clock driver and VPU - Rafal corrects the description of the TP-Link router partitions to use the "safeloader" partition parser - Stefan fixes a number of invalid underscores in the bcm283x DTS files and also moves the ACT LED into a separate DTS include file for better re-use - Krzysztof aligns the LEDs DT nodes to the proper schema format - Pierre adds missing cache properties to various SoCs * tag 'arm-soc/for-6.2/devicetree' of https://github.com/Broadcom/stblinux: arm: dts: Update cache properties for broadcom ARM: dts: broadcom: align LED node names with dtschema ARM: dts: bcm283x: Move ACT LED into separate dtsi ARM: dts: bcm283x: Fix underscores in node names ARM: dts: BCM5301X: Correct description of TP-Link partitions ARM: dts: bcm47094: Add devicetree for D-Link DIR-890L dt-bindings: ARM: add bindings for the D-Link DIR-890L ARM: dts: bcm2835-rpi: Use firmware clocks for display ARM: dts: bcm283x: Remove bcm2835-rpi-common.dtsi from SoC DTSI ARM: dts: bcm53016: Add devicetree for D-Link DWL-8610AP dt-bindings: ARM: add bindings for the D-Link DWL-8610AP Link: https://lore.kernel.org/r/20221129191755.542584-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30Merge tag 'juno-updates-6.2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt Armv8 Juno/FVP updates for v6.2 Just few addtions including updates to cache information on various platforms to align well with the bindings, addition of cache information on FVP Rev C model, addition of SPE to Foundation model and updates to LED node names. * tag 'juno-updates-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: ARM: dts: vexpress: align LED node names with dtschema arm64: dts: fvp: Add information about L1 and L2 caches arm64: dts: fvp: Add SPE to Foundation FVP arm64: dts: Update cache properties for Arm Ltd platforms arm64: dts: juno: Add thermal critical trip points Link: https://lore.kernel.org/r/20221129115111.2464233-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30Revert "ARM: dts: stm32: add fake interrupt propoerty for ASync notif - ↵Alexandre Torgue
TEMP/TO REMOVE" This reverts commit fb4ce97d9c5daafe100a83670c697b92c9d1bb45. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Link: https://lore.kernel.org/r/20221128133339.25055-1-alexandre.torgue@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30Merge tag 'mvebu-dt-6.2-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt mvebu dt for 6.2 (part 1) Fix assigned-addresses for every PCIe Root Port Align LED node names with dtschema Add a new kirkwood based board: Zyxel NSA310S Fix compatible string for gpios for Armada 38x and 39x Add interrupts for watchdog on Armada XP Turris Omnia (Armada 385 based): - Add switch port 6 node - Add ethernet aliases Switch to using gpiod API in pm-board code * tag 'mvebu-dt-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: dts: armada-xp: add interrupts for watchdog ARM: dts: armada: align LED node names with dtschema ARM: mvebu: switch to using gpiod API in pm-board code ARM: dts: armada-39x: Fix compatible string for gpios ARM: dts: armada-38x: Fix compatible string for gpios ARM: dts: turris-omnia: Add switch port 6 node ARM: dts: turris-omnia: Add ethernet aliases ARM: dts: armada-39x: Fix assigned-addresses for every PCIe Root Port ARM: dts: armada-38x: Fix assigned-addresses for every PCIe Root Port ARM: dts: armada-375: Fix assigned-addresses for every PCIe Root Port ARM: dts: armada-xp: Fix assigned-addresses for every PCIe Root Port ARM: dts: armada-370: Fix assigned-addresses for every PCIe Root Port ARM: dts: dove: Fix assigned-addresses for every PCIe Root Port ARM: dts: kirkwood: Add Zyxel NSA310S board Link: https://lore.kernel.org/r/87cz979adf.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30Merge tag 'at91-dt-6.2-3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt AT91 DT for 6.2 #3 It contains: - proper power rail description for SDMMC devices available on SAMA7G5-EK - OTP controller has been added for LAN966X devices * tag 'at91-dt-6.2-3' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: lan966x: Add otp support ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1 Link: https://lore.kernel.org/r/20221125140525.384928-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30Merge tag 'musb-for-v6.2-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Devicetree related musb changes for omap3 for v6.2 Recent musb driver regressions eposed two issues for musb legacy probing. The changes to use device_set_of_node_from_dev() confuse the legacy interconnect code. And we now have to manually populate the musb core irq resources. The musb driver has a fix for these, but it's not a good long term solution. To fix the issue properly, let's just update musb to probe with ti-sysc interconnect driver with proper devicetree data. This allows dropping most of the musb driver workaround later on. And with these changes we have the omap2430 musb glue layer behaving the same way for all the SoCs using it. We need to patch the ti-sysc driver quirks, and add devicetree data to make things work. And we want to drop the legacy data too to avoid pointless warnings. As we have a musb driver workaround, these changes are not needed as fixes and can wait for the merge window. * tag 'musb-for-v6.2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Drop legacy hwmod data for omap3 otg ARM: dts: Update omap3 musb to probe with ti-sysc bus: ti-sysc: Add otg quirk flags for omap3 musb Link: https://lore.kernel.org/r/pull-1669364566-84575@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30Merge tag 'omap-for-v6.2/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Devicetree fixes for omaps for v6.2 Two devicetree fixes for omaps. These fixes are not urgent and can wait for the merge window: - Fix up the node names and missing #pwm-cells property for ti,omap-dmtimer-pwm to avoid warnings when the the related yaml binding gets merged - Fix TDA998x port addressing * tag 'omap-for-v6.2/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Unify pwm-omap-dmtimer node names ARM: dts: am335x: Fix TDA998x ports addressing ARM: dts: am335x-pcm-953: Define fixed regulators in root node Link: https://lore.kernel.org/r/pull-1669363695-856423@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-29Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
tools/lib/bpf/ringbuf.c 927cbb478adf ("libbpf: Handle size overflow for ringbuf mmap") b486d19a0ab0 ("libbpf: checkpatch: Fixed code alignments in ringbuf.c") https://lore.kernel.org/all/20221121122707.44d1446a@canb.auug.org.au/ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-11-29ARM: dts: socfpga: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: socfpga_arria5_socdk.dtb: leds: 'hps0', 'hps1', 'hps2', 'hps3' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-11-29Merge tag 'at91-fixes-6.1-3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes AT91 fixes for 6.1 #3 It contains: - build fix for SAMA5D3 devices which don't have an L2 cache and due to this accesssing outer_cache.write_sec in sama5_secure_cache_init() could throw undefined reference to `outer_cache' if CONFIG_OUTER_CACHE is disabled from common sama5_defconfig. * tag 'at91-fixes-6.1-3' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: fix build for SAMA5D3 w/o L2 cache Link: https://lore.kernel.org/r/20221125093521.382105-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-29ARM: 9277/1: Make the dumped instructions are consistent with the ↵Zhen Lei
disassembled ones In ARM, the mapping of instruction memory is always little-endian, except some BE-32 supported ARM architectures. Such as ARMv7-R, its instruction endianness may be BE-32. Of course, its data endianness will also be BE-32 mode. Due to two negatives make a positive, the instruction stored in the register after reading is in little-endian format. But for the case of BE-8, the instruction endianness is LE, the instruction stored in the register after reading is in big-endian format, which is inconsistent with the disassembled one. For example: The content of disassembly: c0429ee8: e3500000 cmp r0, #0 c0429eec: 159f2044 ldrne r2, [pc, #68] c0429ef0: 108f2002 addne r2, pc, r2 c0429ef4: 1882000a stmne r2, {r1, r3} c0429ef8: e7f000f0 udf #0 The output of undefined instruction exception: Internal error: Oops - undefined instruction: 0 [#1] SMP ARM ... ... Code: 000050e3 44209f15 02208f10 0a008218 (f000f0e7) This inconveniences the checking of instructions. What's worse is that, for somebody who don't know about this, might think the instructions are all broken. So, when CONFIG_CPU_ENDIAN_BE8=y, let's convert the instructions to little-endian format before they are printed. The conversion result is as follows: Code: e3500000 159f2044 108f2002 1882000a (e7f000f0) Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28arm: dts: Update cache properties for broadcomPierre Gondois
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://lore.kernel.org/r/20221122163208.3810985-2-pierre.gondois@arm.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-11-28ARM: dts: broadcom: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: bcm4708-asus-rt-ac68u.dtb: leds: 'logo', 'power', 'usb2', 'usb3' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221125144128.477059-1-krzysztof.kozlowski@linaro.org Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-11-28ARM: 9276/1: Refactor dump_instr()Zhen Lei
1. Rename local variable 'val16' to 'tmp'. So that the processing statements of thumb and arm can be aligned. 2. Fix two sparse check warnings: (add __user for type conversion) warning: incorrect type in initializer (different address spaces) expected unsigned short [noderef] __user *register __p got unsigned short [usertype] * 3. Prepare for the next patch to avoid repeated judgment. Before: if (!user_mode(regs)) { if (thumb) else } else { if (thumb) else } After: if (thumb) { if (user_mode(regs)) else } else { if (user_mode(regs)) else } Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9275/1: Drop '-mthumb' from AFLAGS_ISANathan Chancellor
When building with CONFIG_THUMB2_KERNEL=y + a version of clang from Debian using CROSS_COMPILE=arm-linux-gnueabihf-, the following warning occurs frequently: <built-in>:383:9: warning: '__thumb2__' macro redefined [-Wmacro-redefined] #define __thumb2__ 2 ^ <built-in>:353:9: note: previous definition is here #define __thumb2__ 1 ^ 1 warning generated. Debian carries a downstream patch that changes the default CPU of the arm-linux-gnueabihf target from 'arm1176jzf-s' (v6) to 'cortex-a7' (v7). As a result, '-mthumb' defines both '__thumb__' and '__thumb2__'. The define of '__thumb2__' via the command line was purposefully added to catch a situation like this. In a similar vein as commit 26b12e084bce ("ARM: 9264/1: only use -mtp=cp15 for the compiler"), do not add '-mthumb' to AFLAGS_ISA, as it is already passed to the assembler via '-Wa,-mthumb' and '__thumb2__' is already defined for preprocessing. Link: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/-/raw/622dbcbd40b316ed3905a2d25d9623544a06e6b1/debian/patches/930008-arm.diff Fixes: 1d2e9b67b001 ("ARM: 9265/1: pass -march= only to compiler") Reported-by: "kernelci.org bot" <bot@kernelci.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9274/1: Add hwcap for Speculative Store Bypassing SafeAmit Daniel Kachhap
Speculative Store Bypassing Safe(FEAT_SSBS) is a feature present in AArch32 state for Armv8 and is represented by ID_PFR2_EL1.SSBS identification register. This feature denotes the presence of PSTATE.ssbs bit and hence adding a hwcap will enable the userspace to check it before trying to set/unset this PSTATE. This commit adds the ID feature bit detection, and uses elf_hwcap2 accordingly. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9273/1: Add hwcap for Speculation Barrier(SB)Amit Daniel Kachhap
Speculation Barrier(FEAT_SB) is a feature present in AArch32 state for Armv8 and is represented by ISAR6.SB identification register. This feature denotes the presence of SB instruction and hence adding a hwcap will enable the userspace to check it before trying to use this instruction. This commit adds the ID feature bit detection, and uses elf_hwcap2 accordingly. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9272/1: vfp: Add hwcap for FEAT_AA32I8MMAmit Daniel Kachhap
Int8 matrix multiplication (FEAT_AA32I8MM) is a feature present in AArch32 state for Armv8 and is represented by ISAR6.I8MM identification register. This feature denotes the presence of VSMMLA, VSUDOT, VUMMLA, VUSMMLA and VUSDOT instructions and hence adding a hwcap will enable the userspace to check it before trying to use those instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9271/1: vfp: Add hwcap for FEAT_AA32BF16Amit Daniel Kachhap
Advanced SIMD BFloat16 (FEAT_AA32BF16) is a feature present in AArch32 state for Armv8 and is represented by ISAR6.BF16 identification register. This feature denotes the presence of VCVT, VCVTB, VCVTT, VDOT, VFMAB, VFMAT and VMMLA instructions and hence adding a hwcap will enable the userspace to check it before trying to use those instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9270/1: vfp: Add hwcap for FEAT_FHMAmit Daniel Kachhap
Floating-point half-precision multiplication (FHM) is a feature present in AArch32 state for Armv8 and is represented by ISAR6.FHM identification register. This feature denotes the presence of VFMAL and VMFSL instructions and hence adding a hwcap will enable the userspace to check it before trying to use those instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9269/1: vfp: Add hwcap for FEAT_DotProdAmit Daniel Kachhap
Advanced Dot product is a feature present in AArch32 state for Armv8 and is represented by ISAR6 identification register. This feature denotes the presence of UDOT and SDOT instructions and hence adding a hwcap will enable the userspace to check it before trying to use those instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9268/1: vfp: Add hwcap FPHP and ASIMDHP for FEAT_FP16Amit Daniel Kachhap
Floating point half-precision (FPHP) and Advanced SIMD half-precision (ASIMDHP) are VFP features (FEAT_FP16) represented by MVFR1 identification register. These capabilities can optionally exist with VFPv3 and mandatory with VFPv4. Both these new features exist for Armv8 architecture in AArch32 state. These hwcaps may be useful for the userspace to add conditional check before trying to use FEAT_FP16 feature specific instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: 9267/1: Define Armv8 registers in AArch32 stateAmit Daniel Kachhap
AArch32 Instruction Set Attribute Register 6 (ID_ISAR6_EL1) and AArch32 Processor Feature Register 2 (ID_PFR2_EL1) identifies some new features for the Armv8 architecture. This registers will be utilized to add hwcaps for those cpu features. These registers are marked as reserved for Armv7 and should be a RAZ. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28ARM: dts: armada-xp: add interrupts for watchdogChris Packham
The first interrupt is for the regular watchdog timeout. Normally the RSTOUT line will trigger a reset before this interrupt fires but on systems with a non-standard reset it may still trigger. The second interrupt is for a timer1 which is used as a pre-timeout for the watchdog. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: armada-370-seagate-personal-cloud.dtb: gpio-leds: 'red-sata0' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: mvebu: switch to using gpiod API in pm-board codeDmitry Torokhov
This switches PM code to use the newer gpiod API instead of legacy gpio API that we want to retire. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada-39x: Fix compatible string for gpiosPali Rohár
Armada 39x supports per CPU interrupts for gpios, like Armada XP. So add compatible string "marvell,armadaxp-gpio" for Armada 39x GPIO nodes. Driver gpio-mvebu.c which handles both pre-XP and XP variants already provides support for per CPU interrupts on XP and newer variants. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: d81a914fc630 ("ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's") Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada-38x: Fix compatible string for gpiosPali Rohár
Armada 38x supports per CPU interrupts for gpios, like Armada XP. Pre-XP variants like Armada 370 do not support per CPU interrupts for gpios. So change compatible string for Armada 38x from "marvell,armada-370-gpio" which indicates pre-XP variant to "marvell,armadaxp-gpio" which indicates XP variant or new. Driver gpio-mvebu.c which handles both pre-XP and XP variants already provides support for per CPU interrupts on XP and newer variants. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 7cb2acb3fbae ("ARM: dts: mvebu: Add PWM properties for armada-38x") Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: turris-omnia: Add switch port 6 nodePali Rohár
Switch port 6 is connected to eth0, so add appropriate device tree node for it. Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: turris-omnia: Add ethernet aliasesPali Rohár
This allows bootloader to correctly pass MAC addresses used by bootloader to individual interfaces into kernel device tree. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia") Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada-39x: Fix assigned-addresses for every PCIe Root PortPali Rohár
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port (PCI-to-PCI bridge) should match BDF in address part in that DT node name as specified resource belongs to Marvell PCIe Root Port itself. Fixes: 538da83ddbea ("ARM: mvebu: add Device Tree files for Armada 39x SoC and board") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada-38x: Fix assigned-addresses for every PCIe Root PortPali Rohár
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port (PCI-to-PCI bridge) should match BDF in address part in that DT node name as specified resource belongs to Marvell PCIe Root Port itself. Fixes: 0d3d96ab0059 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada-375: Fix assigned-addresses for every PCIe Root PortPali Rohár
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port (PCI-to-PCI bridge) should match BDF in address part in that DT node name as specified resource belongs to Marvell PCIe Root Port itself. Fixes: 4de59085091f ("ARM: mvebu: add Device Tree description of the Armada 375 SoC") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada-xp: Fix assigned-addresses for every PCIe Root PortPali Rohár
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port (PCI-to-PCI bridge) should match BDF in address part in that DT node name as specified resource belongs to Marvell PCIe Root Port itself. Fixes: 9d8f44f02d4a ("arm: mvebu: add PCIe Device Tree informations for Armada XP") Fixes: 12b69a599745 ("ARM: mvebu: second PCIe unit of Armada XP mv78230 is only x1 capable") Fixes: 2163e61c92d9 ("ARM: mvebu: fix second and third PCIe unit of Armada XP mv78260") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: armada-370: Fix assigned-addresses for every PCIe Root PortPali Rohár
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port (PCI-to-PCI bridge) should match BDF in address part in that DT node name as specified resource belongs to Marvell PCIe Root Port itself. Fixes: a09a0b7c6ff1 ("arm: mvebu: add PCIe Device Tree informations for Armada 370") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: dove: Fix assigned-addresses for every PCIe Root PortPali Rohár
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port (PCI-to-PCI bridge) should match BDF in address part in that DT node name as specified resource belongs to Marvell PCIe Root Port itself. Fixes: 74ecaa403a74 ("ARM: dove: add PCIe controllers to SoC DT") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28ARM: dts: kirkwood: Add Zyxel NSA310S boardPawel Dembicki
Zyxel NSA310S is a NAS based on Marvell kirkwood SoC. Specification: - Processor Marvell 88F6702 1 GHz - 256MB RAM - 128MB NAND - 1x GBE LAN port (PHY: Marvell 88E1318) - 2x USB 2.0 - 1x SATA - 3x button - 7x leds - serial on J1 connector (115200 8N1) (GND-NOPIN-RX-TX-VCC) Tested-by: Tony Dinh <mibodhi@gmail.com> Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Acked-by: Adam Baker <linux@baker-net.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-25ARM: dts: vexpress: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern. vexpress-v2p-ca9.dtb: leds: 'user1', 'user2', 'user3', 'user4', 'user5', 'user6', 'user7', 'user8' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221125144112.476817-1-krzysztof.kozlowski@linaro.org Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-11-25ARM: configs: multi_v7: switch to new MICROCHIP_ISC driverEugen Hristev
The ATMEL_ISC and ATMEL_XISC have been deprecated and moved to staging. Use the new MICROCHIP_ISC/MICROCHIP_XISC symbols which are the replacement drivers. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221125130646.454084-2-eugen.hristev@microchip.com
2022-11-25ARM: configs: sama5/7: switch to new MICROCHIP_ISC driverEugen Hristev
The ATMEL_ISC and ATMEL_XISC have been deprecated and moved to staging. Use the new MICROCHIP_ISC/MICROCHIP_XISC symbols which are the replacement drivers. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221125130646.454084-1-eugen.hristev@microchip.com
2022-11-25crypto: arm/nhpoly1305 - eliminate unnecessary CFI wrapperEric Biggers
The arm architecture doesn't support CFI yet, and even if it did, the new CFI implementation supports indirect calls to assembly functions. Therefore, there's no need to use a wrapper function for nh_neon(). Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Sami Tolvanen <samitolvanen@google.com> Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-11-25ARM: dts: lan966x: Add otp supportHoratiu Vultur
Add OTP (one time programmable) support. The both lan966x SocS (lan9662 and lan9668) have the same OTP IP. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220916194946.2869510-1-horatiu.vultur@microchip.com
2022-11-25ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1Eugen Hristev
On this board SDMMC0 has a 1.8 signaled eMMC device powered at 3.3V. Hence, correctly describe the connected rails from the PMIC. SDMMC1 is connected to a voltage switch that can change from 3.3V to 1.8V by a hardware controlled pin. However SDMMC1 at the moment works only in 3.3V mode (default speed, no UHS-I modes), thus connect the signaling to the 3.3V rail. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> [claudiu.beznea: reshaped a bit the commit message] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221124154610.246790-1-eugen.hristev@microchip.com
2022-11-25media: ARM: dts: imx6qdl-wandboard: Drop clock-names propertyLad Prabhakar
Now that the driver has been updated to drop fetching the clk reference by name we no longer need the clock-names property in the ov5645 sensor node. This is in preparation for removal for clock-names property from the DT binding. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-11-25media: ARM: dts: imx6qdl-pico: Drop clock-names propertyLad Prabhakar
Now that the driver has been updated to drop fetching the clk reference by name we no longer need the clock-names property in the ov5645 sensor node. This is in preparation for removal for clock-names property from the DT binding. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-04 07:23:30 +0000