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Each eTSEC MAC has its own TBI (SGMII) PCS and private MDIO bus.
But due to a DTS oversight, both SGMII-compatible MACs of the LS1021 SoC
are pointing towards the same internal PCS. Therefore nobody is
controlling the internal PCS of eTSEC0.
Upon initial ndo_open, the SGMII link is ok by virtue of U-boot
initialization. But upon an ifdown/ifup sequence, the code path from
ndo_open -> init_phy -> gfar_configure_serdes does not get executed for
the PCS of eTSEC0 (and is executed twice for MAC eTSEC1). So the SGMII
link remains down for eTSEC0. On the LS1021A-TWR board, to signal this
failure condition, the PHY driver keeps printing
'803x_aneg_done: SGMII link is not ok'.
Also, it changes compatible of mdio0 to "fsl,etsec2-mdio" to match
mdio1 device.
Fixes: 055223d4d22d ("ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR")
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Replace GPLv2+ header with the SPDX identifier.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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All 4 SPI controllers on NXP LPC32xx SoC support SPI slaves discerning them
by one cell address value, set it as default to avoid duplication in board
device tree files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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NXP LPC3220 and LPC3230 SoCs do NOT contain a MAC controller, so,
since for now there is just one dtsi file for all variants of
NXP LPC32xx SoCs, it is reasonable to disable the controller
by default and enable it in device tree files of particular boards.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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The I2S controllers found on NXP LPC32xx SoCs are not yet in
use by any boards supported in upstream, disable the controllers
by default.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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This is a non-functional change, all inconsistent hexadecimal values
found in the file are now fixed.
Taking a chance to interfere into some non-functional change I add
my copyright notice for work done during the last few years.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Replace GPLv2+ header with the SPDX identifier.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Both controllers are described in lpc32xx.dtsi and there is no any
specific platform data added in the platform file.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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While the majority of platform data was moved to device tree description
the list of included header files remained untouched, the change cleans
it up to an irreducible and observable subset.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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While the UDA1380 is described in some lpc3250 device trees, there is
currently no real user of that codec. Anyway, if the codec needs a clock,
it should take it explicitly.
lpc3250_machine_init is called for all the lpc32xx machines and some are
using test1_clk (for example to strobe an HW watchdog). Overwriting
TEST_CLK_SEL prevents booting those platforms.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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This localizes the <mach/irqs.h> header to the mach-ixp4xx
directory, removes NR_IRQS and switches IXP4xx over to using
SPARSE_IRQ.
This is a prerequisite for DT support.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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All IXP4xx devices except the beeper passes the IRQ as a
resource, augment the NSLU2 beeper to do the same.
This is a prerequisite for SPARSE_IRQ.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This rewrites the IXP4xx to use MULTI_IRQ_HANDLER and
create an irqdomain for the irqchip in the platform. We
convert the timer to request the interrupt like any other
driver in the process.
We bump all IRQs to 16+offset to avoid using IRQ 0 and
set NR_IRQS to 512 (the default for most systems).
This conveniently fits with the first 16 IRQs being
pre-allocated when using SPARSE_IRQ.
This is a prerequisite for SPARSE_IRQ and DT boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Make the anon_inodes facility unconditional so that it can be used by core
VFS code and pidfd code.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
[christian@brauner.io: adapt commit message to mention pidfds]
Signed-off-by: Christian Brauner <christian@brauner.io>
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The "event counter" was removed from rseq before it was merged upstream.
However, a few comments in the source code still refer to it. Adapt the
comments to match reality.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Ben Maurer <bmaurer@fb.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Lameter <cl@linux.com>
Cc: Dave Watson <davejwatson@fb.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Joel Fernandes <joelaf@google.com>
Cc: Josh Triplett <josh@joshtriplett.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michael Kerrisk <mtk.manpages@gmail.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Paul Turner <pjt@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-api@vger.kernel.org
Link: http://lkml.kernel.org/r/20190305194755.2602-2-mathieu.desnoyers@efficios.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Currently, the internal vcpu finalization functions use a different
name ("what") for the feature parameter than the name ("feature")
used in the documentation.
To avoid future confusion, this patch converts everything to use
the name "feature" consistently.
No functional change.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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The vcpu finalization stubs kvm_arm_vcpu_finalize() and
kvm_arm_vcpu_is_finalized() are currently #defines for ARM, which
limits the type-checking that the compiler can do at runtime.
The only reason for them to be #defines was to avoid reliance on
the definition of struct kvm_vcpu, which is not available here due
to circular #include problems. However, because these are stubs
containing no code, they don't need the definition of struct
kvm_vcpu after all; only a declaration is needed (which is
available already).
So in the interests of cleanliness, this patch converts them to
inline functions.
No functional change.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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The introduction of kvm_arm_init_arch_resources() looks like
premature factoring, since nothing else uses this hook yet and it
is not clear what will use it in the future.
For now, let's not pretend that this is a general thing:
This patch simply renames the function to kvm_arm_init_sve(),
retaining the arm stub version under the new name.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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The Bananapi M3 and Cubietruck Plus both have USB OTG ports wired to the
SoC and PMIC in the same way, with the N_VBUSEN pin on the PMIC
controlling VBUS output, the PMIC's VBUS input for sensing VBUS, and
PH11 on the SoC for sensing the ID pin.
Enable OTG on both boards.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The AXP813/818 has a VBUS power input. Add a device node for it, now
that we support it.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
[wens@csie.org: Add commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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If the user-provided IV needs to be aligned to the algorithm's
alignmask, then skcipher_walk_virt() copies the IV into a new aligned
buffer walk.iv. But skcipher_walk_virt() can fail afterwards, and then
if the caller unconditionally accesses walk.iv, it's a use-after-free.
arm32 xts-aes-neonbs doesn't set an alignmask, so currently it isn't
affected by this despite unconditionally accessing walk.iv. However
this is more subtle than desired, and it was actually broken prior to
the alignmask being removed by commit cc477bf64573 ("crypto: arm/aes -
replace bit-sliced OpenSSL NEON code"). Thus, update xts-aes-neonbs to
start checking the return value of skcipher_walk_virt().
Fixes: e4e7f10bfc40 ("ARM: add support for bit sliced AES using NEON instructions")
Cc: <stable@vger.kernel.org> # v3.13+
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add support for ACTMON on Tegra30. This is used to monitor activity from
different components. Based on the collected statistics, the rate at
which the external memory needs to be clocked can be derived.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Turned out that the actual bug was in the Memory Controller driver
that programmed shadowed registers without latching the new values
and then there was a bug on EMEM arbitration configuration calculation
that results in a wrong value being latched on resume from suspend.
The Memory Controller has been fixed properly now, hence the workaround
patch could be reverted safely.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra20/30 drivers do not handle the tick_broadcast_enter() error which
potentially could happen when CPU timer isn't permitted to be stopped.
Let's just move out the broadcasting to the CPUIDLE core by setting the
respective flag in the Tegra20/30 drivers. This patch doesn't fix any
problem because currently tick_broadcast_enter() could fail only on
ARM64, so consider this change as a minor cleanup.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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OV2640 is a detachable camera that we use to test the
Image Sensor Interface. Make it as a module, it will reduce
the kernel image size.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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MTD_NAND is large and encloses much more than what the symbol is
actually used for: raw NAND. Clarify the symbol by naming it
MTD_RAW_NAND instead.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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The software Hamming ECC correction implementation is referred as
MTD_NAND_ECC which is too generic. Rename it
MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an
SMC quirk in the Hamming implementation as
MTD_NAND_ECC_SW_HAMMING_SMC.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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There is no point in having two distinct entries, merge them and
rename the symbol for more clarity: MTD_NAND_ECC_SW_BCH
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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This adds and updates the device tree nodes for the MCDE
display controller and connects the Samsung display to
the TVK1281618 user interface board (UIB) so we get
nicely working graphics on this reference design.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds the Mali-400 block, also known as SGA500 or the
Smart Graphics Adapter, to the DBx500 DTS file. All
resources and bindings are already in place so this just
works.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Reorder bootargs parameters to make the APE6EVM board bootargs match other
boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add rw as bootargs parameter and change from ip=on to ip=dhcp to make the
Marzen board bootargs match other boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Reorder bootargs parameters to make the BockW board bootargs match other
boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add rw as bootargs parameter to make the KZM9D board bootargs match other
boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The cd-inverted property can also be expressed using the GPIO flags. Use
the active low GPIO flag to have the same semantic without the confusion.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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We try to keep the PIO nodes ordered alphabetically, but this doesn't
always work out. Let's fix it.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The I7 DTS uses an spdif-out property with an "okay" value. However, that
property isn't documented anywhere, and isn't used anywhere either.
Remove it.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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While the USB PHY Device Tree mandates that the name of the ID detect pin
should be usb0_id_det-gpios, a significant number of device tree use
usb0_id_det-gpio instead.
This was functional because the GPIO framework falls back to the gpio
suffix that is legacy, but we should fix this. Commit 2c515b0d05a9
("ARM: sunxi: Fix the USB PHY ID detect GPIO properties") was supposed to
fix this, but one fell through the cracks.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Some nodes still have pinctrl-names entry, yet they don't have any pinctrl
group anymore. Drop them.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Move the Trusted Foundations support out of arch/arm/firmware and into
drivers/firmware where most other firmware support implementations are
located.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Some 32-bit Tegra devices supported by the multiplatform ARM v7 default
configuration ship with the Trusted Foundations firmware. Enable support
for it by default.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Support for the Trusted Foundations firmware was recently moved outside
of arch/arm and now needs to be selected explicitly. Since some 32-bit
Tegra devices use this firmware, enable support for it in the default
configuration.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Most of the changes here are just symbols that are now enabled by
default, have been removed, or which have been moved around and now
appear in a different spot.
The only notable change here is that BACKLIGHT_CLASS_DEVICE is now
built-in. This is to allow BACKLIGHT_PWM to be built-in as well.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the XUSB controller to the XUSB pad controller to make
sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Parentheses in the SPDX license identifier are only used to group sub-
expressions. If there's no need for such grouping, the parentheses can
be omitted.
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Replace boiler plate licenses texts with the SPDX license identifiers in
Colibri/Apalis DTS files.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
[treding@nvidia.com: drop unneeded parentheses, keep license at X11]
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Neither the OHCI or EHCI bindings are using the phy-names property, so we
can just drop it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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