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2023-05-22ARM: dts: at91: use clock-controller name for sckc nodesClaudiu Beznea
Use clock-controller generic name for slow clock controller nodes. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230517094119.2894220-5-claudiu.beznea@microchip.com
2023-05-22ARM: dts: at91: at91sam9n12: witch sckc to new clock bindingsClaudiu Beznea
Switch slow clock controller to new clock bindings. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230517094119.2894220-4-claudiu.beznea@microchip.com
2023-05-22ARM: dts: at91: use clock-controller name for PMC nodesClaudiu Beznea
Use clock-controller generic name for PMC nodes. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230517094119.2894220-2-claudiu.beznea@microchip.com
2023-05-22ARM: dts: at91: tse850: add properties for gpio-line-namesPeter Rosin
Signal names are one-to-one copies from the schematics, except VBUS which is an unnamed signal there. Signed-off-by: Peter Rosin <peda@axentia.se> [claudiu.beznea: add 1 indentation tab before index based comment] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/32995b53-7f73-936f-a81d-5f1969f64910@axentia.se
2023-05-19Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "A mixture of compiler/static checker resolutions and a couple of MTE fixes: - Avoid erroneously marking untagged pages with PG_mte_tagged - Always reset KASAN tags for destination page in copy_page() - Mark PMU header functions 'static inline' - Fix some sparse warnings due to missing casts" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: mte: Do not set PG_mte_tagged if tags were not initialized arm64: Also reset KASAN tag if page is not PG_mte_tagged arm64: perf: Mark all accessor functions inline ARM: perf: Mark all accessor functions inline arm64: vdso: Pass (void *) to virt_to_page() arm64/mm: mark private VM_FAULT_X defines as vm_fault_t
2023-05-19Merge tag 'drm-misc-next-2023-05-11' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.5: UAPI Changes: Cross-subsystem Changes: - arch: Consolidate <asm/fb.h> Core Changes: - aperture: Ignore firmware framebuffers with non-primary devices - fbdev: Use fbdev's I/O helpers - sysfs: Expose DRM connector ID - tests: More tests for drm_rect Driver Changes: - armada: Implement fbdev emulation as a client - bridge: - fsl-ldb: Support i.MX6SX - lt9211: Remove blanking packets - lt9611: Remove blanking packets - tc358768: Implement input bus formats reporting, fix various timings and clocks settings - ti-sn65dsi86: Implement wait_hpd_asserted - nouveau: Improve NULL pointer checks before dereference - panel: - nt36523: Support Lenovo J606F - st7703: Support Anbernic RG353V-V2 - new panels: InnoLux G070ACE-L01 - sun4i: Fix MIPI-DSI dotclock - vc4: RGB Range toggle property, BT601 and BT2020 support for HDMI - vkms: Convert to drmm helpers, Add reflection and rotation support Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/2pxmxdzsk2ekjy6xvbpj67zrhtwvkkhfspuvdm5pfm5i54hed6@sooct7yq6z4w
2023-05-18arm: dts: sunxi: Add ICnova A20 ADB4006 boardLudwig Kormann
Add board support for ICnova A20 SomPi compute module on ICnova ADB4006 development board. Specification: SoM - Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz - 512MB DDR3 RAM - Fast Ethernet (Phy: Realtek RTL8201CP) ADB4006 - I2C - 2x USB 2.0 - 1x Fast Ethernet port - 1x SATA - 2x buttons (PWRON, Boot) - 2x LEDS - serial console - HDMI - µSD-Card slot - Audio Line-In / Line-Out - GPIO pinheaders https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006 https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Ludwig Kormann <ludwig.kormann@ict42.de> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230510111528.2155582-3-ludwig.kormann@ict42.de Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-05-18ARM: dts: sunxi: rename tcon's clock outputRoman Beranek
While the rate of TCON0's DCLK matches dotclock for parallel and LVDS outputs, this doesn't hold for DSI. According manuals from Allwinner, DCLK is an abbreviation of Data Clock, not dotclock, so go with that instead. Signed-off-by: Roman Beranek <me@crly.cz> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20230505052110.67514-3-me@crly.cz Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-05-18Merge tag 'net-6.4-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes from Paolo Abeni: "Including fixes from can, xfrm, bluetooth and netfilter. Current release - regressions: - ipv6: fix RCU splat in ipv6_route_seq_show() - wifi: iwlwifi: disable RFI feature Previous releases - regressions: - tcp: fix possible sk_priority leak in tcp_v4_send_reset() - tipc: do not update mtu if msg_max is too small in mtu negotiation - netfilter: fix null deref on element insertion - devlink: change per-devlink netdev notifier to static one - phylink: fix ksettings_set() ethtool call - wifi: mac80211: fortify the spinlock against deadlock by interrupt - wifi: brcmfmac: check for probe() id argument being NULL - eth: ice: - fix undersized tx_flags variable - fix ice VF reset during iavf initialization - eth: hns3: fix sending pfc frames after reset issue Previous releases - always broken: - xfrm: release all offloaded policy memory - nsh: use correct mac_offset to unwind gso skb in nsh_gso_segment() - vsock: avoid to close connected socket after the timeout - dsa: rzn1-a5psw: enable management frames for CPU port - eth: virtio_net: fix error unwinding of XDP initialization - eth: tun: fix memory leak for detached NAPI queue. Misc: - MAINTAINERS: sctp: move Neil to CREDITS" * tag 'net-6.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (107 commits) MAINTAINERS: skip CCing netdev for Bluetooth patches mdio_bus: unhide mdio_bus_init prototype bridge: always declare tunnel functions atm: hide unused procfs functions net: isa: include net/Space.h Revert "ARM: dts: stm32: add CAN support on stm32f746" netfilter: nft_set_rbtree: fix null deref on element insertion netfilter: nf_tables: fix nft_trans type confusion netfilter: conntrack: define variables exp_nat_nla_policy and any_addr with CONFIG_NF_NAT net: wwan: t7xx: Ensure init is completed before system sleep net: selftests: Fix optstring net: pcs: xpcs: fix C73 AN not getting enabled net: wwan: iosm: fix NULL pointer dereference when removing device vlan: fix a potential uninit-value in vlan_dev_hard_start_xmit() mailmap: add entries for Nikolay Aleksandrov igb: fix bit_shift to be in [1..8] range net: dsa: mv88e6xxx: Fix mv88e6393x EPC write command offset cassini: Fix a memory leak in the error handling path of cas_init_one() tun: Fix memory leak for detached NAPI queue. can: kvaser_pciefd: Disable interrupts in probe error path ...
2023-05-17ARM: dts: qcom: add missing cache propertiesKrzysztof Kozlowski
Add required cache-unified properties to fix warnings like: qcom-ipq4019-ap.dk01.1-c1.dtb: l2-cache: 'cache-unified' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416101134.95686-4-krzysztof.kozlowski@linaro.org
2023-05-17ARM: dts: qcom: msm8974: remove superfluous "input-enable"Krzysztof Kozlowski
Pin configuration property "input-enable" was used with the intention to disable the output, but this is done by default by Linux drivers. Since patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable") the property is not accepted anymore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230410181005.25853-3-krzysztof.kozlowski@linaro.org
2023-05-17ARM: dts: qcom: mdm9615: remove superfluous "input-enable"Krzysztof Kozlowski
Pin configuration property "input-enable" was used with the intention to disable the output, but this is done by default by Linux drivers. Since patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable") the property is not accepted anymore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230410181005.25853-2-krzysztof.kozlowski@linaro.org
2023-05-17ARM: dts: qcom: apq8026: remove superfluous "input-enable"Krzysztof Kozlowski
Pin configuration property "input-enable" was used with the intention to disable the output, but this is done by default by Linux drivers. Since patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable") the property is not accepted anymore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230410181005.25853-1-krzysztof.kozlowski@linaro.org
2023-05-17Revert "ARM: dts: stm32: add CAN support on stm32f746"Marc Kleine-Budde
This reverts commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6. The commit 0920ccdf41e3 ("ARM: dts: stm32: add CAN support on stm32f746") depends on the patch "dt-bindings: mfd: stm32f7: add binding definition for CAN3" [1], which is not in net/main, yet. This results in a parsing error of "stm32f746.dtsi". So revert this commit. [1] https://lore.kernel.org/all/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com> Cc: Alexandre TORGUE <alexandre.torgue@foss.st.com> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202305172108.x5acbaQG-lkp@intel.com Closes: https://lore.kernel.org/oe-kbuild-all/202305172130.eGGEUhpi-lkp@intel.com Fixes: 0920ccdf41e3 ("ARM: dts: stm32: add CAN support on stm32f746") Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20230517181950.1106697-1-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-05-17ARM: dts: stm32: fix m4_rproc references to use SCMI for stm32mp15Arnaud Pouliquen
Fixes stm32mp15*-scmi DTS files introduced in [1]: This patch fixes the node which uses the MCU reset and adds the missing HOLD_BOOT which is also handled by the SCMI reset service. This change cannot be applied as a fix on commit [1], the management of the hold boot impacts also the stm32_rproc driver. [1] 'commit 5b7e58313a77 ("ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")' Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-17ARM: dts: stm32: Update Cortex-M4 reset declarations on stm32mp15Arnaud Pouliquen
Since the introduction of the SCMI for the management of the MCU hold boot in OP-TEE, management of the hold boot by SMC call is deprecated. - Clean the st,syscfg-tz which allows to determine if the trust zone is enable. - Add reset-names properties to be able to differentiate the MCU reset and the MCU HOLD BOOT. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-17ARM: dts: armada-xp: Replace deprecated spi-gpio propertiesFabio Estevam
As stated in Documentation/devicetree/bindings/spi/spi-gpio.yaml, 'gpio-mosi' and 'gpio-sck' are deprecated properties. Use the recommeded 'mosi-gpios' and 'sck-gpios' instead. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-05-17ARM: dts: ux500: Add eSRAM nodesLinus Walleij
The U8500 has 640 KB of eSRAM, split into 5 banks of 128 KB each. Add this to the device tree, with ESRAM 0, 1+2 and 3+4 as separate devices, since these have different power domains. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230417-ux500-dma40-cleanup-v2-8-cdaa68a4b863@linaro.org
2023-05-17ARM: dts: ux500: Fix STMPE device nodesLinus Walleij
The STMPE device nodes need to be augmented to fit with current naming policies. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230508070811.965762-1-linus.walleij@linaro.org
2023-05-17ARM: dts: ux500: Disable charging on HREF boardsLinus Walleij
The HREF boards are usually used without battery and not using active charging. Disable it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230417075659.3162603-1-linus.walleij@linaro.org
2023-05-16ARM: dts: en7523: add missing cache propertiesKrzysztof Kozlowski
As all level 2 and level 3 caches are unified, add required cache-unified and cache-level properties to fix warnings like: en7523-evb.dtb: l2-cache0: 'cache-level' is a required property en7523-evb.dtb: l2-cache0: 'cache-unified' is a required property Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230423150824.118430-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-05-16ARM: dts: stm32: add STM32MP1-based Phytec boardSteffen Trumtrar
Add the Phytec STM32MP1-3 Dev board. The devboard uses a Phytec stm32m157c-som. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: add STM32MP1-based Phytec SoMSteffen Trumtrar
The Phytec STM32MP1 based SoMs feature up to 1 GB DDR3LP RAM, up to 1 GB eMMC, up to 16 MB QSPI and up to 128 GB NAND flash. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add sleep pinmux for SPI1 pins_a on stm32mp15Steffen Trumtrar
Add a sleep mux option for the SPI1 pins_a mux. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add idle/sleep pinmux for USART3 on stm32mp15Steffen Trumtrar
Add idle and sleep mux option for the USART3 pins_a. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add pinmux for USART1 pins on stm32mp15Steffen Trumtrar
Add a mux option for the USART1 pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add new pinmux for sdmmc2_d47 on stm32mp15Steffen Trumtrar
Add another option for the SDMMC_D47 pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add new pinmux for sdmmc1_b4 on stm32mp15Steffen Trumtrar
Add another option for the SDMMC_B4 pins. It is almost identical to sdmmc1_b4_pins_a but the SDMMC1_D2 pin. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add alternate pinmux for sai2b on stm32mp15Steffen Trumtrar
Add another option for the SAI2B pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add alternate pinmux for ethernet for stm32mp15Steffen Trumtrar
Add another option for the ethernet0 pins. It is almost identical to ethernet0_rgmii_pins_c apart from TXD0/1. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: use RCC macro for CRC node on stm32f746Dario Binacchi
The patch replaces the number 12 with the appropriate numerical constant already defined in the file stm32f7-rcc.h. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: perf: Mark all accessor functions inlineGeert Uytterhoeven
When just including <asm/arm_pmuv3.h>: arch/arm/include/asm/arm_pmuv3.h:110:13: error: ‘write_pmevtypern’ defined but not used [-Werror=unused-function] 110 | static void write_pmevtypern(int n, unsigned long val) | ^~~~~~~~~~~~~~~~ arch/arm/include/asm/arm_pmuv3.h:103:13: error: ‘write_pmevcntrn’ defined but not used [-Werror=unused-function] 103 | static void write_pmevcntrn(int n, unsigned long val) | ^~~~~~~~~~~~~~~ arch/arm/include/asm/arm_pmuv3.h:95:22: error: ‘read_pmevcntrn’ defined but not used [-Werror=unused-function] 95 | static unsigned long read_pmevcntrn(int n) | ^~~~~~~~~~~~~~ Fix this by adding the missing "inline" keywords to the three accessor functions that lack them. Fixes: 009d6dc87a56 ("ARM: perf: Allow the use of the PMUv3 driver on 32bit ARM") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/3a7d9bc7470aa2d85696ee9765c74f8c03fb5454.1683561482.git.geert+renesas@glider.be Signed-off-by: Will Deacon <will@kernel.org>
2023-05-16ARM: dts: stm32: Move ethernet MAC EEPROM from SoM to carrier boardsMarek Vasut
The ethernet MAC EEPROM is not populated on the SoM itself, it has to be populated on each carrier board. Move the EEPROM into the correct place in DTs, i.e. the carrier board DTs. Add label to the EEPROM too. Fixes: 7e76f82acd9e1 ("ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Replace deprecated st,hw-flow-ctrl with uart-has-rtsctsMarek Vasut
Replace deprecated st,hw-flow-ctrl with uart-has-rtscts . No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: zynq: dts: Add SCL & SDA GPIO entries for recoveryChirag Parekh
Wire i2c pinmuxing gpio recovery for zc702. Signed-off-by: Chirag Parekh <chiragp@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5eb73d1150648e782795e35c30fccb983b3e0db7.1683035557.git.michal.simek@amd.com
2023-05-16ARM: dts: stm32: remove extra space in stm32mp15xx-dkx.dtsiPatrick Delaunay
Remove unnecessary space in device tree stm32mp15xx-dkx.dtsi. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: add part number for STM32MP15xPatrick Delaunay
The STM32MP15x Device Part Number is located in the first 8 bits of OTP4, this patch add its description as the NVMEM cell. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-15ARM: dts: stm32: add CAN support on stm32f746Dario Binacchi
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration: - Dual CAN peripheral configuration: * CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory. * CAN2: Secondary bxCAN with no direct access to the SRAM memory. This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1. - Single CAN peripheral configuration: * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory. ------------------------------------------------------------------------- | features | CAN1 | CAN2 | CAN 3 | ------------------------------------------------------------------------- | SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte | ------------------------------------------------------------------------- | Filters | 26 filters shared between CAN1 & CAN2 | 14 filters | ------------------------------------------------------------------------- Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-05-15ARM: dts: stm32: add pin map for CAN controller on stm32f7Dario Binacchi
Add pin configurations for using CAN controller on stm32f7. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-05-15ARM: dts: stm32f429: put can2 in secondary modeDario Binacchi
This is a preparation patch for the upcoming support to manage CAN peripherals in single configuration. The addition ensures backwards compatibility. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-05-15ARM: smp: Switch to hotplug core state synchronizationThomas Gleixner
Switch to the CPU hotplug core state tracking and synchronization mechanim. No functional change intended. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Michael Kelley <mikelley@microsoft.com> Tested-by: Oleksandr Natalenko <oleksandr@natalenko.name> Tested-by: Helge Deller <deller@gmx.de> # parisc Tested-by: Guilherme G. Piccoli <gpiccoli@igalia.com> # Steam Deck Link: https://lore.kernel.org/r/20230512205256.635326070@linutronix.de
2023-05-15ARM: shmobile: defconfig: Refresh for v6.4-rc1Geert Uytterhoeven
Refresh the defconfig for Renesas ARM systems: - Move CONFIG_PCI_RCAR_GEN2=y (moved in commit 81c362e798d41592 ("PCI: Sort controller Kconfig entries by vendor")), - Drop CONFIG_SERIAL_8250_PCI1XXXX=n (no longer auto-enabled since commit 5d943b5d69c032de ("serial: 8250_pci1xxxx: Disable SERIAL_8250_PCI1XXXX config by default")). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/420669d925bf4a8527c80dd294568df3b0556058.1683705341.git.geert+renesas@glider.be
2023-05-15ARM: dts: armada388-clearfog: add missing phy-modesRussell King
The DSA framework has got more picky about always having a phy-mode, particularly for the CPU port. Add the missing phy-mode properties for every port which does not have an integrated PHY. Add a phy-mode property to the ethernet interface facing the switch as this was configured using SGMII - as the switch is actually using 1000base-x, let's have some consistency between the two link partners. Additionally, the cpu label has never actually been used in the binding, so remove it. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-05-15ARM: dts: imx7ulp: add address/size-cells to OCOTPKrzysztof Kozlowski
The OCOTP node should have address/size-cells so the cells can have unit address: imx7ulp-evk.dtb: efuse@410a6000: '#address-cells' is a required property imx7ulp-evk.dtb: efuse@410a6000: '#size-cells' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-05-14Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King: - fix unwinder for uleb128 case - fix kernel-doc warnings for HP Jornada 7xx - fix unbalanced stack on vfp success path * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9297/1: vfp: avoid unbalanced stack on 'success' return path ARM: 9296/1: HP Jornada 7XX: fix kernel-doc warnings ARM: 9295/1: unwind:fix unwind abort for uleb128 case
2023-05-14ARM: dts: imx6qdl-mba6: Add missing pvcie-supply regulatorAlexander Stein
This worked before by coincidence, as the regulator was probed and enabled before PCI RC probe. But probe order changed since commit 259b93b21a9f ("regulator: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in 4.14") and PCIe supply is enabled after RC. Fix this by adding the regulator to RC node. The PCIe vaux regulator still needs to be enabled unconditionally for Mini-PCIe USB-only devices. Fixes: ef3846247b41 ("ARM: dts: imx6qdl: add TQ-Systems MBa6x device trees") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-05-14ARM: dts: imx6ull-dhcor: Set and limit the mode for PMIC buck 1, 2 and 3Christoph Niedermaier
According to Renesas Electronics (formerly Dialog Semiconductor), the standard AUTO mode of the PMIC DA9061 can lead to stability problems depending on the hardware revision. It is recommended to set a defined mode such as PFM or PWM permanently. So set and limit the mode for buck 1, 2 and 3 to a fixed one. Fixes: 611b6c891e40 ("ARM: dts: imx6ull-dhcom: Add DH electronics DHCOM i.MX6ULL SoM and PDK2 board") Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-05-14ARM: dts: mba6ulx: add missing vcc supplies to i2c devicesAlexander Stein
This fixes the warnings: pca953x 3-0020: supply vcc not found, using dummy regulator pca953x 3-0021: supply vcc not found, using dummy regulator pca953x 3-0022: supply vcc not found, using dummy regulator at24 3-0051: supply vcc not found, using dummy regulator Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-05-14ARM: imx_v6_v7_defconfig: Remove firmware loader helperFabio Estevam
Testing on a imx6dl board with a QCA9377 SDIO Wifi chip shows that the QCA9377 firmware takes more than three minutes to start getting loaded, which is a very inconvenient behavior. CONFIG_FW_LOADER_USER_HELPER and CONFIG_FW_LOADER_USER_HELPER_FALLBACK were selected by commit 30fdd51be161 ("ARM: imx_v6_v7_defconfig: add CONFIG_FW_LOADER_USER_HELPER") By removing the CONFIG_FW_LOADER_USER_HELPER and CONFIG_FW_LOADER_USER_HELPER_FALLBACK options the QCA9377 firmware is loaded around 10 seconds after boot, which is the expected behavior. The motivation for commit 30fdd51be161 ("ARM: imx_v6_v7_defconfig: add CONFIG_FW_LOADER_USER_HELPER") was related to loading the SDMA firmware,and at the time of that commit, the SDMA driver was loaded as built-in. Now that the SDMA driver is selected as a kernel module, its firmware can be successfully loaded as well without the need of CONFIG_FW_LOADER_USER_HELPER and CONFIG_FW_LOADER_USER_HELPER_FALLBACK. Remove the selection of these two options. Also, successfully tested the loading of the VPU firmware without these options. Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-05-14ARM: dts: imx6ul: Add clock and PGC node to GPCStefan Wahren
According to fsl,imx-gpc.yaml the General Power Control requires a ipg clock and a Power Gating Control node. So add them to fix the dtbs_check warnings on i.MX6UL boards: gpc@20dc000: 'clocks' is a required property gpc@20dc000: 'clock-names' is a required property gpc@20dc000: 'pgc' is a required property Suggested-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-04 06:09:35 +0000