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2023-06-09arm64: dts: imx8mq: Add missing pci propertyAlexander Stein
Add the required bus-range property to PCI RC node. Fixes the warning: pcie@33c00000: 'bus-range' is a required property From schema: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mq: Fix lcdif clocksAlexander Stein
Add display APB and AXI clocks as required by bindings. This fixes the warnings: lcd-controller@30320000: clocks: [[2, 128]] is too short From schema: Documentation/devicetree/bindings/display/fsl,lcdif.yaml lcd-controller@30320000: clock-names: ['pix'] is too short From schema: Documentation/devicetree/bindings/display/fsl,lcdif.yaml Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mq: Fix lcdif compatibleAlexander Stein
"fsl,imx8mq-lcdif" is compatible to "fsl,imx6sx-lcdif", adjust the list accordingly. Fixes the dtbs_check warning: imx8mq-tqma8mq-mba8mx.dtb: lcd-controller@30320000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx8mq-lcdif', 'fsl,imx28-lcdif'] is too long 'fsl,imx8mq-lcdif' is not one of ['fsl,imx23-lcdif', 'fsl,imx28-lcdif', 'fsl,imx6sx-lcdif', 'fsl,imx8mp-lcdif', 'fsl,imx93-lcdif'] 'fsl,imx6sx-lcdif' was expected Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mp: don't initialize audio clocks from CCM nodeLucas Stach
The audio clocks should be intitialized to the correct rate by the subsystem using them. There is no need to always initialize them from the CCM node assigned-clocks property. This way boards using the audio clocks in a non- standard way can change them without first duplicating the CCM clock setup. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mm-venice: Fix GSC vdd_bat data size.Nicolas Cavallari
On these boards, vdd_bat is 16bit, not 24bit. Reading them as 24bit values yield garbage values because of the additional byte, which is a configurable fan trippoint[1]. So set their mode to mode_voltage_16bit = 3 instead of mode_voltage_24bit = 1. [1]: http://trac.gateworks.com/wiki/gsc#SystemTemperatureandVoltageMonitor Only tested on GW7100. Signed-off-by: Nicolas Cavallari <nicolas.cavallari@green-communications.fr> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mp: Add coresight trace componentsFrank Li
Add coresight trace components (ETM, ETF, ETB and Funnel). ┌───────┐ ┌───────┐ ┌───────┐ │ CPU0 ├─►│ ETM0 ├─►│ │ └───────┘ └───────┘ │ │ │ │ ┌───────┐ ┌───────┐ │ ATP │ │ CPU1 ├─►│ ETM1 ├─►│ │ └───────┘ └───────┘ │ │ │ FUNNEL│ ┌───────┐ ┌───────┐ │ │ │ CPU2 ├─►│ ETM2 ├─►│ │ └───────┘ └───────┘ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ ┌───────┐ ┌───────┐ │ │ │ M7 │ │ DSP │ │ CPU3 ├─►│ ETM3 ├─►│ │ │ │ │ │ └───────┘ └───────┘ └───┬───┘ └──┬──┘ └──┬──┘ AXI │ │ │ ▲ ▼ ▼ ▼ │ ┌───────────────────────────┐ ┌─────┐ ┌─┴──┐ │ ATP FUNNEL ├──►│ETF ├─► │ETR │ └───────────────────────────┘ └─────┘ └────┘ Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx93: add ddr performance monitor nodeXu Yang
Add performance monitor. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09Merge tag 'renesas-dts-for-v6.5-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.5 (take two) - Add IOMMU support for PCIe devices on R-Car Gen3 and RZ/G2 SoCs, - Add HSCIF1 serial port support on Renesas ULCB boards equipped with the Shimafuji Kingfisher extension, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: ulcb-kf: Add HSCIF1 node arm64: dts: renesas: ulcb-kf: Remove flow control for SCIF1 ARM: dts: iwg20d-q7-common: Fix backlight pwm specifier arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes Link: https://lore.kernel.org/r/cover.1686304614.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'amlogic-arm64-dt-for-v6.5' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT changes for v6.4: - Introduce initial DT for Amlogic C4 SoC based AW409 - add missing cache properties * tag 'amlogic-arm64-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: add support for C3 based Amlogic AW409 arm64: dts: amlogic: add missing cache properties dt-bindings: arm: amlogic: add C3 bindings Link: https://lore.kernel.org/r/37e5de2f-47f1-a3f3-f1e4-4a304192e556@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into soc/dt ARM64: DT: HiSilicon ARM64 DT updates for v6.5 - Clean up the pinctrl-single node names and correct the #size-cells of the pinctrl controller nodes * tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Unify pinctrl-single pin group nodes Link: https://lore.kernel.org/r/6482C916.1010507@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'imx-fixes-6.4-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 6.4, round 2: - Fix SPI CS pinmux for the final production version of imx8mn-beacon board. - Fix GPIOs for USDHC2 CD and WP signals on imx8qm-mek board. - Assign default clock rate for i.MX8 LPUARTs to fix UART failure. * tag 'imx-fixes-6.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8mn-beacon: Fix SPI CS pinmux arm64: dts: imx8-ss-dma: assign default clock rate for lpuarts arm64: dts: imx8qm-mek: correct GPIOs for USDHC2 CD and WP signals Link: https://lore.kernel.org/r/20230607141312.GU4199@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09arm64: dts: add support for C3 based Amlogic AW409Xianwei Zhao
Amlogic C3 is an advanced edge AI processor designed for smart IP camera applications. Add basic support for the C3 based Amlogic AW409 board, which describes the following components: CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20230515093237.2203171-1-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-08arm64: dts: st: add stm32mp257f-ev1 board supportAlexandre Torgue
Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ... Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-08arm64: dts: st: introduce stm32mp25 pinctrl filesAlexandre Torgue
Three packages exist for stm32mp25 dies. As ball-out is different between them, this patch covers those differences by introducing dedicated pinctrl dtsi files. Each dtsi pinctrl package file describes the package ball-out through gpio-ranges. Available packages are: STM32MP25xAI: 18*18/FCBGA 172 ios STM32MP25xAK: 14*14/FCBGA 144 ios STM32MP25xAL: 10*10/TFBGA 144 ios It includes also the common file used for pin groups definition. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-08arm64: dts: st: introduce stm32mp25 SoCs familyAlexandre Torgue
STM32MP25 family is composed of 4 SoCs defined as following: -STM32MP251: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ... -STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display. -STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports). A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-08arm64: dts: rockchip: Fix compatible for Bluetooth on rk3566-anbernicChris Morgan
The realtek Bluetooth module uses the same driver as the realtek,rtl8822cs-bt and the realtek,rtl8723bs-bt, however by selecting the 8723bs advanced power saving features are disabled that appear to interfere with normal operation of the bluetooth module. This change switches the compatible string to disable power saving. Without this patch evtest of a paired bluetooth controller fails, with this patch the controller operates as expected. Fixes: b6986b7920bb ("arm64: dts: rockchip: Update compatible for bluetooth") Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20230508160811.3568213-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-07arm64: dts: hisilicon: Unify pinctrl-single pin group nodesTony Lindgren
We want to unify the pinctrl-single pin group nodes to use naming "pins". Otherwise non-standad pin group names will add make dtbs checks errors when the pinctrl-single yaml binding gets merged. Let's also correct the pinctrl controller #size-cells to 0 while at it. Cc: Conor Dooley <conor+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2023-06-06arm64: dts: ti: k3-j7200-som: Enable I2CUdit Kumar
This patch enables wkup_i2c0 node in board dts file along with pin mux and speed. Also enables underneath eeprom CAV24C256WE. J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) : https://www.ti.com/lit/ds/symlink/dra821u.pdf J7200 User Guide (Section 4.3, Table 4-2) : https://www.ti.com/lit/ug/spruiw7a/spruiw7a.pdf Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230419040007.3022780-3-u-kumar1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-06arm64: dts: ti: k3-j7200: Fix physical address of pinKeerthy
wkup_pmx splits into multiple regions. Like wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12) wkup_pmx1 -> 2 pins (WKUP_PADCONFIG 14 - 15) wkup_pmx2 -> 59 pins (WKUP_PADCONFIG 26 - 84) wkup_pmx3 -> 8 pins (WKUP_PADCONFIG 93 - 100) With this split, pin offset needs to be adjusted to match with new pmx for all pins above wkup_pmx0. Example a pin under wkup_pmx1 should start from 0 instead of old offset(0x38 WKUP_PADCONFIG 14 offset) J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) : https://www.ti.com/lit/ds/symlink/dra821u.pdf Fixes: 9ae21ac445e9 ("arm64: dts: ti: k3-j7200: Fix wakeup pinmux range") Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230419040007.3022780-2-u-kumar1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-06arm64: dts: ti: k3-am62a7-sk: Describe main_uart1 and wkup_uartNishanth Menon
wkup_uart and main_uart1 on this platform is used by tifs and DM firmwares. Describe them for completeness including the pinmux. Signed-off-by: Nishanth Menon <nm@ti.com> [bb@ti.com: updated pinmux and commit subject] Signed-off-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20230425221708.549675-1-bb@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-06arm64: dts: rockchip: Add SD card support to rock-5bLucas Tanure
Add sdmmc support for Rock Pi 5B board. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230529170532.59804-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: add PMIC to rock-5bSebastian Reichel
This adds PMIC support for the Radxa ROCK 5B Signed-off-by: shengfei Xu <xsf@rock-chips.com> Co-developed-by: shengfei Xu <xsf@rock-chips.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230529170532.59804-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Assign ES8316 MCLK rate on rk3588-rock-5bCristian Ciocaltea
The I2S0_8CH_MCLKOUT clock rate on Rock 5B board defaults to 12 MHz and it is used to provide the master clock (MCLK) for the ES8316 audio codec. On sound card initialization, this limits the allowed sample rates according to the MCLK/LRCK ratios supported by the codec, which results in the following non-standard rates: 15625, 30000, 31250, 46875. Hence, the very first access of the sound card fails: Broken configuration for playback: no configurations available: Invalid argument Setting of hwparams failed: Invalid argument However, all subsequent attempts will succeed, as the audio graph card will request a correct clock frequency, based on the stream sample rate and the multiplication factor. Assign MCLK to 12.288 MHz, which allows the codec to advertise most of the standard sample rates. Fixes: 55529fe3f32d ("arm64: dts: rockchip: Add rk3588-rock-5b analog audio") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20230530181140.483936-4-cristian.ciocaltea@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Add Indiedroid Nova boardChris Morgan
The Indiedroid Nova is an SBC from a sub-brand of Ameridroid that includes the following hardware: - A 40-pin GPIO header - 2 USB-A 3.0 ports - 2 USB-A 2.0 ports - A USB-C 2.0 OTG port (used for USB power delivery) - A USB-C 3.0 port that can do display port output. - A Micro HDMI 2.1 port. - A 1GB ethernet port. - An RT8821CS based WiFi/Bluetooth module. - A user replaceable eMMC module. - An SDMMC card slot. - A MIPI DSI connector. - A MIPI CSI connector. - A 3.5mm TRRS audio jack with microphone input. - An 2 pin socket for an RTC battery. - A 4 pin socket for a debug port. - A power button (connected to PMIC), a reset button (connected to SoC reset), a boot button, and a recovery button (both connected to the ADC). - 4GB, 8GB, or 16GB of system RAM. This initial devicetree includes support for the WiFi, bluetooth, analog audio out/in, SDMMC, eMMC, RTC, UART debugging, and has the regulator values from the schematics. ADC, graphics output, GPU, USB, and wired ethernet are still pending additional upstream changes. Analog audio will require changes to handle a difference between the requested clock frequency of 12288000 and the actual clock freqency of 12287999 before it will work properly. This will be done in a subsequent patch series. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20230531161220.280744-6-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Add sdio node to rk3588Chris Morgan
Add SDIO node for rk3588/rk3588s. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230531161220.280744-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: add default pinctrl for rk3588 emmcChris Morgan
Add a default pinctrl definition for the rk3588 emmc. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230531161220.280744-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Fix rk356x PCIe register and range mappingsAndrew Powers-Holmes
The register and range mappings for the PCIe controller in Rockchip's RK356x SoCs are incorrect. Replace them with corrected values from the vendor BSP sources, updated to match current DT schema. These values are also used in u-boot. Fixes: 66b51ea7d70f ("arm64: dts: rockchip: Add rk3568 PCIe2x1 controller") Cc: stable@vger.kernel.org Signed-off-by: Andrew Powers-Holmes <aholmes@omnom.net> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Tested-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20230601132516.153934-1-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Add DT node for ADC support in RK3588Shreeya Patel
Add DT node for ADC support in RK3588. Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com> Link: https://lore.kernel.org/r/20230603185340.13838-8-shreeya.patel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: tegra: Update USB phy-name for Jetson Orin NXJon Hunter
Running 'make dtbs_check' reports the following warning for the Jetson Orin NX platform ... arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0000.dtb: usb@3550000: phy-names:1: 'usb3-0' was expected Fix this by updating the phy-names:1 to be 'usb3-0' as expected. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06arm64: tegra: Enable USB device for Jetson AGX OrinJon Hunter
Enable USB device support for the Jetson AGX Orin platform and update the mode for the usb2-0 port to be on-the-go. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06arm64: tegra: Add Tegra234 pin controllersPrathamesh Shete
Add the device tree nodes for the MAIN and AON pin controllers found on the Tegra234 family of SoCs. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06arm64: tegra: Support Jetson Orin Nano Developer KitThierry Reding
The NVIDIA Jetson Orin Nano Developer Kit is the combination of the NVIDIA Jetson Orin Nano (P3767, SKU 5) module and the P3768 carrier board. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-05Merge tag 'qcom-arm64-fixes-for-6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm ARM64 DeviceTree fixes for 6.4 Register scheme for SM8550 LLCC is corrected to avoid using the wrong register offsets. SDRAM frequency for misidentified SC7180-lite boards is handled. The datatype for Soundwire interval on SM8550 is corrected. The resource controller on SC8280XP is added to the CPU cluster power-domain to get notified to send cached sleep and wake votes before going entering the lower power states. SA8155P power-domains that differ from what's inherited from the SM8150 DeviceTree are adjusted to make the platform boot again. Remoteproc firmware paths are corrected for Sony Xperia 10 IV. Cache properties are adjusted across a range of platforms, to meet changes in the binding. Panel compatibles are corrected for Xiaomi Mi Pad 5 Pro, to match binding. Invalid dai-cells are dropped from SC7280 devices, to match binding. The incorrect removal of "input-enable" from the LPASS pinctrl node of SC8280XP was reverted, to get dmic pins in the correct state again. The incorrect input-enable property is dropped from a msm8974, mdm9615 and apq8026 to resolve a range of DT validation warnings, incorrectly picked up through the ARM64 tree. * tag 'qcom-arm64-fixes-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sm8550: Use the correct LLCC register scheme arm64: dts: qcom: sc7180-lite: Fix SDRAM freq for misidentified sc7180-lite boards arm64: dts: qcom: sm8550: use uint16 for Soundwire interval arm64: dts: qcom: Split out SA8155P and use correct RPMh power domains arm64: dts: qcom: sm6375-pdx225: Fix remoteproc firmware paths arm64: dts: qcom: add missing cache properties arm64: dts: qcom: use decimal for cache level arm64: dts: qcom: fix indentation ARM: dts: qcom: msm8974: remove superfluous "input-enable" ARM: dts: qcom: mdm9615: remove superfluous "input-enable" ARM: dts: qcom: apq8026: remove superfluous "input-enable" arm64: dts: qcom: sm8250-xiaomi-elish-csot: fix panel compatible arm64: dts: qcom: sm8250-xiaomi-elish-boe: fix panel compatible arm64: dts: qcom: sc7280-qcard: drop incorrect dai-cells from WCD938x SDW arm64: dts: qcom: sc7280-idp: drop incorrect dai-cells from WCD938x SDW arm64: dts: qcom: sc8280xp: Flush RSC sleep & wake votes arm64: dts: qcom: sc8280xp: Revert "arm64: dts: qcom: sc8280xp: remove superfluous "input-enable"" Link: https://lore.kernel.org/r/20230601142659.2246348-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-05arm64: dts: nuvoton: Add initial ma35d1 device treeJacky Huang
Add initial device tree support for Nuvoton ma35d1 SoC, including cpu, clock, reset, and serial controllers. Add reference boards som-256m and iot-512m. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-05arm64: zynqmp: Used fixed-partitions for QSPI in k26Michal Simek
Using fixed partitions is recommended way how to describe QSPI. Also add label for qspi flash memory to be able to reference it in future. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7368dc772d8dc29477a880ac2065e2ecb98cf3f5.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Add pmu interrupt-affinityRadhey Shyam Pandey
Based on dt-binding "This property should present when there is more than a single SPI" that's also case that's why explicitly specify interrupt affinity to avoid incorrect usage. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/dde2e4b5ac6018adb9bfae05bb3800af6b7c0f0e.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Set qspi tx-buswidth to 4Amit Kumar Mahapatra
All ZynqMP boards are setting up tx-buswidth to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4. Using all 4 lines will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Fix usb node drive strength and slew rateAshok Reddy Soma
As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb group pins. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Describe TI phy as ethernet-phy-idMichal Simek
TI DP83867 is using strapping based on MIO pins. Tristate setup can influence PHY address. That's why switch description with ethernet-phy-id compatible string which enable calling reset. PHY itself setups phy address after power up or reset. Phy reset is done via gpio. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Switch to amd.com emailsMichal Simek
Update my and DPs email address to match current setup. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Convert kv260-revA overlay to ASCII textMichal Simek
File was in UTF-8 format but there is no reason for it. Convert it to ASCII/plain text. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9161f4e1d449edd86e642b6769575b8e201fccf0.1684244418.git.michal.simek@amd.com
2023-06-04arm64: dts: imx8mm-phg: Add display supportFabio Estevam
The imx8mm-phg has a SN65DSI83 MIPI-DSI to LVDS bridge. Add suppor for it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: tqma8mqml: Add vcc supply to i2c eepromsAlexander Stein
Fixes the warnings: at24 0-0053: supply vcc not found, using dummy regulator at24 0-0057: supply vcc not found, using dummy regulator Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: imx8mm-evk: Add HDMI supportFabio Estevam
imx8mm-evk has a MIPI DSI port that can be used with a ADV7535 MIPI DSI to HDMI bridge. Add support for it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: imx8mn-var-som-symphony: adapt FEC pinctrl for SOMs with onboard PHYHugo Villeneuve
The VAR SOM symphony carrier board can be used with SOMs which have a soldered ethernet PHY onboard and with SOMs which don't have one. For SOMs with an onboard PHY, the PHY on the cartrier board is not used, and GPIO1_IO9 is used as a reset line to the onboard PHY. For SOMs without an onboard PHY, the PHY on the carrier board is used. For this configuration, pca9534 GPIO 5 (located on the carrier board) is used as a reset line to the PHY, and GPIO1_IO9 is not used. GPIO1_IO9 is not connected to any user-accessible pins or functions, and leaving it enabled in the mux pinctrl for both configurations is safe. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: imx8mn-var-som: add 20ms delay to ethernet regulator enableHugo Villeneuve
This commit is taken from Variscite linux kernel public git repository. Original patch author: Nate Drude <nate.d@variscite.com> See: https://github.com/varigit/linux-imx/blob/5.15-2.0.x-imx_var01/drivers/net/ethernet/freescale/fec_main.c#L3993-L4050 The ethernet phy reset was moved from the fec controller to the mdio bus, see for example: 0e825b32c033e1998d0ebaf247f5dab3c340e3bf When the fec driver managed the reset, the regulator had time to settle during the fec phy reset before calling of_mdiobus_register, which probes the mii bus for the phy id to match the correct driver. Now that the mdio bus controls the reset, the fec driver no longer has any delay between enabling the regulator and calling of_mdiobus_register. If the regulator voltage has not settled, the phy id will not be read correctly and the generic phy driver will be used. The following call tree explains in more detail: fec_probe fec_reset_phy <- no longer introduces delay after migration to mdio reset fec_enet_mii_init of_mdiobus_register of_mdiobus_register_phy fwnode_mdiobus_register_phy get_phy_device <- mii probe for phy id to match driver happens here ... fwnode_mdiobus_phy_device_register phy_device_register mdiobus_register_device mdio_device_reset <- mdio reset assert / deassert delay happens here Add a 20ms enable delay to the regulator to fix the issue. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: imx8mp-msc-sm2s: Add sound cardLuca Ceresoli
The MSC SM2-MB-EP1 carrier board for the SM2S-IMX8PLUS SMARC module has an NXP SGTL5000 audio codec connected to I2S-0 (sai2). This requires to: * add the power supplies (always on) * enable sai2 with pinmuxes * reparent the CLKOUT1 clock that feeds the codec SYS_MCLK to IMX8MP_CLK_24M in order it to generate an accurate 24 MHz rate Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: imx8mn-beacon: Migrate sound card to simple-audio-cardAdam Ford
Instead of using a custom glue layer connecting the wm8962 CODEC to the SAI3 sound-dai, migrate the sound card to simple-audio-card. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: imx8mn-beacon: Fix SPI CS pinmuxAdam Ford
The final production baseboard had a different chip select than earlier prototype boards. When the newer board was released, the SPI stopped working because the wrong pin was used in the device tree and conflicted with the UART RTS. Fix the pinmux for production boards. Fixes: 36ca3c8ccb53 ("arm64: dts: imx: Add Beacon i.MX8M Nano development kit") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-04arm64: dts: imx8mp-beacon-kit: Enable WM8962 Audio CODECAdam Ford
The baseboard has an WM8962 Audio CODEC connected to the SAI3 peripheral. The CODEC supports stereo in and out and a microphone input connected to the headphone jack. Route this CODEC through the simple-audio-card driver. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-05 08:37:31 +0000