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2025-07-02arm64: dts: renesas: Add Renesas R8A779H2 SoC supportTam Nguyen
Add support for the Renesas R-Car V4M-7 (R8A779H2) SoC, which is an updated version of the R-Car V4M (R8A779H0) SoC. Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/294ca4211c5a73942dc2ca04ae6d3c384d534f2b.1750931027.git.geert+renesas@glider.be
2025-07-02arm64: dts: renesas: Factor out Gray Hawk Single board supportGeert Uytterhoeven
Move the common parts for the Renesas Gray Hawk Single board to gray-hawk-single.dtsi, to enable future reuse. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/a3e89836fde8073ac320734cec67f89ddfa8879a.1750931027.git.geert+renesas@glider.be
2025-07-01arm64: dts: imx93-11x11-evk: remove the duplicated pinctrl_lpi2c3 nodeJoy Zou
Remove the duplicated pinctrl_lpi2c3 node. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-11x11-evk: reduce the driving strength of net RXC/TXCClark Wang
Reduce the driving strength of all Ethernet RGMII R/TXC pads according to hardware signal measurement result. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-11x11-evk: disable all realtek ethernet phy CLKOUTClark Wang
The realtek phy CLKOUT signal is not used. Disable it to save power. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-qsb/evk: add usdhc3 and lpuart5Frank Li
Add usdhc3 and lpuart5 for imx93-9x9-qsb, imx93-11x11-evk and imx93-14x14-evk, which connect to onboard wifi/bt module. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93: remove eee-broken-1000t for eqos nodeClark Wang
The "eee-broken-1000t" was added on 8mm for FEC to avoid issue of ptp sync. EQoS haven't such issue. So, remove this for EQoS phys. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-9x9-qsb: add IMU sensor supportHaibo Chen
The i.MX93 9x9 qsb has a ST LSM6DSO connected to I2C, which a is 6-axis IMU (inertial measurement unit = accelerometer & gyroscope). So add the missing parts to the DTS file. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx8mp-var-som: Add EQoS support with MaxLinear PHYStefano Radaelli
Enable the EQoS Ethernet controller on the i.MX8MP VAR-SOM with the integrated Maxlinear MXL86110 PHY. The PHY is connected to the EQOS MDIO bus at address 4. This patch adds: - EQOS controller configuration with RGMII interface. - Proper reset timings. - PHY power supply regulators. - RGMII pinmux configuration for all data, control and clock signals. - LED configuration for link status indication via the LED subsystem under /sys/class/leds/, leveraging the support implemented in the. mxl86110 PHY driver (drivers/net/phy/mxl-86110.c). Two LEDs are defined to match the LED configuration on the Variscite VAR-SOM Carrier Boards: * LED@0: Yellow, netdev trigger. * LED@1: Green, netdev trigger. The RGMII TX/RX delays are implemented in SOM via PCB passive delays, so no software delay configuration is required. Signed-off-by: Stefano Radaelli <stefano.radaelli21@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx8qm: add system controller watchdog supportThomas Richard
Add system controller watchdog support for i.MX8QM. Acked-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95: Correct the DMA interrupter number of pcie0_epRichard Zhu
Correct the DMA interrupter number of pcie0_ep from 317 to 311. Fixes: 3b1d5deb29ff ("arm64: dts: imx95: add pcie[0,1] and pcie-ep[0,1] support") Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-19x19-evk: add GPIO reset for ethphy0Wei Fang
Add GPIO reset for ethphy0. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-19x19-evk: adjust pinctrl settings for usdhc2Luke Wang
The driver strength is too high for SDR104 mode. Change the driver strength to x3 according to hardware recommendation. Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-evk: add USB3 PHY tuning propertiesXu Yang
Add USB3 PHY tuning properties for imx95-15x15-evk and imx95-19x19-evk boards according to signal measurement results. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-19x19-evk: add adc0 flexcan[1,2] i2c[2,3] uart5 spi3 and tpm3Frank Li
Add adc0 flexcan[1,2] i2c[2,3] uart5 spi3 tpm3 netc_timer and related phys regulators pinmux and related child nodes. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx93-var-som: update eqos support for MaxLinear PHYStefano Radaelli
Variscite has updated the Ethernet PHY on the VAR-SOM-MX93 from the ADIN1300BCPZ to the MaxLinear MXL86110, as documented in the August 2023 revision changelog. Link: https://variwiki.com/index.php?title=VAR-SOM-MX93_rev_changelog Update the device tree accordingly: - Drop the regulator node used to power the previously PHY. - Add support for the reset line using GPIO1_IO07 with proper timings. - Configure the PHY LEDs via the LED subsystem under /sys/class/leds/, leveraging the support implemented in the mxl86110 PHY driver (drivers/net/phy/mxl-86110.c). Two LEDs are defined to match the LED configuration on the Variscite VAR-SOM Carrier Boards: * LED@0: Yellow, netdev trigger. * LED@1: Green, netdev trigger. - Adjust the RGMII clock pad control settings to match the updated PHY requirements. These changes ensure proper PHY initialization and LED status indication for the new MaxLinear MXL86110, improving board compatibility with the latest hardware revision. Signed-off-by: Stefano Radaelli <stefano.radaelli21@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx8mp-venice-gw74xx: update name of M2SKT_WDIS2# gpioTim Harvey
The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the W_DISABLE2# pin of the M.2 socket. Update the gpio name for consistency. Fixes: 6a5d95b06d93 ("arm64: dts: imx8mp-venice-gw74xx: add M2SKT_GPIO10 gpio configuration") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx93-tqma9352: add memory nodeMarkus Niebel
Although the bootloader should fixup with real memory size, add memory node here with smallest assembled size for readability. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx93-phyboard-nash: Move ADC vref to SoMPrimoz Fiser
Move configuration for ADC voltage reference from board DTS to a SoM include file. The SoC ADC reference voltage is connected to a "VDDA_1V8" voltage node and supplied by the PMIC's BUCK5 regulator. The reference voltage is thus defined by the SoM and cannot be changed by the carrier board design and as such belongs into the SoM include file. Moreover, with this in place, customers designing own carrier boards can simply include imx93-phycore-som.dtsi and enable adc1 in their own DTS without the need to define dummy ADC vref regulator themselves anymore. Signed-off-by: Primoz Fiser <primoz.fiser@norik.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20CJonas Karlman
eMMC HS200 mode (1.8V I/O) is supported by the MMC host controller on RK3528 and works with the optional on-board eMMC module on Radxa E20C. Be explicit about HS200 support in the device tree for Radxa E20C. Fixes: 3a01b5f14a8a ("arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250621165832.2226160-1-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7Jianfeng Liu
ArmSoM Sige7 has onboard AP6275P Wi-Fi6 (PCIe) and BT5 (UART) module which is similar with Khadas Edge2. This commit enables bluetooth at uart6. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Link: https://lore.kernel.org/r/20250621135319.61766-1-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: enable PCIe on ROCK 4DNicolas Frattaroli
The RADXA ROCK 4D board has a PCIe controller connected to a flat flex connector, compatible with the one the RPi5 uses. Enable the associated combphy and pcie controller node, as well as add the remaining pinctrl definition for the reset. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250621-rk3576-rock4d-pcie-v1-1-2b33c9f12955@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Enable HDMI receiver on CM3588Valentin Hăloiu
Enable support for the HDMI input port found on FriendlyElec CM3588 and CM3588 Plus. Signed-off-by: Valentin Hăloiu <valentin.haloiu@gmail.com> Link: https://lore.kernel.org/r/20250622185814.35031-1-valentin.haloiu@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576Cristian Ciocaltea
Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS char rate via phy_configure_opts_hdmi"), the workaround of passing the rate from DW HDMI QP bridge driver via phy_set_bus_width() became partially broken, as it cannot reliably handle mode switches anymore. Attempting to fix this up at PHY level would not only introduce additional hacks, but it would also fail to adequately resolve the display issues that are a consequence of the system CRU limitations. Instead, proceed with the solution already implemented for RK3588: make use of the HDMI PHY PLL as a better suited DCLK source for VOP2. This will not only address the aforementioned problem, but it should also facilitate the proper operation of display modes up to 4K@60Hz. It's worth noting that anything above 4K@30Hz still requires high TMDS clock ratio and scrambling support, which hasn't been mainlined yet. Fixes: d74b842cab08 ("arm64: dts: rockchip: Add vop for rk3576") Cc: stable@vger.kernel.org Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Tested-By: Detlev Casanova <detlev.casanova@collabora.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-3-4b11007d8675@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576Cristian Ciocaltea
As with the RK3588 SoC, the HDMI PHY PLL on RK3576 can be used as a more accurate pixel clock source for VOP2, which is actually mandatory to ensure proper support for display modes handling. Add the missing #clock-cells property to allow using the clock provider functionality of HDMI PHY. Fixes: ad0ea230ab2a ("arm64: dts: rockchip: Add hdmi for rk3576") Cc: stable@vger.kernel.org Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-2-4b11007d8675@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Add missing fan-supply to rk3566-quartz64-aDiederik de Haas
The Quartz 64 Model-A Schematic from 20210427 on page 7 shows that the fan's power supply is provided by VCC12V_DCIN. This fixes the following warning: gpio-fan gpio_fan: supply fan not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250628142843.839150-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: use cs-gpios for spi1 on ringneckJakob Unterwurzacher
Hardware CS has a very slow rise time of about 6us, causing transmission errors when CS does not reach high between transaction. It looks like it's not driven actively when transitioning from low to high but switched to input, so only the CPU pull-up pulls it high, slowly. Transitions from high to low are fast. On the oscilloscope, CS looks like an irregular sawtooth pattern like this: _____ ^ / | ^ /| / | /| / | / | / | / | / | ___/ |___/ |_____/ |___ With cs-gpios we have a CS rise time of about 20ns, as it should be, and CS looks rectangular. This fixes the data errors when running a flashcp loop against a m25p40 spi flash. With the Rockchip 6.1 kernel we see the same slow rise time, but for some reason CS is always high for long enough to reach a solid high. The RK3399 and RK3588 SoCs use the same SPI driver, so we also checked our "Puma" (RK3399) and "Tiger" (RK3588) boards. They do not have this problem. Hardware CS rise time is good. Fixes: c484cf93f61b ("arm64: dts: rockchip: add PX30-µQ7 (Ringneck) SoM with Haikou baseboard") Cc: stable@vger.kernel.org Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de> Link: https://lore.kernel.org/r/20250627131715.1074308-1-jakob.unterwurzacher@cherry.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: exynos: gs101: switch to gs101 specific rebootAndré Draszik
gs101 (Google Pixel 6 and Pixel 6 Pro) supports cold- and warm-reboot. Cold-reset is useful because it is more secure, e.g. wiping all RAM contents, while the warm-reboot allows RAM contents to be retained across the reboot, e.g. to collect potential crash information. Add the required DT changes to switch to the gs101-specific reboot method, which knows how to issue either reset as requested by the OS. The PMIC plays a role in this as well, so mark it as 'system-power-controller', which in this case ensures that the device will wake up again after a cold-reboot, ensuring the full power-cycle is successful. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20250627-gs101-reboot3-v1-3-c3ae49657b1f@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-30arm64: dts: exynos: gs101-pixel-common: add main PMIC nodeAndré Draszik
On Pixel 6 (and Pro), a Samsung S2MPG10 is used as main PMIC, which contains the following functional blocks: * common / speedy interface * regulators * 3 clock outputs * RTC * power meters * GPIO interfaces This change enables the PMIC itself and the RTC. We're still working on the remaining parts or waiting for bindings to be merged, hence only a small subset of the functional is being enabled. The regulators fall into the same category (still being finalised), but since the binding requires a 'regulators' node, an empty node is being added to avoid validation errors at this stage. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20250627-gs101-reboot3-v1-2-c3ae49657b1f@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-30arm64: dts: exynos: gs101: ufs: add dma-coherent propertyPeter Griffin
ufs-exynos driver configures the sysreg shareability as cacheable for gs101 so we need to set the dma-coherent property so the descriptors are also allocated cacheable. This fixes the UFS stability issues we have seen with the upstream UFS driver on gs101. Fixes: 4c65d7054b4c ("arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes") Cc: stable@vger.kernel.org Suggested-by: Will McVicker <willmcvicker@google.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: Will McVicker <willmcvicker@google.com> Tested-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20250314-ufs-dma-coherent-v1-1-bdf9f9be2919@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-30arm64: dts: add big-endian property back into watchdog nodeMeng Li
Watchdog doesn't work on NXP ls1046ardb board because in commit 7c8ffc5555cb("arm64: dts: layerscape: remove big-endian for mmc nodes"), it intended to remove the big-endian from mmc node, but the big-endian of watchdog node is also removed by accident. So, add watchdog big-endian property back. In addition, add compatible string fsl,ls1046a-wdt, which allow big-endian property. Fixes: 7c8ffc5555cb ("arm64: dts: layerscape: remove big-endian for mmc nodes") Cc: stable@vger.kernel.org Signed-off-by: Meng Li <Meng.Li@windriver.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx95-15x15-evk: fix the overshoot issue of NETCWei Fang
The overshoot of MDIO, MDC, ENET1_TDx and ENET2_TDx is too high, so reduce the drive strength of these pins. Fixes: e3e8b199aff8 ("arm64: dts: imx95: Add imx95-15x15-evk support") Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx95-19x19-evk: fix the overshoot issue of NETCWei Fang
The overshoot of MDIO, MDC and ENET1_TDx is too high, so reduce the drive strength these pins. Fixes: 025cf78938c2 ("arm64: dts: imx95-19x19-evk: add ENETC 0 support") Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx95: add SMMU support for NETCWei Fang
The i.MX95 NETC supports SMMU, so add SMMU support. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: Add PDM microphone sound card supportShengjiu Wang
Add PDM micphone sound card support, configure the pinmux. This sound card supports recording sound from PDM microphone and convert the PDM format data to PCM data. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: add bt-sco sound card supportShengjiu Wang
Add bt-sco sound card, which is used by BT HFP case. It supports wb profile as default. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: add sound-wm8962 supportShengjiu Wang
Add WM8962 codec connected to SAI1 interface. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: add i2c io expander supportCarlos Song
Add i2c io expander support for imx943 evk board. Signed-off-by: Carlos Song <carlos.song@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: add lpi2c supportCarlos Song
Add lpi2c and i2c-mux support for imx943 evk board. Signed-off-by: Carlos Song <carlos.song@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx94: Add micfil and mqs device nodesShengjiu Wang
Add micfil and mqs device nodes Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-27arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-modeAndré Draszik
On gs101, the boot mode is stored both in a syscon register, and in nvmem. Add the dm-verity-device-corrupted reboot mode to the syscon-reboot- based boot mode as well, as both (nvmem & syscon) modes should be in sync. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-4-b479542eb97d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-27arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-modeAndré Draszik
Add the 'nvmem-reboot-mode' which is used to communicate a requested boot mode to the boot loader. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-3-b479542eb97d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-27arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMICAndré Draszik
On Pixel 6 (and Pro), a MAX77759 companion PMIC for USB Type-C applications is used, which contains four functional blocks (at distinct I2C addresses): * top (including GPIO & NVMEM) * charger * fuel gauge * TCPCi This change adds the PMIC and the subnodes for the GPIO expander and NVMEM, and defines the NVMEM layout. The NVMEM layout is declared such that it matches downstream's open-coded configuration [1]. Note: The pinctrl nodes are kept sorted by the 'samsung,pins' property rather than node name, as I think that makes it easier to look at and to add new nodes unambiguously in the future. Its label is prefixed with 'if' (for interface), because there are three PMICs in total in use on Pixel 6 (Pro). Link: https://android.googlesource.com/kernel/google-modules/bms/+/96e729a83817/max77759_maxq.c#67 [1] Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-2-b479542eb97d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-26arm64: dts: qcom: x1-asus-zenbook: support soundAleksandrs Vinarskis
Works: * Both speakers * Both MICs * Headphones jack, L/R channels * Headphones jack, MIC Now working/untested: * Sound over DisplayPort * Sound over HDMI Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250623113709.21184-3-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-26arm64: dts: qcom: x1-asus-zenbook: fixup GPU nodesAleksandrs Vinarskis
It appears not the latest version of the patch was merged. Align with latest upstreamed version by correcting GPU enable location and typo in GPU firmware path for x1p42100 variant. Fixes: 6516961352a1 ("arm64: dts: qcom: Add support for X1-based Asus Zenbook A14") Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250623113709.21184-2-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-26arm64: dts: renesas: r9a09g047: Add GBETH nodesJohn Madieu
Add GBETH nodes to RZ/G3E (R9A09G047) SoC DTSI. Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Tested-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Link: https://lore.kernel.org/20250623080405.355083-3-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Rename fixed regulator node namesLad Prabhakar
Rename "regulator0" to "regulator-0p8v" and "regulator1" to "regulator-3p3v" for consistency as done in the RZ/V2N EVK. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250620121045.56114-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add RAA215300 PMICLad Prabhakar
Add support for the Renesas RAA215300 PMIC to the RZ/V2N EVK. The PMIC is connected to I2C8 and uses a 32.768kHz fixed clock source (x6). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250619135539.207828-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add RAA215300 PMICLad Prabhakar
Add support for the Renesas RAA215300 PMIC to the RZ/V2H EVK. The PMIC is connected to I2C8 and uses a 32.768kHz fixed clock source (x6). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250619135539.207828-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26arm64: dts: ti: k3-j784s4-j742s2-main-common: Add ACSPCIE1 nodeParth Pancholi
The ACSPCIE1 module on TI's J784S4 SoC is capable of driving the reference clock required by the PCIe Endpoint device. It is an alternative to on- board and external reference clock generators. Add the device-tree node for the same. Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> Link: https://lore.kernel.org/r/20250513152155.1590689-1-parth105105@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-05 05:21:55 +0000