summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/rockchip
AgeCommit message (Collapse)Author
2023-12-24ARM: dts: rockchip: Add stdout-path for rk3036 kylinAndy Yan
Add stdout-path to get a uart console when system boot. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Link: https://lore.kernel.org/r/20231218105523.2478315-3-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12ARM: dts: rockchip: add hdmi-connector node to rk3036-kylinJohan Jonker
Add hdmi-connector node to comply with the inno_hdmi binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/f5bc182b-f9b6-26a8-8649-19ce33e3c0e1@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12ARM: dts: rockchip: fix rk3036 hdmi ports nodeJohan Jonker
Fix hdmi ports node so that it matches the rockchip,inno-hdmi.yaml binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/9a2afac1-ed5c-382d-02b0-b2f5f1af3abb@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-07ARM: dts: rockchip: add gpio alias for gpio dt nodesJohan Jonker
Rockchip SoC TRM, SoC datasheet and board schematics always refer to the same gpio numbers - even if not all are used for a specific board. In order to not have to re-define them for every board add the aliases to SoC dtsi files. Co-developed-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/89f2a229-9f14-d43f-c53d-5d4688e70456@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Move uart aliases to SoC dtsi for RK3128Alex Bee
SoC TRM, SoC datasheet and board schematics always refer to the same uart numbers - even if not all are used for a specific board. In order to not have to re-define them for every board move the aliases to SoC dtsi for RK3128 like it's being done for all other Rockchip ARM SoCs. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202130506.66738-5-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Move i2c aliases to SoC dtsi for RK3128Alex Bee
SoC TRM, SoC datasheet and board schematics always refer to the same i2c numbers - even if not all are used for a specific board. In order to not have to re-define them for every board move the aliases to SoC dtsi for RK3128 like it's being done for all other Rockchip ARM SoCs. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202130506.66738-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Move gpio aliases to SoC dtsi for RK3128Alex Bee
SoC TRM, SoC datasheet and board schematics always refer to the same gpio numbers - even if not all are used for a specific board. In order to not have to re-define them for every board move the aliases to SoC dtsi for RK3128 like it's being done for most other Rockchip ARM SoCs. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202130506.66738-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add Sonoff iHost Smart Home HubTim Lunn
Sonoff iHost is gateway device designed to provide a Smart Home Hub, it is based on Rockchip RV1126. There is also a version with 2GB RAM based off the RV1109 dual core SoC. Features: - Rockchip RV1126 - 4GB DDR4 - 8GB eMMC - microSD slot - RMII Ethernet PHY - 1x USB 2.0 Host - 1x USB 2.0 OTG - Realtek RTL8723DS WiFi/BT - EFR32MG21 Silabs Zigbee radio - Speaker/Microphone This patch adds the initial device tree for this device, it is largely based off the device trees for mainline Edgeble Neu2 and downstream Rockchip rv1126-evb-v13 configs. It has been adapted with relevant peripheral and GPIO pins for the iHost. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-8-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add rv1109 SoCTim Lunn
The Rockchip rv1109 SoC is a dual core version of the rv1126. It is otherwise identical and shares the same device tree config. This patch introduces a dtsi file to drop the additional cpu nodes. Taken from Rockchip BSP kernel. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-7-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Split up rgmii1 pinctrl on rv1126Tim Lunn
Split up the pinctrl definitions for rgmii1 so it can be shared with devices using an RMII PHY. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-6-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add i2c2 node to rv1126Tim Lunn
Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126 Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-5-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Serial aliases for rv1126Tim Lunn
Add serial aliases for uart nodes so that serial devices are created Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-3-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add alternate UART pins to rv1126Tim Lunn
Add uart3m2_xfer and uart4m2_xfer pins for Rockchip RV1126. These are used as serial ports for the indicator and Zigbee radio on the iHost. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-2-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Enable GPU for XPI-3128Alex Bee
Add the supply and enable gpu node for XPI-3128 board. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231204153547.97877-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add GPU node for RK3128Alex Bee
RK3128 SoCs have Mali400 MP2 GPU. Add the respective device tree node and the correspondending opp-table. The frequencies and voltages of the opp-table have been taken from downstream kernel. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231204153547.97877-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add power-controller for RK3128Alex Bee
Add power controller and qos nodes for RK3128 in order to use them as powerdomains. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231204153547.97877-2-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-02ARM: dts: rockchip: Enable gmac for XPI-3128Alex Bee
Add the required properties and enable the gmac node for XPI-3128 board. The minimum reset timing requirements for the phy have been taken from DP83848J's datasheet [0] [0] https://www.ti.com/lit/ds/symlink/dp83848j.pdf Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202124158.65615-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-02ARM: dts: rockchip: Add gmac node for RK3128Alex Bee
RK3128's gmac is based on Synopsys Ethernet GMAC IP core. Add it to the devicetree. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202124158.65615-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-28ARM: dts: rockchip: Fix sdmmc_pwren's pinmux setting for RK3128Alex Bee
RK3128's reference design uses sdmmc_pwren pincontrol as GPIO - see [0]. Let's change it in the SoC DT as well. [0] https://github.com/rockchip-linux/kernel/commit/8c62deaf6025 Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231127184643.13314-2-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-27ARM: dts: rockchip: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124095031.58555-1-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20ARM: dts: rockchip: Make usbphy the parent of SCLK_USB480M for RK3128Alex Bee
Without setting the parent for SCLK_USB480M the clock will use xin24m as it's default parent. While this is generally not an issue for the usb blocks to work, it becomes an issue for RK3128 since SCLK_USB480M can be a parent for other HW blocks (GPU, VPU, VIO), but they will never chose it, since it is currently always running at OSC frequency which is to slow for their needs. This sets the usb2 phy's output as SCLK_USB480M's parent and it's users can chose it if desired. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231119121340.109025-6-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20ARM: dts: rockchip: Add dwc2 otg fifo siztes for RK3128Alex Bee
The driver currently won't probe correctly if those values are missing. They have been taken from dowstream kernel and match those of other Rockchip SoCs. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231119121340.109025-5-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20ARM: dts: rockchip: Add USB host clocks for RK3128Alex Bee
Add the required AHB clocks for both the ehci and ohci controller. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231119121340.109025-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20ARM: dts: rockchip: Add Geniatech XPI-3128 RK3128 boardAlex Bee
XPI-3128 is RK3128 based SBC form Geniatec in RPi form factor Specs: - Rockchip RK3128 - 512MB/1 GB DDR3 DRAM - 8/16 GB eMMC - TF card slot - 100 MBit ethernet / RJ45 (TI DP83848C phy) - optional Marvell 88W8897 (USB version) - 3 x USB host (onboard GL852G hub connected to SoC ehci host) - 1 x USB otg - 1 x Type-C (solely for powering the board) - HDMI 1.4 out - ADC button - IR receiver - Artasie AM1805 RTC - 40 pin header Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231119130351.112261-8-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20ARM: dts: rockchip: Add sdmmc_det pinctrl for RK3128Alex Bee
The pincontrol for sd card detection is currently missing. Add it. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231119130351.112261-6-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-01Merge tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull SoC DT updates from Arnd Bergmann: "There are a couple new SoCs that are supported for the first time: - AMD Pensando Elba is a data processing unit based on Cortex-A72 CPU cores - Sophgo makes RISC-V based chips, and we now support the CV1800B chip used in the milkv-duo board and the massive sg2042 chip in the milkv-pioneer, a 64-core developer workstation. - Qualcomm Snapdragon 720G (sm7125) is a close relative of Snapdragon 7c and gets added with some Xiaomi phones - Renesas gains support for the R8A779F4 (R-Car S4-8) automotive SoC and the RZ/G3S (R9A08G045) embedded SoC. There are also a bunch of newly supported machines that use already supported chips. On the 32-bit side, we have: - USRobotics USR8200 is a NAS/Firewall/router based on the ancient Intel IXP4xx platform - A couple of machines based on the NXP i.MX5 and i.MX6 platforms - One machine each for Allwinner V3s, Aspeed AST2600, Microchip sama5d29 and ST STM32mp157 The other ones all use arm64 cores on chips from allwinner, amlogic, freescale, mediatek, qualcomm and rockchip" * tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (641 commits) ARM: dts: BCM5301X: Set switch ports for Linksys EA9200 ARM: dts: BCM5301X: Set fixed-link for extra Netgear R8000 CPU ports ARM: dts: BCM5301X: Explicitly disable unused switch CPU ports ARM: dts: BCM5301X: Relicense Vivek's code to the GPL 2.0+ / MIT ARM: dts: BCM5301X: Relicense Felix's code to the GPL 2.0+ / MIT ARM: dts: BCM5301X: Set MAC address for Asus RT-AC87U arm64: dts: socionext: add missing cache properties riscv: dts: thead: convert isa detection to new properties arm64: dts: Update cache properties for socionext arm64: dts: ti: k3-am654-idk: Add ICSSG Ethernet ports arm64: dts: ti: k3-am654-icssg2: add ICSSG2 Ethernet support arm64: dts: ti: k3-am65-main: Add ICSSG IEP nodes arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM arm64: dts: ti: k3-am62p: Add nodes for more IPs arm64: dts: rockchip: Add Turing RK1 SoM support dt-bindings: arm: rockchip: Add Turing RK1 dt-bindings: vendor-prefixes: add turing arm64: dts: rockchip: Add DFI to rk3588s arm64: dts: rockchip: Add DFI to rk356x arm64: dts: rockchip: Always enable DFI on rk3399 ...
2023-10-04ARM: dts: rockchip: Switch to operating-points-v2 for RK3128's CPUAlex Bee
This will allow frequency-scaling for the cpu-cores. Operating frequencies and voltages have been taken from Rockchip's downstream kernel. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-10-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Enable SMP bring-up for RK3128Alex Bee
For bring-up of the non-boot cpu cores the enable-method for RK3036 can be re-used. This adds a (small) chunk of SRAM for execution of the SMP trampoline code and the respective enable-method property to the cpus. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-8-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add CPU resets for RK3128Alex Bee
In order to support bring-up of the non-boot cores, this patch adds the reset controls for the cpu cores. They are required/will be used by the Rockchip platsmp driver. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-6-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add SRAM node for RK3128Alex Bee
RK3128 SoCs have 8KB of SRAM. Add the respective device tree node for it. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Enable pwm fan for edgeble-neu2Jagan Teki
Edgeble Neu2 IO board Fan connected to PWM11. Enable the pwm fan for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-10-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm11 node to rv1126Jagan Teki
Add pwm11 node for Rockchip RV1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-6-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm11m0 pins to rv1126Jagan Teki
Add pwm11m0 pins for Rockchip RV1126 PWM11. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-5-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm2 node to rv1126Jagan Teki
Add PWM2 node for Rockchip RV1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-4-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm2m0 pins to rv1126Jagan Teki
Add pwm2m0 pins for Rockchip RV1126 PWM2. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-3-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Fix timer clocks for RK3128Alex Bee
Currently the Rockchip timer source clocks are set to xin24 for no obvious reason and the actual timer clocks (SCLK_TIMER*) will get disabled during boot process as they have no user. That will make the SoC stuck as no timer source exists. Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829203721.281455-12-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add missing quirk for RK3128's dma engineAlex Bee
Like most other Rockchip ARM SoCs, the PL330 needs the arm,pl330-periph-burst quirk in order to work as expected. Add it. Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829203721.281455-10-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add missing arm timer interrupt for RK3128Alex Bee
The Cortex-A7 timer has 4 interrupts. Add the missing one. Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829203721.281455-8-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Fix i2c0 register address for RK3128Alex Bee
The register address for i2c0 is missing a 0x to mark it as hex. Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829203721.281455-6-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-12ARM: dts: rockchip: Add rv1126 VOP_LITE supportJagan Teki
RV1126 VOP_LITE supports the video output processing ofMIPI DSI, RGB display interfaces with max output resolution of 1920x1080. Add support for vop in rv1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731110012.2913742-11-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-12ARM: dts: rockchip: Add rv1126 PD_VO entryJagan Teki
PD_VO power-domain tree diagram in RV1126 is connected to - BIU_VO - VOP - RGA - IEP - DSIHOST Add PD_VO power-domain entry in RV1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731110012.2913742-10-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-10ARM: dts: rockchip: Add 12V main supply for edgeble-neu2Jagan Teki
The Main supply volatge for Edgeble Neu2 IO board is 12V DC. Add the 12v supply regulator for it and input to vcc5v0_sys. Since the power regulator is part of IO board circuit, move the regulator in IO dts file. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-14-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-10ARM: dts: rockchip: Add 3V3_SYS regulator for edgeble-neu2Jagan Teki
Edgeble Neu2 IO board has 3V3_SYS regulator to power Audio, RS485, and 4G Module. Add regulator for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-13-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-10ARM: dts: rockchip: Enable SFC for edgeble-neu2Stephen Chen
Enable on module SPI Flash present in Edgeble Neu2. Tested-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Stephen Chen <stephen@radxa.com> Link: https://lore.kernel.org/r/20230731103518.2906147-12-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-10ARM: dts: rockchip: Drop EMMC_RSTN for edgeble-neu2Jagan Teki
EMMC_RSTN GPIO1_A3 is connected to FSPI_CLK in Edgeble Neu2 board. So, drop the same GPIO pin from eMMC. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-11-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-10ARM: dts: rockchip: Add rv1126 uart5m2_xfer pinsJagan Teki
Add uart5m2_xfer pins for Rockchip RV1126 uart5. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-9-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-10ARM: dts: rockchip: Add rv1126 FSPI pinsJagan Teki
Add fspi pins for rv1126 sfc controller. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-8-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-08-10ARM: dts: rockchip: Add SFC node to rv1126Jagan Teki
Add Rockchip SFC controller node for rv1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-7-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-21ARM: dts: Move .dts files to vendor sub-directoriesRob Herring
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-04 23:50:02 +0000