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2022-06-23drm/amdgpu: Fetch MES scheduler/KIQ versionsGraham Sider
Store MES scheduler and MES KIQ version numbers in amdgpu_mes for GFX11. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-23drm/amdgpu: To flush tlb for MMHUB of RAVEN seriesRuili Ji
amdgpu: [mmhub0] no-retry page fault (src_id:0 ring:40 vmid:8 pasid:32769, for process test_basic pid 3305 thread test_basic pid 3305) amdgpu: in page starting at address 0x00007ff990003000 from IH client 0x12 (VMC) amdgpu: VM_L2_PROTECTION_FAULT_STATUS:0x00840051 amdgpu: Faulty UTCL2 client ID: MP1 (0x0) amdgpu: MORE_FAULTS: 0x1 amdgpu: WALKER_ERROR: 0x0 amdgpu: PERMISSION_FAULTS: 0x5 amdgpu: MAPPING_ERROR: 0x0 amdgpu: RW: 0x1 When memory is allocated by kfd, no one triggers the tlb flush for MMHUB0. There is page fault from MMHUB0. v2:fix indentation v3:change subject and fix indentation Signed-off-by: Ruili Ji <ruiliji2@amd.com> Reviewed-by: Philip Yang <philip.yang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-23gpu/drm/radeon: Fix typo in commentsJiang Jian
Remove the repeated word 'and' from comments Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-23drm/fourcc: fix integer type usage in uapi headerCarlos Llamas
Kernel uapi headers are supposed to use __[us]{8,16,32,64} types defined by <linux/types.h> as opposed to 'uint32_t' and similar. See [1] for the relevant discussion about this topic. In this particular case, the usage of 'uint64_t' escaped headers_check as these macros are not being called here. However, the following program triggers a compilation error: #include <drm/drm_fourcc.h> int main() { unsigned long x = AMD_FMT_MOD_CLEAR(RB); return 0; } gcc error: drm.c:5:27: error: ‘uint64_t’ undeclared (first use in this function) 5 | unsigned long x = AMD_FMT_MOD_CLEAR(RB); | ^~~~~~~~~~~~~~~~~ This patch changes AMD_FMT_MOD_{SET,CLEAR} macros to use the correct integer types, which fixes the above issue. [1] https://lkml.org/lkml/2019/6/5/18 Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.") Signed-off-by: Carlos Llamas <cmllamas@google.com> Reviewed-by: Simon Ser <contact@emersion.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-22drm/amdgpu/vcn: fix no previous prototype warningRuijing Dong
Declare 'static', as the function is not intended to be used outside of this translation unit. Fixes: 4ed49c954e35 ("drm/amdgpu/vcn: add unified queue ib test") Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-22amdgpu/pm: Fix possible array out-of-bounds if SCLK levels != 2Darren Powell
[v2] simplified fix after Lijo's feedback removed clocks.num_levels from calculation of loop count removed unsafe accesses to shim table freq_values retained corner case output only min,now if clocks.num_levels == 1 && now > min [v1] added a check to populate and use SCLK shim table freq_values only if using dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL or AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM removed clocks.num_levels from calculation of shim table size removed unsafe accesses to shim table freq_values output gfx_table values if using other dpm levels added check for freq_match when using freq_values for when now == min_clk == Test == LOGFILE=aldebaran-sclk.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_od_clk_voltage pp_dpm_sclk" for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-22amdgpu/pm: Fix incorrect variable for size of clocks arrayDarren Powell
[v2] No Changes, added RB [v1] Size of pp_clock_levels_with_latency is PP_MAX_CLOCK_LEVELS, not MAX_NUM_CLOCKS. Both are currently defined as 16, modifying in case one value is modified in future Changed code in both arcturus and aldabaran. Also removed unneeded var count, and used min_t function Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-22drm/amdkfd: Free queue after unmap queue successPhilip Yang
After queue unmap or remove from MES successfully, free queue sysfs entries, doorbell and remove from queue list. Otherwise, application may destroy queue again, cause below kernel warning or crash backtrace. For outstanding queues, either application forget to destroy or failed to destroy, kfd_process_notifier_release will remove queue sysfs entries, kfd_process_wq_release will free queue doorbell. v2: decrement_queue_count for MES queue refcount_t: underflow; use-after-free. WARNING: CPU: 7 PID: 3053 at lib/refcount.c:28 Call Trace: kobject_put+0xd6/0x1a0 kfd_procfs_del_queue+0x27/0x30 [amdgpu] pqm_destroy_queue+0xeb/0x240 [amdgpu] kfd_ioctl_destroy_queue+0x32/0x70 [amdgpu] kfd_ioctl+0x27d/0x500 [amdgpu] do_syscall_64+0x35/0x80 WARNING: CPU: 2 PID: 3053 at drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:400 Call Trace: deallocate_doorbell.isra.0+0x39/0x40 [amdgpu] destroy_queue_cpsch+0xb3/0x270 [amdgpu] pqm_destroy_queue+0x108/0x240 [amdgpu] kfd_ioctl_destroy_queue+0x32/0x70 [amdgpu] kfd_ioctl+0x27d/0x500 [amdgpu] general protection fault, probably for non-canonical address 0xdead000000000108: Call Trace: pqm_destroy_queue+0xf0/0x200 [amdgpu] kfd_ioctl_destroy_queue+0x2f/0x60 [amdgpu] kfd_ioctl+0x19b/0x600 [amdgpu] Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Graham Sider <Graham.Sider@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-22drm/amdkfd: Add queue to MES if it becomes activePhilip Yang
We remove the user queue from MES scheduler to update queue properties. If the queue becomes active after updating, add the user queue to MES scheduler, to be able to handle command packet submission. v2: don't break pqm_set_gws Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Graham Sider <Graham.Sider@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: fix incorrect comparison in DMLAurabindo Pillai
[Why&How] GCC 12 catches the following incorrect comparison in the if arm drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c: In function ‘dml32_ModeSupportAndSystemConfigurationFull’: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:3740:33: error: the comparison will always evaluate as ‘true’ for the address of ‘USRRetrainingSupport’ will never be NULL [-Werror=address] 3740 | || &mode_lib->vba.USRRetrainingSupport[i][j])) { | ^~ In file included from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_lib.h:32, from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dc.h:45, from drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:30: ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_vba.h:1175:14: note: ‘USRRetrainingSupport’ declared here 1175 | bool USRRetrainingSupport[DC__VOLTAGE_STATES][2]; | Fix this by remove preceding & so that value is compared instead of address Fixes: dda4fb85e433 ("drm/amd/display: DML changes for DCN32/321") Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: fix array index in DMLAurabindo Pillai
[Why&How] When the a 3d array is used by indexing with only one dimension in an if condition, the addresses get compared instead of the intended value stored in the array. GCC 12.1 caught this error: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c: In function ‘DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation’: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:1007:45: error: the comparison will always evaluate as ‘true’ for the address of ‘use_one_row_for_frame_flip’ will never be NULL [-Werror=address] 1007 | if (v->use_one_row_for_frame_flip[k]) { | ^ In file included from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_lib.h:32, from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dc.h:45, from drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:30: ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_vba.h:605:14: note: ‘use_one_row_for_frame_flip’ declared here 605 | bool use_one_row_for_frame_flip[DC__VOLTAGE_STATES][2][DC__NUM_DPP__MAX]; | Fix this by explicitly specifying the last two indices. Fixes: dda4fb85e433 ("drm/amd/display: DML changes for DCN32/321") Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amdgpu: vm - drop unexpected word "the" in the commentsJiang Jian
there is an unexpected word "the" in the comments that need to be dropped file: drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c line: 57 * the kernel tells the the ring what VMID to use for that command changed to * the kernel tells the ring what VMID to use for that command Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amdgpu: fix adev variable used in amdgpu_device_gpu_recover()Alex Deucher
Use the correct adev variable for the drm_fb_helper in amdgpu_device_gpu_recover(). Noticed by inspection. Fixes: 087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.") Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/radeon: Drop CONFIG_BACKLIGHT_CLASS_DEVICE ifdefsHans de Goede
The DRM_RADEON Kconfig code contains: select BACKLIGHT_CLASS_DEVICE So the condition these ifdefs test for is always true, drop them. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amdkfd: correct sdma queue number of sdma 6.0.1Yifan Zhang
sdma 6.0.1 has 8 queues instead of 2. Fixes: 26776a7031c423 ("drm/amdkfd: add GC 11.0.1 KFD support") Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amdgpu: Drop CONFIG_BACKLIGHT_CLASS_DEVICE ifdefsHans de Goede
The DRM_AMDGPU Kconfig code contains: select BACKLIGHT_CLASS_DEVICE So the condition these ifdefs test for is always true, drop them. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21amd/display/dc: Fix COLOR_ENCODING and COLOR_RANGE doing nothing for DCN20+Joshua Ashton
For DCN20 and above, the code that actually hooks up the provided input_color_space got lost at some point. Fixes COLOR_ENCODING and COLOR_RANGE doing nothing on DCN20+. Tested using Steam Remote Play Together + gamescope. Update other DCNs the same wasy DCN1.x was updates in commit a1e07ba89d49 ("drm/amd/display: Use plane->color_space for dpp if specified") Fixes: a1e07ba89d49 ("drm/amd/display: Use plane->color_space for dpp if specified") Signed-off-by: Joshua Ashton <joshua@froggi.es> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: 3.2.191Aric Cyr
This DC patchset brings improvements in multiple areas. In summary, we highlight: - Remove unnecessary code; - Small fixes (compilation warnings, typos, etc); - Improvements in the DPMS code; - Fix eDP issues - Improvements in the MST code Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Drop duplicate defineRodrigo Siqueira
We already have DALSMC_MSG_TransferTableDram2Smu in the file dalsmc.h; for this reason, we don't need this definition in the smu msg file. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Update hook dcn32_funcsRodrigo Siqueira
In DCN32 clk hook functions, we are using the wrong reference for get_dp_ref_clk_frequency and missing the get_dtb_ref_clk_frequency reference. This commit adds those references. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Implement a pme workaround functionChaitanya Dhere
[Why] For DCN32 we do not have a pme workaround function defined that sends a BacoAudio message. Default code had uses the DCN30 function for pme workaround. PMFW headers are inconsistent with their message ID definitions which cause ID's to clash leading to inconsistent system behaviour. There is a clash with FCLK message due to inconsitent PMFW headers. [How] Implement a new BacoAudio function to workaround the problem of inconsistent PMFW headers in order to avoid BacoAudio message clasing with FCLK Enable message. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Get VCO frequency from registersRodrigo Siqueira
Add support to get VCO frequency from registers. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Update SW state correctly for FCLKAlvin Lee
FCLK not supported for DCN321, but still need to update the software state accordingly to prevent unneeded full updates in driver Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Fix divide-by-zero in DPPCLK and DISPCLK calculationGeorge Shen
[Why] Certain use cases will pass in zero in the new_clocks parameter for all clocks. This results in a divide-by-zero error when attempting to round up the new clock. When new_clocks are zero, no rounding is required, so we can skip it. [How] Guard the division calculation with a check to make sure clocks are not zero. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Update DPPCLK programming sequenceAlvin Lee
[Description] - When lowering DPPCLK, we want to program the DPP DTO before updating the DPP refclk. - Also update DPPCLK to the exact frequency that will be set after clock divider has been programmed. This will prevent rounding errors when making the request to PMFW (we need DPP DTO to match exactly with the exact DPP refclk). Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Check minimum disp_clk and dpp_clk debug optionRodrigo Siqueira
Our debug struct has the min_disp_clk_khz and min_dpp_clk_khz options, which we ignore in the DCN32. This commit introduces those checks and the necessary calculation. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Fix in dp link-training when updating payload allocation tableDmytro Laktyushkin
[Why & How] Check if aux is not accessible before updating payload allocation table. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: extract update stream allocation to link_hwssWenjing Liu
[Why & How] Extract update stream allocation table into link hwss as part of the link hwss refactor work. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: George Shen <George.Shen@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Remove unused vendor specific w/aGeorge Shen
[Why & How] Old vendor specific w/a are no longer needed and unused. Clean up codebase by removing them. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Handle downstream LTTPR with fixed VS sequenceGeorge Shen
[Why] Several issues were discovered that caused link training to fail when an LTTPR device is connected downstream for the fixed VS sequence. [How] The following were added: - workaround to configure AUX timeout for fixed VS sequence - additional delay before disabling fixed VS intercept - detection of fixed VS deadlock state and performing DPCD sequence to recover Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: George Shen <George.Shen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Fix typo in override_lane_settingsGeorge Shen
[Why] The function currently skips overriding the drive settings of the first lane. [How] Change for loop to start at 0 instead of 1. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Change initializer to single braceAric Cyr
[Why & How] Change struct initializer from multiple brace to single brace. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: rename lane_settings to hw_lane_settingsWenjing Liu
[why] This is one of the major steps to decouple hw lane settings from dpcd lane settings. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Fix in overriding DP drive settingsGeorge Shen
[Why & How] Check always_match_dpcd_with_hw_lane_settings bit before overriding the DP drive settings Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Enrich the log in MST payload updateWenjing Liu
[Why & How] Enrich the log to provide more informatio in MST payload update. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Change HDMI judgement condition.JinZe.Xu
[Why & How] Use dc_is_hdmi_signal to determine signal type. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: JinZe.Xu <JinZe.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Fix DC warning at driver loadQingqing Zhuo
[Why] Wrong index was checked for dcfclk_mhz, causing false warning. [How] Fix the assertion index. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Add SMU logging codeSaaem Rizvi
[WHY] Logging for SMU response value after the wait allows us to know immediately what the response value was. Makes it easier to debug should the value be anything other than OK. [HOW] Using the the already available DC SMU logging functions. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Turn off internal backlight when plugging external monitorSung Joon Kim
[why] For VG, we want to turn off power/backlight of the intenral panel when plugging in external monitor and going to "external monitor only" mode. [how] For turning off power of the internal panel, ignore the config flag whic bypasses power sequencing for eDP panels. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Sung Joon Kim <sungkim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Fix eDP not light up on resumeSung Joon Kim
[why] Only on VG, if external display is disconnected during S3 suspend, the internal panel doesn't light up on resume because we set the power state using an unsupported DPCD register SET_POWER. To check the register is supported, we need to check SET_POWER_CAPABLE first which is eDP-specific DPCD register field. [how] Check the SET_POWER_CAPABLE register field and decide the control of the eDP power state based on the read register value. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Agustin Gutierrez <Agustin.Gutierrez@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Sung Joon Kim <sungkim@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: add mst port output bw checkhersen wu
[Why] when connect one 4k@144hz dp to dsc mst hub, 4k@144hz mode is in valid mode list. but some mst hub port output bandwidth does not support 4k@144hz. [How] add mst port output bandwidth checks, include full_pbn, branch max throughput mps. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Jerry Zuo <Jerry.Zuo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: hersen wu <hersenxs.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Drop unnecessary detect link codeIan Chen
Delete unnecessary codes in detect_link_and_local_sink. We already have correct stop logic in dc_link_detect. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Ian Chen <ian.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Take emulated dc_sink into account for HDCPWayne Lin
[Why] While updating the config of hdcp, we use the sink_singal type of the dc_sink to decide the HDCP operation mode. However, it doesn't consider the case when the sink is a emulated one. [How] Take dc_em_sink into account while updating HDCP config. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Release remote dc_sink under mst scenarioWayne Lin
[Why] Observe that we have several problems while releasing remote dc_sink under mst cases. - When unplug mst branch device from the source, we now try to free all remote dc_sinks in dm_helpers_dp_mst_stop_top_mgr(). However, there are bugs while we're releasing dc_sinks here. First of all, link->remote_sinks[] array get shuffled within dc_link_remove_remote_sink(). As the result, increasing the array index within the releasing loop is wrong. Secondly, it tries to call dc_sink_release() to release the dc_sink of the same aconnector every time in the loop. Which can't release dc_sink of all aconnector in the mst topology. - There is no code path for us to release remote dc_sink for disconnected sst monitor which unplug event is notified by CSN sideband message. Which means we'll use stale dc_sink data to represent later on connected monitor. Also, has chance to break the maximum remote dc_sink number constraint. [How] Distinguish unplug event of mst scenario into 2 cases. * Unplug sst/legacy stream sink off the mst topology - Release related remote dc_sink in detec_ctx(). * Unplug mst branch device off the mst topology - Release related remote dc_sink in early_unregister() Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Revert "drm/amd/display: turn DPMS off on connector unplug"Wayne Lin
This reverts commit 3c4d55c9b9becedd8d31a7c96783a364533713ab. Revert the commit because: - It's incomplete of the function dm_set_dpms_off() for mst case. For stream sinks whithin the same mst topology, they share the same dc_link. dm_set_dpms_off() tries to update one mst stream only which is incomplete. - Setting dpms off should be triggered by usermode. Besdies, it seems usermode does release relevant resource for mst & non-mst case when unplug connecotr now. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Revert "drm/amd/display: Add flag to detect dpms force off ↵Wayne Lin
during HPD" This reverts commit 035f54969bb2c1a5ced52f43e4ef393e0c0f6bfa. The reverted commit was trying to fix side effect brought by commit 3c4d55c9b9be ("drm/amd/display: turn DPMS off on connector unplug") However, * This reverted commit will have mst case never call dm_set_dpms_off() which conflicts the idea of original commit 3c4d55c9b9be ("drm/amd/display: turn DPMS off on connector unplug") That's due to dm_crtc_state is always null since the input parameter aconnector is the root device (source) of mst topology. It's not an end stream sink within the mst topology. * Setting dpms off should be triggered by usermode. Besdies, it seems usermode does release relevant resource for mst & non-mst case when unplug connecotr now. Which means we no longer need both commits now: commit 3c4d55c9b9be ("drm/amd/display: turn DPMS off on connector unplug") commit 035f54969bb2 ("drm/amd/display: Add flag to detect dpms force off during HPD") Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd: Revert "drm/amd/display: keep eDP Vdd on when eDP stream is already ↵Mario Limonciello
enabled" A variety of Lenovo machines with Rembrandt APUs and OLED panels have stopped showing the display at login. This behavior clears up after leaving it idle and moving the mouse or touching keyboard. It was bisected to be caused by commit 559e2655220d ("drm/amd/display: keep eDP Vdd on when eDP stream is already enabled"). Revert this commit to fix the issue. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2047 Reported-by: Aaron Ma <aaron.ma@canonical.com> Fixes: 559e2655220d ("drm/amd/display: keep eDP Vdd on when eDP stream is already enabled") Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Tested-by: Mark Pearson <markpearson@lenovo.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: Remove compiler warningCruise Hung
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Cruise Hung <Cruise.Hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amdgpu: add LSDMA block for LSDMA v6.0.1Yifan Zhang
This patch adds LSDMA ip block for LSDMA v6.0.1. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21drm/amd/display: add missing reg defs for DCN3x HUBBUBAurabindo Pillai
[Why&How] The omitted register definition caused call traces like: [ 3.811215] WARNING: CPU: 7 PID: 794 at drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.c:120 set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu] [ 3.811406] Modules linked in: amdgpu(+) drm_ttm_helper ttm iommu_v2 gpu_sched drm_kms_helper cfbfillrect syscopyarea cfbimgblt sysfillrect sysimgblt fb_sys_fops cfbcopyarea drm i2c_piix4 drm_panel_orientation_quirks [ 3.811419] CPU: 7 PID: 794 Comm: systemd-udevd Not tainted 5.16.0-kfd+ #132 [ 3.811422] Hardware name: System manufacturer System Product Name/ROG STRIX B450-F GAMING, BIOS 3003 12/09/2019 [ 3.811425] RIP: 0010:set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu] [ 3.811615] Code: 08 49 89 51 08 8b 08 48 8d 42 08 49 89 41 08 44 8b 02 48 8d 50 08 0f b6 c9 49 89 51 08 8b 00 45 85 c0 75 b3 0f 0b eb af 5d c3 <0f> 0b e9 48 ff ff ff 49 8b 51 08 eb d0 49 8b 41 08 eb d5 66 0f 1f [ 3.811619] RSP: 0018:ffffb8c1c04cf640 EFLAGS: 00010246 [ 3.811621] RAX: 0000000000000000 RBX: ffff96f2100d8800 RCX: 0000000000000000 [ 3.811623] RDX: 0000000000000000 RSI: 0000000000000001 RDI: ffffb8c1c04cf650 [ 3.811625] RBP: ffffb8c1c04cf640 R08: 000000000000047f R09: ffffb8c1c04cf658 [ 3.811627] R10: ffff96f5161ff000 R11: ffff96f5161ff000 R12: ffff96f204afb9c0 [ 3.811629] R13: 0000000000000000 R14: ffff96f202b94c00 R15: ffffb8c1c04cf718 [ 3.811631] FS: 00007fe07c2e2880(0000) GS:ffff96f5059c0000(0000) knlGS:0000000000000000 [ 3.811634] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 3.811636] CR2: 0000559634ab57b8 CR3: 0000000120674000 CR4: 00000000003506e0 [ 3.811637] Call Trace: [ 3.811640] <TASK> [ 3.811642] generic_reg_update_ex+0x69/0x200 [amdgpu] [ 3.811831] ? _printk+0x58/0x6f [ 3.811836] dcn32_init_crb+0x18f/0x1b0 [amdgpu] [ 3.812031] dcn32_init_hw+0x379/0x6a0 [amdgpu] [ 3.812223] dc_hardware_init+0xba/0x100 [amdgpu] [ 3.812415] amdgpu_dm_init.isra.0.cold+0x166/0x1867 [amdgpu] [ 3.812616] ? dev_vprintk_emit+0x139/0x15d [ 3.812621] ? dev_printk_emit+0x4e/0x65 [ 3.812624] dm_hw_init+0x12/0x30 [amdgpu] [ 3.812820] amdgpu_device_init.cold+0x130d/0x178c [amdgpu] [ 3.813017] ? pci_read_config_word+0x25/0x40 [ 3.813021] amdgpu_driver_load_kms+0x1a/0x130 [amdgpu] [ 3.813178] amdgpu_pci_probe+0x130/0x330 [amdgpu] Fixes: 4f29f9cf092b ("drm/amd: add register headers for DCN32/321") Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 02:05:12 +0000