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2023-01-03drm/amd/display: fix dc/core/dc.c kernel-docRandy Dunlap
Fix all kernel-doc warnings in dc/core/dc.c: dc.c:385: warning: missing initial short description on line: * dc_stream_adjust_vmin_vmax: dc.c:392: warning: contents before sections dc.c:399: warning: No description found for return value of 'dc_stream_adjust_vmin_vmax' dc.c:434: warning: Excess function parameter 'adjust' description in 'dc_stream_get_last_used_drr_vtotal' dc.c:434: warning: No description found for return value of 'dc_stream_get_last_used_drr_vtotal' dc.c:574: warning: No description found for return value of 'dc_stream_configure_crc' dc.c:1746: warning: No description found for return value of 'dc_commit_state_no_check' dc.c:4991: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * dc_extended_blank_supported 0 Decide whether extended blank is supported dc.c:4991: warning: missing initial short description on line: * dc_extended_blank_supported 0 Decide whether extended blank is supported dc.c:4723: warning: Function parameter or member 'dc' not described in 'dc_enable_dmub_outbox' dc.c:4926: warning: Function parameter or member 'dc' not described in 'dc_process_dmub_dpia_hpd_int_enable' dc.c:4926: warning: Function parameter or member 'hpd_int_enable' not described in 'dc_process_dmub_dpia_hpd_int_enable' 12 warnings Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: amd-gfx@lists.freedesktop.org Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03Revert "drm/amd/display: Enable Freesync Video Mode by default"Michel Dänzer
This reverts commit de05abe6b9d0fe08f65d744f7f75a4cba4df27ad. The bug referenced below was bisected to this commit. There has been no activity toward fixing it in 3 months, so let's revert for now. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2162 Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Remove the unused function dmub_outbox_irq_info_funcsJiapeng Chong
The function dmub_outbox_irq_info_funcs is defined in the irq_service_dcn201.c file, but not called elsewhere, so remove this unused function. drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn201/irq_service_dcn201.c:139:43: warning: unused variable 'dmub_outbox_irq_info_funcs'. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=3520 Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Fix dsc mismatch of acquire and validation of dsc engineBhawanpreet Lakha
[Why] We skip dsc_validation on pipes that are underlays, but in the acquire_dsc code we don't have this check. In certain conditions (when underlay pipe index is lower) we will assign the dsc resource to the underlay pipe and skip the base pipe. Now during dsc_validation we will skip the underlay pipe (this has the dsc resource) but try to validate the base pipe(this doesn't have a dsc resource) due to this mismatch we hit a NULLPTR [How] In the acquire_dsc add a check for underlay pipe so we don't acquire a dsc resource for this pipe. This will match the acquire/validation conditions. Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Hersen Wu <Hersenxs.Wu@amd.com> Acked-by: Praful Swarnakar <Praful.Swarnakar@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: remove enable ras cmd call traceStanley.Yang
[Why] [ 41.285804] RIP: 0010:amdgpu_ras_feature_enable+0x15c/0x310 [amdgpu] [ 41.285945] Code: 48 89 c1 48 c7 c2 b9 f2 88 c1 48 c7 c0 c0 f2 88 c1 49 8b 3c 24 48 0f 44 d0 48 c7 c6 98 33 80 c1 e8 5f 52 75 d9 e9 fa fe ff ff <0f> 0b e9 66 ff ff ff 48 8b 3d 86 8c 0f da ba 00 04 00 00 be c0 0d [ 41.285946] RSP: 0018:ffffbccdc72efc90 EFLAGS: 00010246 [ 41.285948] RAX: 0000000000000004 RBX: ffff931897406980 RCX: 0000000000000002 [ 41.285949] RDX: 0000000000000dc0 RSI: 0000000000000002 RDI: ffff931500042b00 [ 41.285950] RBP: ffffbccdc72efcc0 R08: 0000000000000002 R09: ffff931885b87000 [ 41.285951] R10: 0000000000ffff10 R11: 0000000000000001 R12: ffff931893e20000 [ 41.285952] R13: 0000000000000001 R14: ffff931885b87000 R15: 0000000000000000 [ 41.285953] FS: 0000000000000000(0000) GS:ffff931c6f200000(0000) knlGS:0000000000000000 [ 41.285954] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 41.285955] CR2: 000055dd6f532008 CR3: 000000061b010006 CR4: 00000000003706e0 [ 41.285956] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 41.285957] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 41.285958] Call Trace: [ 41.285959] <TASK> [ 41.285963] ? gfx_v11_0_early_init+0x250/0x250 [amdgpu] [ 41.286117] gfx_v11_0_late_init+0x8c/0xb0 [amdgpu] [ 41.286271] amdgpu_device_ip_late_init+0x8d/0x3c0 [amdgpu] [ 41.286401] amdgpu_device_init.cold+0x1677/0x1fda [amdgpu] [ 41.286616] ? pci_bus_read_config_word+0x4a/0x70 [ 41.286621] ? do_pci_enable_device+0xdb/0x110 [ 41.286625] amdgpu_driver_load_kms+0x1a/0x160 [amdgpu] [ 41.286762] amdgpu_pci_probe+0x18d/0x3a0 [amdgpu] [ 41.286898] local_pci_probe+0x4b/0x90 [ 41.286901] work_for_cpu_fn+0x1a/0x30 [ 41.286903] process_one_work+0x22b/0x3d0 [ 41.286905] worker_thread+0x223/0x420 [ 41.286907] ? process_one_work+0x3d0/0x3d0 [ 41.286908] kthread+0x12a/0x150 [ 41.286911] ? set_kthread_struct+0x50/0x50 [ 41.286913] ret_from_fork+0x22/0x30 [How] For specific asic, only mem ecc is enabled, sram ecc is not enabled, but it still need to send ras enable cmd to gfx block to support poison mode, so add check posion mode. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: correct umc poison mode set valueStanley.Yang
For GFX 11.0.3, Due to security policy, there is no way to check UcFatalEn field of UMCCH0_0_GeccCtrl to identify UMC poison mode. This is workaround force set umc poison mode as 1 for GFX 11.0.3 Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: 3.2.217Aric Cyr
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Reorder dc_state fields to optimize clearing the structAric Cyr
[why & how] By moving bw_ctx field to the end of the dc_state the state can be cleared more efficiently without resulting in large DML memcpy operations, resulting in better mode enumeration performance on some platforms. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Adding braces to prepare for future changes to behavior of ↵Leo Chen
if block [Why & How] For certain features, there will be more implementations needed in the if-block. Braces are added as part of the preparation. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Leo Chen <sancchen@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: set ignore msa parameter only if freesync is enabledAurabindo Pillai
[Why&How] ignore_msa_timing_param is used by SubVP logic to determine if SubVP + DRR is possible. Linux does not support freesync on multi display config, which results in incorrect assumption of VRR support if we set this parameter when VRR is supported, but not enabled. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: allow hpo and dio encoder switching during dp retrain testWenjing Liu
[why] During DP2.1 LL CTS if test equipment requests to change between DP2.1 and DP1.4 link rates, we need to swap between HPO and DIO encoders by remapping encoder resource. [how] Add a function dc resource to update encoder resources and toggle dpms state for all enabled stream associated witht the link under test. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: update pixel rate div in enable streamWenjing Liu
[why] Pixel rate div depends on the type of encoder that we are enabling stream with. If we swap between HPO and DIO encoder at the time we call enable stream for the new encoder, we must reprogram pixel rate div based on the new encoder type. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: move dccg programming from link hwss hpo dp to hwssWenjing Liu
[why] dccg clock programming shouldn't be part of link hwss programming sequence. The scope of link hwss is limited to encoder and phy programming. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: fix dc_get_edp_link_panel_inst to only consider links with ↵Dmytro Laktyushkin
panels This function is meant to be used on multi-edp systems and only makes sense if only links with connected panels are considered. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Defer DIG FIFO disable after VID stream enableNicholas Kazlauskas
[Why] On some monitors we see a brief flash of corruption during the monitor disable sequence caused by FIFO being disabled in the middle of an active DP stream. [How] Wait until DP vid stream is disabled before turning off the FIFO. The FIFO reset on DP unblank should take care of clearing any FIFO error, if any. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Syed Hassan <Syed.Hassan@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: patch cases with unknown plane state to prevent warningSwapnil Patel
[Why] DCN301 resource function is missing function pointer to handle cases with unknown plane state. This causes assertion when global state is validated while using swizzle parameter as “DC_UNKNOWN” [How] Add function pointer to handle and patch cases when plane state is unknown. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Swapnil Patel <Swapnil.Patel@amd.com> Reviewed-by: Sung joon Kim <Sungjoon.Kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Turn on phantom OTG before disabling phantom pipeAlvin Lee
[Description] - Proper phantom pipe disable sequence was missing in commit_planes_for_stream - If disabling phantom pipe, turn on phantom OTG first, and turn off the phantom OTG after the plane is disabled - Also update sequence for enabling / disabling phantom streams (apply_ctx_to_hw). When enabling phantom pipes, enable before doing front end programming for phantom pipes. If disabling phantom pipes, disable after front end programming (i.e. after phantom plane disable) - TODO: Still need to properly handle transition case when a phantom pipe is transitioned directly into a real pipe (need to fully disable the phantom pipe first) Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Improvements in secure displayAlan Liu
[Why] - Need error message when failing to allocating secure_display_ctx. - Need to check if secure display context in psp is initialized or not before using it. [How] - Add error message when memory allocation fail. - Add check before accessing psp secure display context. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: Uninitialized variables causing 4k60 UCLK to stay at DPM1 ↵Samson Tam
and not DPM0 [Why] SwathSizePerSurfaceY[] and SwathSizePerSurfaceC[] values are uninitialized because we are using += instead of = operator. [How] Assign values in loop with = operator. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amd/display: phase3 mst hdcp for multiple displayshersen wu
[Why] multiple display hdcp are enabled within event_property_validate, event_property_update by looping all displays on mst hub. when one of display on mst hub in unplugged or disabled, hdcp are disabled for all displays on mst hub within hdcp_reset_display by looping all displays of mst link. for displays still active, their encryption status are off. kernel driver will not run hdcp authentication again. therefore, hdcp are not enabled automatically. [How] within is_content_protection_different, check drm_crtc_state changes of all displays on mst hub, if need, triger hdcp_update_display to re-run hdcp authentication. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: hersen wu <hersenxs.wu@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: allow zero as vram limitChristian König
This allows testing the driver without any VRAM. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: cleanup visible vram size handlingChristian König
Centralize the limit handling and validation in one place instead of spreading that around in different hw generations. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: rename vram_scratch into mem_scratchChristian König
Rename vram_scratch into mem_scratch and allow allocating it into GTT as well. The only problem with that is that we won't have a default page for the system aperture any more. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: use VRAM|GTT for a bunch of kernel allocationsChristian König
Technically all of those can use GTT as well, no need to force things into VRAM. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: enable VCN DPG for GC IP v11.0.4Saleemkhan Jamadar
Enable VCN Dynamic Power Gating control for GC IP v11.0.4. Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdgpu: adjust the sequence to check soft resetLikun Gao
1.Drop soft reset check when do should recover gpu check. (As it will skip gpu reset operation if some ip is hang but not support soft reset) 2.Check soft reset status before do soft reset when pre asic reset. a. If check soft reset return true, it means: some ip is hang and it also support soft reset, will try soft reset first. b. If check soft reset return false, it means: I. All the ip are not hang, will skip gpu reset. II. Some ip is hang but not support soft reset, will skip soft reset and retry with full reset later. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/amdkfd: Fix kernel warning during topology setupMukul Joshi
This patch fixes the following kernel warning seen during driver load by correctly initializing the p2plink attr before creating the sysfs file: [ +0.002865] ------------[ cut here ]------------ [ +0.002327] kobject: '(null)' (0000000056260cfb): is not initialized, yet kobject_put() is being called. [ +0.004780] WARNING: CPU: 32 PID: 1006 at lib/kobject.c:718 kobject_put+0xaa/0x1c0 [ +0.001361] Call Trace: [ +0.001234] <TASK> [ +0.001067] kfd_remove_sysfs_node_entry+0x24a/0x2d0 [amdgpu] [ +0.003147] kfd_topology_update_sysfs+0x3d/0x750 [amdgpu] [ +0.002890] kfd_topology_add_device+0xbd7/0xc70 [amdgpu] [ +0.002844] ? lock_release+0x13c/0x2e0 [ +0.001936] ? smu_cmn_send_smc_msg_with_param+0x1e8/0x2d0 [amdgpu] [ +0.003313] ? amdgpu_dpm_get_mclk+0x54/0x60 [amdgpu] [ +0.002703] kgd2kfd_device_init.cold+0x39f/0x4ed [amdgpu] [ +0.002930] amdgpu_amdkfd_device_init+0x13d/0x1f0 [amdgpu] [ +0.002944] amdgpu_device_init.cold+0x1464/0x17b4 [amdgpu] [ +0.002970] ? pci_bus_read_config_word+0x43/0x80 [ +0.002380] amdgpu_driver_load_kms+0x15/0x100 [amdgpu] [ +0.002744] amdgpu_pci_probe+0x147/0x370 [amdgpu] [ +0.002522] local_pci_probe+0x40/0x80 [ +0.001896] work_for_cpu_fn+0x10/0x20 [ +0.001892] process_one_work+0x26e/0x5a0 [ +0.002029] worker_thread+0x1fd/0x3e0 [ +0.001890] ? process_one_work+0x5a0/0x5a0 [ +0.002115] kthread+0xea/0x110 [ +0.001618] ? kthread_complete_and_exit+0x20/0x20 [ +0.002422] ret_from_fork+0x1f/0x30 [ +0.001808] </TASK> [ +0.001103] irq event stamp: 59837 [ +0.001718] hardirqs last enabled at (59849): [<ffffffffb30fab12>] __up_console_sem+0x52/0x60 [ +0.004414] hardirqs last disabled at (59860): [<ffffffffb30faaf7>] __up_console_sem+0x37/0x60 [ +0.004414] softirqs last enabled at (59654): [<ffffffffb307d9c7>] irq_exit_rcu+0xd7/0x130 [ +0.004205] softirqs last disabled at (59649): [<ffffffffb307d9c7>] irq_exit_rcu+0xd7/0x130 [ +0.004203] ---[ end trace 0000000000000000 ]--- Fixes: 0f28cca87e9a ("drm/amdkfd: Extend KFD device topology to surface peer-to-peer links") Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03drm/v3d: replace open-coded implementation of drm_gem_object_lookupMaíra Canal
As v3d_submit_tfu_ioctl() performs the same steps as drm_gem_object_lookup(), replace the open-code implementation in v3d with its DRM core equivalent. Signed-off-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Melissa Wen <melissa.srw@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221227200010.191351-1-mcanal@igalia.com
2023-01-03drm: Replace DRM_DEBUG with drm_dbg_core in file and ioctl handlingTvrtko Ursulin
Replace the deprecated macro with the per-device one. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Simon Ser <contact@emersion.fr> Signed-off-by: Simon Ser <contact@emersion.fr> Link: https://patchwork.freedesktop.org/patch/msgid/20221223112302.320097-1-tvrtko.ursulin@linux.intel.com
2023-01-03drm/i915/dmc: Do not require specific versionsGustavo Sousa
Currently, i915 interacts with the Hardware and not with any DMC ABI/API, so the API is fixed within the platform, hence no need to get this so-tied version requirement. v2: - Use link to firmware guide from kernel documentation for "References:" instead of mailing list thread. (Rodrigo) - Provide a more elaborate justification in the commit message. (Rodrigo) References: https://www.kernel.org/doc/html/v6.1/driver-api/firmware/firmware-usage-guidelines.html Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221230182422.29680-2-gustavo.sousa@intel.com
2023-01-03drm/format-helper: Remove unnecessary conversion helpersThomas Zimmermann
Drivers only emulate XRGB8888 framebuffers. Remove all conversion helpers that do not use XRGB8888 as their source format. Also remove some special cases for alpha formats in the blit helper. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-14-tzimmermann@suse.de
2023-01-03drm/format-helper: Simplify drm_fb_build_fourcc_list()Thomas Zimmermann
The DRM helper drm_fb_build_fourcc_list() creates a list of color formats for primary planes of the generic drivers. Simplify the helper: - It used to mix and filter native and emulated formats as provided by the driver. Now the only emulated format is XRGB8888, which is required as fallback by legacy software. Drop support for emulating any other formats. - Also convert alpha formats to their non-alpha counterparts. Generic drivers don't support primary planes with alpha formats and some DTs incorrectly advertise alpha channels for non-alpha hardware. So only export non-alpha formats for primary planes. With the simplified helper, scrap format lists of the affected generic drivers. All they need is the firmware buffer's native format, from which the helper creates the list of color formats. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-13-tzimmermann@suse.de
2023-01-03drm/fb-helper: Fix single-probe color-format selectionThomas Zimmermann
Fix the color-format selection of the single-probe helper. Go through all user-specified values and test each for compatibility with the driver. If none is supported, use the driver-provided default. This guarantees that the console is always available in any color format at least. Until now, the format selection of the single-probe helper tried to either use a user-specified format or a 32-bit default format. If the user-specified format was not supported by the driver, the selection failed and the display remained blank. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-12-tzimmermann@suse.de
2023-01-03drm/fh-helper: Split fbdev single-probe helperThomas Zimmermann
Split the single-probe helper's implementation into multiple functions and get locking and overallocation out of the way of the surface setup. Simplifies later changes to the setup code. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-11-tzimmermann@suse.de
2023-01-03drm/format-helper: Add conversion from XRGB8888 to 15-bit RGB555 formatsThomas Zimmermann
Add conversion from XRGB8888 to XRGB1555, ARGB1555 and RGBA5551, which are the formats currently supported by the simplefb infrastructure. The new helpers allow the output of XRGB8888 framebuffers to firmware scanout buffers in one of the 15-bit formats. v3: * use __le* for destination buffers (Jose, kernel test robot) v2: * test 15-bit results with local endianness (Jose) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-10-tzimmermann@suse.de
2023-01-03drm/format-helper: Add conversion from XRGB8888 to ARGB2101010Thomas Zimmermann
Add dedicated helper to convert from XRGB8888 to ARGB2101010. Sets all alpha bits to make pixels fully opaque. v2: * set correct format in struct drm_framebuffer (Javier) * use cpubuf_to_le32() * type fixes Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-9-tzimmermann@suse.de
2023-01-03drm/format-helper: Add conversion from XRGB8888 to ARGB8888Thomas Zimmermann
Add dedicated helper to convert from XRGB8888 to ARGB8888. Sets all alpha bits to make pixels fully opaque. v3: * use __le32 for destination buffer (Jose, kernel test robot) v2: * use cpubuf_to_le32() * type fixes Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-8-tzimmermann@suse.de
2023-01-03drm/format-helper: Flip src/dst-format branches in blit helperThomas Zimmermann
Upcoming changes to the format conversion will mostly blit from XRGB8888 to some other format. So put the source format in blit's outer branches to make the code more readable. For cases where a format only changes its endianness, such as XRGB565, introduce dedicated branches that handle this for all formats. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-7-tzimmermann@suse.de
2023-01-03drm/format-helper: Type fixes in format-helper testsThomas Zimmermann
Change the source-buffer type of le32buf_to_cpu() to __le32* to reflect endianness. Result buffers are converted to local endianness, so instantiate them from regular u8 or u32 types. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-6-tzimmermann@suse.de
2023-01-03drm/format-helper: Store RGB565 in little-endian orderThomas Zimmermann
Fix to-RGB565 conversion helpers to store the result in little- endian byte order. Update test cases as well. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-5-tzimmermann@suse.de
2023-01-03drm/format-helper: Fix test-input format conversionThomas Zimmermann
Convert test input for format helpers from host byte order to little-endian order. The current code does it the other way around, but there's no effective difference to the result. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-4-tzimmermann@suse.de
2023-01-03drm/format-helper: Comment on RGB888 byte orderThomas Zimmermann
RGB888 is different than the other formats as most of its pixels are unaligned and therefore helper functions do not use endianness conversion helpers. Comment on this in the source code. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-3-tzimmermann@suse.de
2023-01-03firmware/sysfb: Fix EFI/VESA format selectionThomas Zimmermann
Select color format for EFI/VESA firmware scanout buffer from the number of bits per pixel and the position of the individual color components. Fixes the selected format for the buffer in several odd cases. For example, XRGB1555 has been reported as ARGB1555 because of the different use of depth and transparency in VESA and Linux. Bits-per-pixel is always the pixel's raw number of bits; including alpha and filler bits. It is preferred over color depth, which has a different meaning among various components and standards. Also do not compare reserved bits and transparency bits to each other. These values have different meanings, as reserved bits include filler bits while transparency does not. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-2-tzimmermann@suse.de
2023-01-03drm/i915: Enable XE_HP 4Tile supportJonathan Cavitt
Add .has_4tile tag to XE_HP_FEATURES set. Remove duplicate entry from DG2_FEATURES. Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com> Cc: Roper Matthew D <matthew.d.roper@intel.com> Cc: Kempczynski Zbigniew <Zbigniew.Kempczynski@intel.com> Cc: Telukuntla Sreedhar <sreedhar.telukuntla@intel.com> Acked-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221221153514.3874262-1-jonathan.cavitt@intel.com
2023-01-03Merge tag 'drm-misc-next-2022-11-24' of ↵Daniel Vetter
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.2: Cross-subsystem Changes: - fbdev: Make fb_modesetting_disabled() static - udmabuf: Add vmap and vunmap methods to udmabuf_ops Core Changes: - doc: make drm-uapi igt-tests more readable - fb-helper: Revert of the damage worker removal - fourcc: Add missing big-endian XRGB1555 and RGB565 formats - gem-shmem: Fix for resource leakage in __drm_gem_shmem_create() - scheduler: Fix lockup in drm_sched_entity_kill() Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20221124074615.ahflw5q5ktfdsr7k@houat
2023-01-02drm/virtio: Spiff out cmd queue/response tracesRob Clark
Add a sequence # for more easily matching up cmd/resp, and the # of free slots in the virtqueue to more easily see starvation issues. v2: Fix handling of string fields as well Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221130000841.318037-1-robdclark@gmail.com
2023-01-02drm/bridge: panel: Set pre_enable_prev_first from drmm_panel_bridge_addDave Stevenson
Commit 5ea6b1702781 ("drm/panel: Add prepare_prev_first flag to drm_panel") added code to copy prepare_prev_first from drm_panel to pre_enable_prev_first in drm_bridge when called through devm_panel_bridge_add, but missed drmm_panel_bridge_add. Add the same code to drmm_panel_bridge_add. Fixes: 5ea6b1702781 ("drm/panel: Add prepare_prev_first flag to drm_panel") Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20221222185213.3773336-1-dave.stevenson@raspberrypi.com
2023-01-02drm/vc4: drop all currently held locks if deadlock happensMaíra Canal
If vc4_hdmi_reset_link() returns -EDEADLK, it means that a deadlock happened in the locking context. This situation should be addressed by dropping all currently held locks and block until the contended lock becomes available. Currently, vc4 is not dealing with the deadlock properly, producing the following output when PROVE_LOCKING is enabled: [ 825.612809] ------------[ cut here ]------------ [ 825.612852] WARNING: CPU: 1 PID: 116 at drivers/gpu/drm/drm_modeset_lock.c:276 drm_modeset_drop_locks+0x60/0x68 [drm] [ 825.613458] Modules linked in: 8021q mrp garp stp llc raspberrypi_cpufreq brcmfmac brcmutil crct10dif_ce hci_uart cfg80211 btqca btbcm bluetooth vc4 raspberrypi_hwmon snd_soc_hdmi_codec cec clk_raspberrypi ecdh_generic drm_display_helper ecc rfkill drm_dma_helper drm_kms_helper pwm_bcm2835 bcm2835_thermal bcm2835_rng rng_core i2c_bcm2835 drm fuse ip_tables x_tables ipv6 [ 825.613735] CPU: 1 PID: 116 Comm: kworker/1:2 Tainted: G W 6.1.0-rc6-01399-g941aae326315 #3 [ 825.613759] Hardware name: Raspberry Pi 3 Model B Rev 1.2 (DT) [ 825.613777] Workqueue: events output_poll_execute [drm_kms_helper] [ 825.614038] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 825.614063] pc : drm_modeset_drop_locks+0x60/0x68 [drm] [ 825.614603] lr : drm_helper_probe_detect+0x120/0x1b4 [drm_kms_helper] [ 825.614829] sp : ffff800008313bf0 [ 825.614844] x29: ffff800008313bf0 x28: ffffcd7778b8b000 x27: 0000000000000000 [ 825.614883] x26: 0000000000000001 x25: 0000000000000001 x24: ffff677cc35c2758 [ 825.614920] x23: ffffcd7707d01430 x22: ffffcd7707c3edc7 x21: 0000000000000001 [ 825.614958] x20: 0000000000000000 x19: ffff800008313c10 x18: 000000000000b6d3 [ 825.614995] x17: ffffcd777835e214 x16: ffffcd7777cef870 x15: fffff81000000000 [ 825.615033] x14: 0000000000000000 x13: 0000000000000099 x12: 0000000000000002 [ 825.615070] x11: 72917988020af800 x10: 72917988020af800 x9 : 72917988020af800 [ 825.615108] x8 : ffff677cc665e0a8 x7 : d00a8c180000110c x6 : ffffcd77774c0054 [ 825.615145] x5 : 0000000000000000 x4 : 0000000000000001 x3 : 0000000000000000 [ 825.615181] x2 : ffff677cc55e1880 x1 : ffffcd7777cef8ec x0 : ffff800008313c10 [ 825.615219] Call trace: [ 825.615232] drm_modeset_drop_locks+0x60/0x68 [drm] [ 825.615773] drm_helper_probe_detect+0x120/0x1b4 [drm_kms_helper] [ 825.616003] output_poll_execute+0xe4/0x224 [drm_kms_helper] [ 825.616233] process_one_work+0x2b4/0x618 [ 825.616264] worker_thread+0x24c/0x464 [ 825.616288] kthread+0xec/0x110 [ 825.616310] ret_from_fork+0x10/0x20 [ 825.616335] irq event stamp: 7634 [ 825.616349] hardirqs last enabled at (7633): [<ffffcd777831ee90>] _raw_spin_unlock_irq+0x3c/0x78 [ 825.616384] hardirqs last disabled at (7634): [<ffffcd7778315a78>] __schedule+0x134/0x9f0 [ 825.616411] softirqs last enabled at (7630): [<ffffcd7707aacea0>] local_bh_enable+0x4/0x30 [ipv6] [ 825.617019] softirqs last disabled at (7618): [<ffffcd7707aace70>] local_bh_disable+0x4/0x30 [ipv6] [ 825.617586] ---[ end trace 0000000000000000 ]--- Therefore, deal with the deadlock as suggested by [1], using the function drm_modeset_backoff(). [1] https://docs.kernel.org/gpu/drm-kms.html?highlight=kms#kms-locking Fixes: 6bed2ea3cb38 ("drm/vc4: hdmi: Reset link on hotplug") Reported-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Maíra Canal <mcanal@igalia.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20221229194638.178712-1-mcanal@igalia.com
2023-01-02drm/tiny: ili9486: Do not assume 8-bit only SPI controllersCarlo Caione
The pixel data for the ILI9486 is always 16-bits wide and it must be sent over the SPI bus. When the controller is only able to deal with 8-bit transfers, this 16-bits data needs to be swapped before the sending to account for the big endian bus, this is on the contrary not needed when the SPI controller already supports 16-bits transfers. The decision about swapping the pixel data or not is taken in the MIPI DBI code by probing the controller capabilities: if the controller only suppors 8-bit transfers the data is swapped, otherwise it is not. This swapping/non-swapping is relying on the assumption that when the controller does support 16-bit transactions then the data is sent unswapped in 16-bits-per-word over SPI. The problem with the ILI9486 driver is that it is forcing 8-bit transactions also for controllers supporting 16-bits, violating the assumption and corrupting the pixel data. Align the driver to what is done in the MIPI DBI code by adjusting the transfer size to the maximum allowed by the SPI controller. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20221116-s905x_spi_ili9486-v4-2-f86b4463b9e4@baylibre.com
2023-01-02drm/tiny: ili9486: Enable driver module autoloadingCarlo Caione
SPI devices use the spi_device_id for module autoloading even on systems using device tree. Add the spi_device_id entry to enable autoloading for the 3.5inch RPi Display (rpi-lcd-35 and piscreen). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20221116-s905x_spi_ili9486-v4-1-f86b4463b9e4@baylibre.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 11:17:04 +0000