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2018-03-13arm64: dts: renesas: r8a77965: Add #interrupt-cells propertyJacopo Mondi
Add "#interrupt-cells" property and "interrupt-controller" label to "interrupt-controller@e61c0000" device node. This silences the following DTC compiler warnings: Warning (interrupts_property): Missing interrupt-controller or interrupt-map property in /soc/interrupt-controller@e61c0000 Warning (interrupts_property): Missing #interrupt-cells in interrupt-parent /soc/interrupt-controller@e61c000 Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Add #pwm-cells propertyJacopo Mondi
Add "#pwm-cells" property to "pwm@e6e31000" device node. This silences the following DTC compiler warning: Warning (pwms_property): Missing property '#pwm-cells' in node /soc/pwm@e6e31000 or bad phandle (referred from /backlight:pwms[0]) Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Add #phy-cells propertyJacopo Mondi
Add "#phy-cells" property to "usb-phy@e65ee000" device node. This silences the following DTC compiler warning: Warning (phys_property): Missing property '#phy-cells' in node /soc/usb-phy@e65ee000 or bad phandle (referred from /soc/usb@ee020000:phys[0]) Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Remove stale reg propertyJacopo Mondi
Remove "reg" property from cache-controller-0 device node as it does not have any unit address. This silences the following DTC compiler warning: Warning (unit_address_vs_reg): Node /cpus/cache-controller-0 has a reg or ranges property, but no unit name Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Add #address-cells and #size-cellsJacopo Mondi
Add "#address-cells" and "#size-cells" properties to all place-holder nodes that have children nodes defined by salvator-x[s].dtsi device tree. This silences the following DTC compiler warnings: Warning (reg_format): "reg" property in /soc/.. has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/... Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/... Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Add "reg" propertiesJacopo Mondi
Add "reg" properties to place-holder nodes with unit address defined for R-Car M3-N SoC. This silences the following DTC compiler warning: Warning (unit_address_vs_reg): Node /soc/... has a unit name, but no reg property Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Add GPIO nodesJacopo Mondi
Add GPIO nodes to r8a77965 SoC device tree file. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Add SCIF device nodesJacopo Mondi
Add SCIF[0-5] device nodes for M3-N (r8a77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a77965: Add dmac device nodsJacopo Mondi
Add dmac[0-2] device nodes for R-Car M3-N (r8a77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: Add R-Car Salvator-x M3-N supportJacopo Mondi
Add basic support for R-Car Salvator-X M3-N (R8A77965) board. Based on original work from: Takeshi Kihara <takeshi.kihara.df@renesas.com> Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: initial R8A77965 SoC device treeJacopo Mondi
Basic support for the Gen 3 R-Car M3-N SoC. Based on original work from: Takeshi Kihara <takeshi.kihara.df@renesas.com> Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: add Renesas R8A77965 supportJacopo Mondi
Add configuration option for the R-Car M3-N (R8A77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a7795: Update OPPs to support CA53 dfsDien Pham
Describe frequencies, other than the default for CA53 cores. This is a pre-requisite for using providing alternative frequencies for use with CPUFreq with these cores. Signed-off-by: Dien Pham <dien.pham.ry@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13arm64: dts: renesas: r8a7796: Update OPPs to support CA53 dfsDien Pham
Describe frequencies, other than the default for CA53 cores. This is a pre-requisite for using providing alternative frequencies for use with CPUFreq with these cores. Signed-off-by: Dien Pham <dien.pham.ry@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21arm64: dts: renesas: condor: add EtherAVB supportSergei Shtylyov
Define the Condor board dependent part of the EtherAVB device node. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21arm64: dts: renesas: initial Condor board device treeSergei Shtylyov
Add the initial device tree for the R8A77980 SoC based Condor board. The board has 1 debug serial port (SCIF0); include support for it, so that the serial console can work. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: correct memory size to 0x78000000 (2GiB)] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21arm64: dts: renesas: r8a77980: add EtherAVB supportSergei Shtylyov
Define the generic R8A77980 part of the EtherAVB device node. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21arm64: dts: renesas: r8a77980: add [H]SCIF supportSergei Shtylyov
Describe [H]SCIF ports in the R8A77980 device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-16arm64: dts: renesas: draak: Enable DUKieran Bingham
Enable the DU, providing only the VGA output for now. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-16arm64: dts: renesas: r8a7796: Fix register mappings on VSPsKieran Bingham
The VSPD includes a CLUT on RPF2. Ensure that the register space is mapped correctly to support this. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-16arm64: dts: renesas: r8a7795: Fix register mappings on VSPsKieran Bingham
The VSPD includes a CLUT on RPF2. Ensure that the register space is mapped correctly to support this. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-16arm64: dts: renesas: r8a7795-es1: Fix register mappings on VSPsKieran Bingham
The VSPD includes a CLUT on RPF2. Ensure that the register space is mapped correctly to support this. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-15arm64: dts: renesas: r8a77995: add DU supportKieran Bingham
Define the generic r8a77995 part of the DU device node. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-15arm64: dts: renesas: draak: enable SDHI2Ulrich Hecht
The single SDHI controller is connected to eMMC. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-15arm64: dts: renesas: r8a77995: add VSP instancesKieran Bingham
The r8a77995 has a VSPBS to support image processing such as blending of two input images, and has two VSPDs to handle display pipelines with a DU. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [simon: updated base address of vsp node to fea28000] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-15arm64: dts: renesas: r8a77995: add FCPV nodesKieran Bingham
The FCPVB handles the interface between the VSPB and memory, while the FCPVD handles the interface between the VSPD and memory. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-15arm64: dts: renesas: eagle: specify EtherAVB PHY IRQSergei Shtylyov
Specify EtherAVB PHY IRQ in the Eagle board's device tree, now that we have the GPIO support (previously phylib had to resort to polling). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-15arm64: dts: renesas: r8a77970: add GPIO supportSergei Shtylyov
Describe all 6 GPIO controllers in the R8A77970 device tree. Based on the original (and large) patch by Daisuke Matsushita <daisuke.matsushita.ns@hitachi.com>. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13arm64: dts: renesas: eagle: add SCIF0 pinsSergei Shtylyov
Add the (previously omitted) SCIF0 pin data to the Eagle board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-13arm64: dts: renesas: r8a77970: add PFC supportSergei Shtylyov
Define the generic R8A77970 part of the PFC device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a77995: Remove non-existing STBE regionGeert Uytterhoeven
R-Car D3 does not have the Stream Buffer for EtherAVB-IF (STBE). Note that the RAVB driver does not use this region. Fixes: f9ba0c4cfe6169b7 ("arm64: dts: renesas: r8a77995: Add EthernetAVB device node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a77970: Remove non-existing STBE regionGeert Uytterhoeven
R-Car V3M does not have the Stream Buffer for EtherAVB-IF (STBE). Note that the RAVB driver does not use this region. Fixes: bea2ab136eaacec2 ("arm64: dts: renesas: r8a77970: add EtherAVB support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a77980: add SYS-DMAC supportSergei Shtylyov
Describe SYS-DMAC1/2 in the R8A77980 device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: initial R8A77980 SoC device treeSergei Shtylyov
The initial R8A77980 SoC device tree including Cortex-A53 CPU, GIC, timer, CPG, RST, and SYSC. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: add Renesas R8A77980 supportSergei Shtylyov
Add a configuration option for the R-Car V3H (R8A77980) SoC. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: draak: enable I2C controller 1Ulrich Hecht
No devices to add, I2C1 has an external connector only. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: draak: enable I2C controller 0 and EEPROMUlrich Hecht
Enables EEPROM on I2C0 on the Draak board. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a77995: add I2C supportUlrich Hecht
Defines R-Car D3 I2C controllers 0-3. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a7796: update register size for thermalNiklas Söderlund
To be able to read fused calibration values from hardware the size of the register resource of TSC1 needs to be incremented to cover one more register which holds the information if the calibration values have been fused or not. Instead of increasing TSC1 size to the value from the datasheet update all TSC's size to the smallest granularity of the address decoder circuitry. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a7795: update register size for thermalNiklas Söderlund
To be able to read fused calibration values from hardware the size of the register resource of TSC1 needs to be incremented to cover one more register which holds the information if the calibration values have been fused or not. Instead of increasing TSC1 size to the value from the datasheet update all TSC's size to the smallest granularity of the address decoder circuitry Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a77995: move nodes which have no reg property out of busSimon Horman
Move pmu_a53 and timer nodes from soc node to root node. The nodes that have been moved do not have any register properties and thus shouldn't be placed on the bus. This problem is flagged by the compiler as follows: $ make W=1 ... arch/arm64/boot/dts/renesas/r8a77995-draak.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property arch/arm64/boot/dts/renesas/r8a77995-draak.dtb: Warning (simple_bus_reg): Node /soc/pmu_a53 missing or empty reg/ranges property Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a77970: move node which has no reg property out of busSimon Horman
Move timer node from soc node to root node. The node that have been moved do not have any register properties and thus shouldn't be placed on the bus. This problem is flagged by the compiler as follows: $ make W=1 ... DTC arch/arm64/boot/dts/renesas/r8a77970-eagle.dtb arch/arm64/boot/dts/renesas/r8a77970-eagle.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property DTC arch/arm64/boot/dts/renesas/r8a77970-v3msk.dtb arch/arm64/boot/dts/renesas/r8a77970-v3msk.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: salvator-common: add GPIO extenderWolfram Sang
We need to configure its GPIOs later. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a7795: add thermal cooling managementNiklas Söderlund
Add nodes and properties for thermal cooling management support. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a7796: add thermal cooling managementNiklas Söderlund
Add nodes and properties for thermal cooling management support. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12arm64: dts: renesas: r8a7796: Add OPPs table for cpu devicesDien Pham
Define OOP tables for all CPUs. This allows CPUFreq to function. Based in part on work by Hien Dang. Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2018-02-12arm64: dts: renesas: r8a7795: Add OPPs table for cpu devicesDien Pham
Define OOP tables for all CPUs. This allows CPUFreq to function. Based in part on work by Hien Dang. Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2018-02-12arm64: dts: renesas: r8a7795: move scif node into alphabetical orderSimon Horman
Move scif node so that sub-nodes of the root node are in alphabetical order. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2018-02-11Linux 4.16-rc1v4.16-rc1Linus Torvalds
2018-02-11unify {de,}mangle_poll(), get rid of kernel-side POLL...Al Viro
except, again, POLLFREE and POLL_BUSY_LOOP. With this, we finally get to the promised end result: - POLL{IN,OUT,...} are plain integers and *not* in __poll_t, so any stray instances of ->poll() still using those will be caught by sparse. - eventpoll.c and select.c warning-free wrt __poll_t - no more kernel-side definitions of POLL... - userland ones are visible through the entire kernel (and used pretty much only for mangle/demangle) - same behavior as after the first series (i.e. sparc et.al. epoll(2) working correctly). Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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