Age | Commit message (Collapse) | Author |
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Fixes hangs with DPM in some cases.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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The rv770 version was using the wrong power state type.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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This adds dpm support for SI asics. This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2/gen3 switching
- power containment
- shader power scaling
Set radeon.dpm=1 to enable.
v2: enable hainan support, rebase
v3: guard acpi stuff
v4: fix 64 bit math
v5: fix 64 bit div harder
v6: fix thermal interrupt check noticed by Jerome
v7: attempt fix state enable
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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into drm-next
These changes are mostly minor fixes to things introduced in 3.10. The
biggest chunk is updates to the host1x firewall which checks job
submissions from userspace and wasn't working properly. All other
patches are mostly one-liners. Nothing new or too exciting this time
around.
* 'drm/for-next' of git://anongit.freedesktop.org/tegra/linux:
gpu: host1x: Rework CPU syncpoint increment
gpu: host1x: Fix client_managed type
gpu: host1x: Fix memory access in syncpt request
gpu: host1x: Copy gathers before verification
gpu: host1x: Don't reset firewall between gathers
gpu: host1x: Check reloc table before usage
gpu: host1x: Check INCR opcode correctly
drm/tegra: Remove DRIVER_BUS_PLATFORM from driver_features
drm/tegra: Fix return value
drm/tegra: Include header drm/drm.h
MAINTAINERS: Update Tegra DRM entry
drm/tegra: fix error return code in gr2d_submit()
drm/tegra: fix missing unlock on error
drm/tegra: Honor pixel-format changes
drm/tegra: Explicitly set irq_enabled
drm/tegra: Don't disable unused planes
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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The arrays items are variable sized.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Add a helper function to determine the preferred
pcie gen based on the card, system, and circumstance.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Add a way to look up the bootup mvdd. Required for DPM on SI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Validate the voltages against the voltage requirements of the
dispclk. We currently don't adjust the disp clock so it never
changes, but we need to filter out voltage levels that are too
low none the less.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Forgot to free some structs when allocation fails for some
tables.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Use the new fixed point functions for leakage
calculations on cayman.
v2: fix up 64 bit math
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Required for certain driver calculations. Code
was written by Christian König and ported to the
drm by me.
v2: fix 64 bit divides
v3: fix 64 bit for real (math64.h)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Consolidate the non-register defines.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Required for SI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Used by SI dpm.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Required for dpm on SI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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This makes it easier the understand what the code is
doing.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Only Cape Verde supports power gating.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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These are needed for certain UVD power saving features.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Required for DPM on SI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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This is required for certain power management features.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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TN has some additional powergating features beyond what is
supported on ON/LN.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Enables PCIE ASPM (Active State Power Management) on
SI asics.
v2: fix typo
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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