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2020-07-13Merge tag 'arm-soc/for-5.9/devicetree' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.9 please pull the following: - Rafal specifies the switch ports for various Luxul devices (XAP-1410, XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150) - Krzysztof fixes the L2 cache controller node name to conform to dtschema - Maxime introduces two new clock providers for Raspberry Pi 4, one to support firmware based clocks and another one for the DVP block feeding into the two HDMI blocks. * tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: bcm: Align L2 cache-controller nodename with dtschema ARM: dts: BCM5301X: Specify switch ports for Luxul devices ARM: dts: bcm2711: Add HDMI DVP ARM: dts: bcm2711: Add firmware clocks node Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13Merge tag 'omap-for-v5.9/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Device tree changes for omaps for v5.9 merge window This series of changes configures the GPIO line names for am335x beaglebone black and pocketbeagle to make it easier to configure the pins. To make use of the pins, we also add the gpio-ranges for am335x. We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then there are two non-urgent dtschema validator warning fixes. * tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-pocketbeagle: add gpio-line-names ARM: dts: am335x-boneblack: add gpio-line-names ARM: dts: am33xx-l4: add gpio-ranges ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs ARM: dts: am: Align L2 cache-controller nodename with dtschema ARM: dts: omap: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13Merge tag 'uniphier-dt64-v5.9' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt UniPhier ARM64 SoC DT updates for v5.9 - add missing interrupts property to support card serial - fix node names to follow the DT schema - add clock-names and reset-names to pcie-phy * tag 'uniphier-dt64-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy arm64: dts: uniphier: Rename ethphy node to ethernet-phy arm64: dts: uniphier: give fixed port number to support card serial arm64: dts: uniphier: add interrupts to support card serial Link: https://lore.kernel.org/r/CAK7LNARK4SKhSW-xwgc3vq7FO7N864jPgzm8NtsGOv8wVFVyBQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13Merge tag 'uniphier-dt-v5.9' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt UniPhier ARM SoC DT updates for v5.9 - add missing interrupts property to support card serial - fix node names to follow the DT schema - add PCIe endpoint and PHY nodes for Pro5 SoC - simplify device hierarchy of support-card.dtsi * tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: simplify support-card node structure ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5 ARM: dts: uniphier: Rename ethphy node to ethernet-phy ARM: dts: uniphier: give fixed port number to support card serial ARM: dts: uniphier: rename support card serial node to fix schema warning ARM: dts: uniphier: add interrupts to support card serial Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13ARM: dts: imx6ull: add MYiR MYS-6ULX SBCParthiban Nallathambi
Add support for the MYiR imx6ULL based single board computer equipped with on board 256MB NAND & RAM. The board also provides expansion header for expansion board, but this commit adds only support for SBC. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-spb4: Add node for switch watchdogChris Healy
Add I2C child node for switch watchdog present on SPB4 Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: colibri-imx6: remove pinctrl-names orphanPhilippe Schenker
This is not necessary without a pinctrl-0 statement. Remove this orphan. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi filesUwe Kleine-König
The imx-pwm driver supports 3 cells and this is the more flexible setting. So use it by default and overwrite it back to two for the files that reference the PWMs with just 2 cells to minimize changes. This allows to drop explicit setting to 3 cells for the boards that already depend on this. The boards that are now using 2 cells explicitly can be converted to 3 individually. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseXAndrew Lunn
The SFF soldered onto the board expect the ports to use 1000BaseX. It makes no sense to have the ports set to SGMII, since they don't even support that mode. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseXChris Healy
The SFF soldered onto the board expects the port to use 1000BaseX. It makes no sense to have the port set to SGMII, since it doesn't even support that mode. Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ZII: update MDIO speed and preambleChris Healy
Update MDIO configuration with ZII devices to fully utilize MDIO endpoint capabilities. All devices support 12.5MHz clock and don't require MDIO preable. Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vfxxx: Add node for CAAMAndrey Smirnov
Add node for CAAM device in NXP Vybrid SoC. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qp-sabresd: enable sataRichard Zhu
Enable SATA on iMX6QP SABRESD board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qp-sabreauto: enable sataRichard Zhu
Enable SATA on iMX6QP SABREAUTO board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic RVT boardOleksij Rempel
Protonic RVT is an internal development platform for a wireless ISObus Virtual Terminal based on COTS tablets, and the predecessor of the WD2 platform. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic VT7 boardOleksij Rempel
The Protonic VT7 is a mid-class ISObus Virtual Terminal with a 7 inch touchscreen display. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic WD2 boardOleksij Rempel
Add support for the Protonic WD2 board, which is an internal development platform for low-cost agricultural Virtual Terminals based on COTS tablets and web applications. It inherits from the PRTI6Q base class. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic PRTI6Q boardOleksij Rempel
Protonic PRTI6Q is a development board and a base class for different specific customer application boards based on the i.MX6 family of SoCs, developed by Protonic Holland. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6ul: Add ASRC device nodeShengjiu Wang
Add ASRC device node. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski
Fix dtschema validator warnings like: l2-cache@a02000: $nodename:0: 'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski
Fix dtschema validator warnings like: l2-cache@40006000: $nodename:0: 'l2-cache@40006000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sdb: Add MQS supportShengjiu Wang
Add MQS support. As the pin conflict with usdhc2, then need to add a separate dts. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ls1021a: add ftm_alarm0 DT nodeBiwen Li
The patch add ftm_alarm0 DT node - add rcpm node - add ftm_alarm0 node - aliases ftm_alarm0 as rtc1 Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sabreauto: Add cs42888 sound card supportShengjiu Wang
Complete the ESAI node and Add cs42888 sound card support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sabreauto: Add SPDIF supportShengjiu Wang
Add SPDIF support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sdb: Add SPDIF supportShengjiu Wang
Add SPDIF support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx: Enable ASRC deviceShengjiu Wang
Add compatible string, update the clock table, add fsl,asrc-rate and fsl,asrc-width property. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13arm64: dts: ls1028a-qds: Add DSPI flash nodesXiaowei Bao
Add the DSPI flash nodes into fsl-ls1028a-qds.dts Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx53-ppd: alarm LEDs use kernel LED interfaceIan Ray
Use kernel LED interface for the alarm LEDs. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Samu Nuutamo <samu.nuutamo@vincit.fi> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sll: Make ssi node name same as other platformsShengjiu Wang
In imx6sll.dtsi, the ssi node name is different with other platforms (imx6qdl, imx6sl, imx6sx), but the sound/soc/fsl/fsl-asoc-card.c machine driver needs to check ssi node name for audmux configuration, then different ssi node name causes issue on imx6sll platform. So we change ssi node name to make all platforms have same name. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change usdhc node name on i.MX6/i.MX7 SoCsAnson Huang
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change esdhc node name on i.MX2/i.MX3/i.MX5 SoCsAnson Huang
Change i.MX2/i.MX3/i.MX5 SoCs esdhc node name from esdhc to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change sdhci node name on i.MX27/i.MX31 SoCsAnson Huang
Change i.MX27/i.MX31 node name from sdhci to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qdl: Remove invalid interrupt for GPC nodeAnson Huang
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved, so remove it from GPC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: change iim node name on i.MX SoCsAnson Huang
Change IIM node name from iim to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: change ocotp node name on MXS SoCsAnson Huang
Change OCOTP node name from ocotp to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: change ocotp node name on i.MX6/7 SoCsAnson Huang
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ls1021a: output PPS signal on FIPER2Yangbo Lu
The timer fixed interval period pulse generator register is used to generate periodic pulses. The down count register loads the value programmed in the fixed period interval (FIPER). At every tick of the timer accumulator overflow, the counter decrements by the value of TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down counter value reaches zero. It reloads the down counter in the cycle following a pulse. To use the TMR_FIPER register to generate desired periodic pulses. The value should programmed is, desired_period - tclk_period Current tmr-fiper2 value is to generate 100us periodic pulses. (But the value should have been 99995, not 99990. The tclk_period is 5.) This patch is to generate 1 second periodic pulses with value 999999995 programmed which is more desired by user. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Make tempmon node as child of anatop nodeAnson Huang
i.MX6/7 SoCs' temperature sensor is inside anatop module from HW perspective, so it should be a child node of anatop. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13arm64: dts: lx2160a: Increase configuration space sizeWasim Khan
lx2160a rev2 requires 4KB space for type0 and 4KB space for type1 iATU window. Increase configuration space size to 8KB to have sufficient space for type0 and type1 window. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Li Yang <leoyang.li@nxp.com> Acked-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13arm64: dts: renesas: r8a77970: eagle/v3msk: Add QSPI flash supportSergei Shtylyov
Define the Eagle/V3MSK board dependent parts of the RPC-IF device node. Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it. Based on the original patches by Dmitry Shifrin. Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Link: https://lore.kernel.org/r/fca1d012-29bf-eead-1c0d-4dd837c0bc68@cogentembedded.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13arm64: dts: renesas: r8a77970: Add RPC-IF supportSergei Shtylyov
Describe RPC-IF in the R8A77970 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Link: https://lore.kernel.org/r/ba8bb326-7e77-6ab7-668f-fdc22010c8ef@cogentembedded.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13arm64: dts: renesas: r8a77980: condor/v3hsk: Add QSPI flash supportSergei Shtylyov
Define the Condor/V3HSK board dependent parts of the RPC-IF device node. Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it. Based on the original patches by Dmitry Shifrin. Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Link: https://lore.kernel.org/r/322ca212-a45f-cd2c-f1eb-737f0aa42d22@cogentembedded.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13arm64: dts: renesas: r8a77980: Add RPC-IF supportSergei Shtylyov
Describe RPC-IF in the R8A77980 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Link: https://lore.kernel.org/r/f18853d9-8ef9-717a-9039-2191b26e579f@cogentembedded.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13arm64: dts: zii-ultra: update MDIO speed and preambleChris Healy
Update MDIO configuration with zii-ultra device to fully utilize MDIO endpoint capabilities. Device supports 12.5MHz clock and doesn't require MDIO preamble. Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13clk: renesas: Add r8a774e1 CPG Core Clock DefinitionsMarian-Cristian Rotariu
Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed in Table 11.2 ("List of Clocks [RZ/G2H]") of the RZ/G2H Hardware User's Manual. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13dt-bindings: power: Add r8a774e1 SYSC power domain definitionsMarian-Cristian Rotariu
This patch adds power domain indices for the RZ/G2H (r8a774e1) SoC. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13dt-bindings: reset: renesas,rst: Document r8a774e1 reset moduleMarian-Cristian Rotariu
Document bindings for the RZ/G2H (R8A774E1) reset module. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC bindingMarian-Cristian Rotariu
Document bindings for the RZ/G2H (aka R8A774E1) SYSC block. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13dt-bindings: arm: renesas: Add HopeRun RZ/G2H boardsMarian-Cristian Rotariu
This patch adds board HiHope RZ/G2H (the main board, powered by the R8A774E1) and board HiHope RZ/G2 EX (the expansion board that sits on top of the HiHope RZ/G2H). Both boards are made by Jiangsu HopeRun Software Co., Ltd. (a.k.a. HopeRun). Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>