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2012-11-15ARM: tegra: Add Tegra20 host1x supportThierry Reding
Add the host1x node along with its children to the Tegra20 DTSI. Board- specific DTS files are expected to enable the available outputs and complement the device tree with data specific to the hardware. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: trimslice: enable SPI flashStephen Warren
TrimSlice contains a 1MiB SPI flash. Represent this in the device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: add sflash controller dt entryLaxman Dewangan
Nvidia's Tegra20 have the SPI (SFLASH) controller to interface with spi flash device which is used for system boot. Add DT entry for this controller. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: move sflash node to keep file sorted] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: ventana: Add NCT1008 temperature sensorThierry Reding
The Harmony board has an ON Semiconductors NCT1008 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tamonten: Add NCT1008 temperature sensorThierry Reding
The Tamonten SOM has an ON Semiconductor NCT1008 connected to the DVC bus which is used to measure the ambient (local) temperature as well as the on-die (remote) temperature. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: harmony: Add ADT7641 temperature sensorThierry Reding
The Harmony board has an Analog Devices ADT7461 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tec: Remove redundant DT propertiesThierry Reding
These properties are already set by the tegra20-tamonten.dtsi, so they don't need to be repeated. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tamonten: Add DDC/PTA pinmuxThierry Reding
This commit allows the I2C2 controller on Tegra20 to be routed either to the DDC or the PTA pin group at runtime. On Tamonten this allows the I2C bus to be used for the DDC of the HDMI connector or to access I2C chips on the carrier board. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: cardhu: enable SLINK4Laxman Dewangan
Enable SLINK4 and connected device in Tegra30 based platform Cardhu. Setting maximum spi frequency to 25MHz. SPI serial flash is connected on CS1 of SLINK4 on cardhu platform. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: swapped reg/compatible order to be consistent] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: add slink controller dt entryLaxman Dewangan
Add slink controller details in the dts file of Tegra20 and Tegra30. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: tegra: ventana: define pinmux for ddcMark Zhang
Tegra 2's I2C2 controller can be routed to either the PTA or DDC pin group on Ventana. So: - Remove the HDMI function definition of pta pingroup - Define child i2c adapters(ddc & pta) for I2C2 controller Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t30 cardhu: set pinmux and power for wlanWei Ni
Configure pinmux as required for WiFi. Enable the SDHCI1 controller for a02 and a04 board, which is connected to the WiFi module. For now, always enable the regulator that provides power to the Wifi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t20 ventana: set pinmux and power for wlanWei Ni
Configure pinmux as required for WiFi. Enable the SDHCI1 controller, which is connectted to the WiFi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t20 seaboard: turn on the power for wlanWei Ni
Enable the SDHCI1 controller. This is connected to the WiFi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra30 host1x clock supportThierry Reding
Setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra30 host1xThierry Reding
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra20 host1x clock supportThierry Reding
Extend the pll_d frequency table with a few entries to support common HDMI and LVDS display modes and setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra20 host1xThierry Reding
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Tegra30 speedo-based process identificationDanny Huang
This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add speedo-based process identificationDanny Huang
Detect CPU and core process ID by checking speedo corner tables. This can provide a more accurate process ID. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra2/Tegra20/ in log print] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: flexible spare fuse read functionDanny Huang
Change the spare fuse base from a definition to a variable. It provides flexibilty to read spare fuse on different chip. Signed-off-by: Danny Huang <dahuang@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-14ARM: tegra: Implement 6395/1 for TegraPeter De Schrijver
This patch implements ARM linux patch 6395/1 for Tegra. See commit 1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register" for details. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> [swarren: added commit subject for referenced patch] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-13ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dtLaxman Dewangan
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20 board dt files. Set the parent clock of sflash controller to PLLP and configure clock to 20MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-09ARM: tegra: enable data prefetch on L2Joseph Lo
Enable the data prefetch on L2. The bit28 in aux ctrl register. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2012-11-05ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dtLaxman Dewangan
Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30 board dt files. Set the parent clock of slink controller to PLLP and configure clock to 100MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: common: using OF api for L2 cache initJoseph Lo
Moving L2 cache init to DT support. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: dt: add L2 cache controllerJoseph Lo
Add L2 cache controller binding into DT for Tegra. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra30: clocks: add AHB and APB clocksJoseph Lo
Adding the AHB and APB bus clock for Tegra30. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: set up wlan clocks for tegra dtWei Ni
Set up the wlan clock tree for Tegra20 and Tegra30. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move irammap.h to mach-tegraStephen Warren
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../irammap.h" becaue of this change. Both these usages will be removed shortly, when Tegra's DEBUG_LL implementation is updated not to pass information through IRAM. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move iomap.h to mach-tegraStephen Warren
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: remove <mach/dma.h>Stephen Warren
Remove includes of <mach/dma.h> from sound/soc; nothing from it is used. Remove include of <mach/dma.h> from mach-tegra/apbio.c; since the DMA transfers made by this file don't need flow-control with any peripheral, there's no need to set any slave ID. Once those changes are made, there are no remaining users of <mach/dma.h> so remove it. Drivers should get this information from device tree. This removal is necessary for single zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-11-05ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/Stephen Warren
We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible to enable single zImage. Move tegra-ahb.h to a more central location (suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c include the header to ensure client and provider agree on the prototype. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: remove unnecessary includes of <mach/*.h>Stephen Warren
This should make it easier to delete or move <mach/*.h>; something that is useful for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05iommu: tegra: remove include of <mach/iomap.h>Stephen Warren
Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joerg Roedel <joerg.roedel@amd.com>
2012-11-05staging: nvec: remove include of <mach/iomap.h>Stephen Warren
Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Marc Dietrich <marvin24@gmx.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-05crypto: tegra: remove include of <mach/clk.h>Stephen Warren
Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-05ARM: tegra: update *.dts for regulator-compatible deprecationStephen Warren
Commit 13511de "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-11-05usb: phy: tegra remove include of <mach/iomap.h>Stephen Warren
Almost nothing from this file is used, and the file will hopefully be deleted soon. Copy the tiny portions that are used directly into tegra_usb_phy.c. I believe that Venu Byravarasu is working on cleaning up our USB driver, and those cleanups will remove the need for these constants. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-05usb: host: tegra remove include of <mach/iomap.h>Stephen Warren
Almost nothing from this file is used, and the file will hopefully be deleted soon. Copy the tiny portions that are used directly into ehci-tegra.c. I believe that Venu Byravarasu is working on cleaning up our USB driver, and those cleanups will remove the need for these constants. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-04Linux 3.7-rc4v3.7-rc4Linus Torvalds
2012-11-03Merge tag 'nfs-for-3.7-4' of git://git.linux-nfs.org/projects/trondmy/linux-nfsLinus Torvalds
Pull NFS client bugfixes from Trond Myklebust: - Fix a bunch of deadlock situations: * State recovery can deadlock if we fail to release sequence ids before scheduling the recovery thread. * Calling deactivate_super() from an RPC workqueue thread can deadlock because of the call to rpc_shutdown_client. - Display the device name correctly in /proc/*/mounts - Fix a number of incorrect error return values: * When NFSv3 mounts fail due to a timeout. * On NFSv4.1 backchannel setup failure * On NFSv4 open access checks - pnfs_find_alloc_layout() must check the layout pointer for NULL - Fix a regression in the legacy DNS resolved * tag 'nfs-for-3.7-4' of git://git.linux-nfs.org/projects/trondmy/linux-nfs: NFS4: nfs4_opendata_access should return errno NFSv4: Initialise the NFSv4.1 slot table highest_used_slotid correctly SUNRPC: return proper errno from backchannel_rqst NFS: add nfs_sb_deactive_async to avoid deadlock nfs: Show original device name verbatim in /proc/*/mount{s,info} nfsv3: Make v3 mounts fail with ETIMEDOUTs instead EIO on mountd timeouts nfs: Check whether a layout pointer is NULL before free it NFS: fix bug in legacy DNS resolver. NFSv4: nfs4_locku_done must release the sequence id NFSv4.1: We must release the sequence id when we fail to get a session slot NFS: Wait for session recovery to finish before returning
2012-11-03Merge branch 'release' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux Pull thermal management & ACPI update from Zhang Rui, Ho humm. Normally these things go through Len. But it's just three small fixes, I guess I can pull directly too. * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: exynos4_tmu_driver_ids should be exynos_tmu_driver_ids. ACPI video: Ignore errors after _DOD evaluation. thermal: solve compilation errors in rcar_thermal
2012-11-03Merge branch 'i2c-embedded/for-current' of ↵Linus Torvalds
git://git.pengutronix.de/git/wsa/linux Pull i2c embedded fixes from Wolfram Sang: "Two patches are usual stuff. The bigger patch is needed to correct a wrong decision made in this merge window. We hoped to get the PIOQUEUE mode in the mxs driver working with DMA, but it turned out to be too broken (leading to data loss), so we now think it is best to remove it entirely and work only with DMA now. The patch should be in 3.7. IMO, so users never get the chance to use both modes in parallel." * 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux: i2c: tegra: set irq name as device name i2c-nomadik: Fixup clock handling i2c: mxs: remove broken PIOQUEUE support
2012-11-03Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
Pull drm fixes from Dave Airlie: "Scattered selection of fixes: - radeon: load detect fixes from SuSE/AMD - intel: misc i830, sdvo regression, vesafb kickoff ums fix - exynos: maintainers entry update + fixes - udl: fix stride scanout issue it's slightly bigger than I'd probably like, but nothing looked dangerous enough to hold off on." * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/udl: fix stride issues scanning out stride != width*bpp drm/radeon: add load detection support for ext DAC on R200 (v2) DRM/radeon: For single CRTC GPUs move handling of CRTC_CRT_ON to crtc_dpms(). DRM/Radeon: Fix TV DAC Load Detection for single CRTC chips. DRM/Radeon: Clean up code in TV DAC load detection. drm/radeon: fix ATPX function documentation drivers/gpu/drm/radeon/evergreen_cs.c: Remove unnecessary semicolon DRM/Radeon: On DVI-I use Load Detection when EDID is bogus. DRM/Radeon: Fix primary DAC Load Detection for RV100 chips. DRM/Radeon: Fix Load Detection on legacy primary DAC. drm: exynos: removed warning due to missing typecast for mixer driver data drm/exynos: add support for ARCH_MULTIPLATFORM MAINTAINERS: Add git repository for Exynos DRM drm/exynos: fix display on issue drm/i915: Only kick out vesafb if we takeover the fbcon with KMS drm/i915: be less verbose about inability to provide vendor backlight drm/i915: clear the entire sdvo infoframe buffer drm/i915: VGA needs to be on pipe A on i830M drm/i915: fix overlay on i830M
2012-11-02Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds
Pull networking fixes from David Miller: "First post-Sandy pull request" 1) Fix antenna gain handling and initialization of chan->max_reg_power in wireless, from Felix Fietkau. 2) Fix nexthop handling in H.232 conntrack helper, from Julian Anastasov. 3) Only process 80211 mesh config header in certain kinds of frames, from Javier Cardona. 4) 80211 management frame header length needs to be validated, from Johannes Berg. 5) Don't access free'd SKBs in ath9k driver, from Felix Fietkay. 6) Test for permanent state correctly in VXLAN driver, from Stephen Hemminger. 7) BNX2X bug fixes from Yaniv Rosner and Dmitry Kravkov. 8) Fix off by one errors in bonding, from Nikolay ALeksandrov. 9) Fix divide by zero in TCP-Illinois congestion control. From Jesper Dangaard Brouer. 10) TCP metrics code says "Yo dawg, I heard you like sizeof, so I did a sizeof of a sizeof, so you can size your size" Fix from Julian Anastasov. 11) Several drivers do mdiobus_free without first doing an mdiobus_unregister leading to stray pointer references. Fix from Peter Senna Tschudin. 12) Fix OOPS in l2tp_eth_create() error path, it's another danling pointer kinda situation. Fix from Tom Parkin. 13) Hardware driven by the vmxnet driver can't handle larger than 16K fragments, so split them up when necessary. From Eric Dumazet. 14) Handle zero length data length in tcp_send_rcvq() properly. Fix from Pavel Emelyanov. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (38 commits) tcp-repair: Handle zero-length data put in rcv queue vmxnet3: must split too big fragments l2tp: fix oops in l2tp_eth_create() error path cxgb4: Fix unable to get UP event from the LLD drivers/net/phy/mdio-bitbang.c: Call mdiobus_unregister before mdiobus_free drivers/net/ethernet/nxp/lpc_eth.c: Call mdiobus_unregister before mdiobus_free bnx2x: fix HW initialization using fw 7.8.x tcp: Fix double sizeof in new tcp_metrics code net: fix divide by zero in tcp algorithm illinois net: sctp: Fix typo in net/sctp bonding: fix second off-by-one error bonding: fix off-by-one error bnx2x: Disable FCoE for 57840 since not yet supported by FW bnx2x: Fix no link on 577xx 10G-baseT bnx2x: Fix unrecognized SFP+ module after driver is loaded bnx2x: Fix potential incorrect link speed provision bnx2x: Restore global registers back to default. bnx2x: Fix link down in 57712 following LFA bnx2x: Fix 57810 1G-KR link against certain switches. ixgbe: PTP get_ts_info missing software support ...
2012-11-02tcp-repair: Handle zero-length data put in rcv queuePavel Emelyanov
When sending data into a tcp socket in repair state we should check for the amount of data being 0 explicitly. Otherwise we'll have an skb with seq == end_seq in rcv queue, but tcp doesn't expect this to happen (in particular a warn_on in tcp_recvmsg shoots). Signed-off-by: Pavel Emelyanov <xemul@parallels.com> Reported-by: Giorgos Mavrikas <gmavrikas@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-02vmxnet3: must split too big fragmentsEric Dumazet
vmxnet3 has a 16Kbytes limit per tx descriptor, that happened to work as long as we provided PAGE_SIZE fragments. Our stack can now build larger fragments, so we need to split them to the 16kbytes boundary. Signed-off-by: Eric Dumazet <edumazet@google.com> Reported-by: jongman heo <jongman.heo@samsung.com> Tested-by: jongman heo <jongman.heo@samsung.com> Cc: Shreyas Bhatewara <sbhatewara@vmware.com> Reviewed-by: Bhavesh Davda <bhavesh@vmware.com> Signed-off-by: Shreyas Bhatewara <sbhatewara@vmware.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-02l2tp: fix oops in l2tp_eth_create() error pathTom Parkin
When creating an L2TPv3 Ethernet session, if register_netdev() should fail for any reason (for example, automatic naming for "l2tpeth%d" interfaces hits the 32k-interface limit), the netdev is freed in the error path. However, the l2tp_eth_sess structure's dev pointer is left uncleared, and this results in l2tp_eth_delete() then attempting to unregister the same netdev later in the session teardown. This results in an oops. To avoid this, clear the session dev pointer in the error path. Signed-off-by: Tom Parkin <tparkin@katalix.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-03exynos4_tmu_driver_ids should be exynos_tmu_driver_ids.Jonghwan Choi
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Reviewed-by: Amit Daniel Kachhap <amit.kachhap@linaro.org> Signed-off-by: Zhang Rui <rui.zhang@intel.com>