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2014-08-05drm/radeon: enable display scaling on all connectors (v2)Alex Deucher
This enables the display scaler on all connectors for r5xx and newer asics. Previously we only enabled the scaler for fixed mode displays (eDP or LVDS) since they have to use the scaler to support non-native modes. Most other displays are multi-sync or have a built in scaler to support non-native modes. The default scaling mode for non-fixed displays is none which will use the scaler in the monitor. Note that we do not populate any fake modes like we do for fixed displays so it will only use the modes in the edid. For other modes, you'll need to populate them manually. bug: https://bugs.freedesktop.org/show_bug.cgi?id=80868 v2: properly handle scaling with no modes defined Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm/radeon: remove null test before kfreeFabian Frederick
Fix checkpatch warning: WARNING: kfree(NULL) is safe this check is probably not required Cc: Alex Deucher <alexander.deucher@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm/radeon/cik: Add support for new ucode format (v5)Alex Deucher
This adds CIK support for the new ucode format. v2: add size validation, integrate debug info v3: add support for MEC2 on KV v4: fix typos v4: update to latest format Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm/radeon/si: Add support for new ucode format (v3)Alex Deucher
This adds SI support for the new ucode format. v2: add size validation, integrate debug info v3: update to latest version Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm/radeon: add new firmware header definitions (v3)Alex Deucher
These are needed to properly handle more frequently updated firmware. v2: add new firmware helper functions as well. v3: update to latest format Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm/radeon: disable gfx cgcg on cikAlex Deucher
This needs some tweaking to be stable with newer ucode versions. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm/radeon/dpm: add support for SVI2 voltage for SIAlex Deucher
Some newer boards use SVI2 for voltage control rather than GPIO. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm: Fix race when checking for fb in the generic kms obj lookupDaniel Vetter
In my review of commit 98f75de40e9d83c3a90d294b8fd25fa2874212a9 Author: Rob Clark <robdclark@gmail.com> Date: Fri May 30 11:37:03 2014 -0400 drm: add object property typ I asked for a check to make sure that we never leak an fb from the generic mode object lookup since those have completely different lifetime rules. Rob added it, but outside of the idr mutex, which means that our dereference of obj->type can already chase free'd memory. Somehow I didn't spot this, so fix this asap. v2: Simplify the conditionals as suggested by Chris. Cc: Rob Clark <robdclark@gmail.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm: Unlink dead file_priv from list of active files firstChris Wilson
In order to prevent external observers walking the list of open DRM files from seeing an invalid drm_file_private in the process of being torndown, the first operation we need to take is to unlink the drm_file_private from that list. general protection fault: 0000 [#1] PREEMPT SMP Modules linked in: i915 i2c_algo_bit drm_kms_helper drm lpc_ich mfd_core nls_iso8859_1 i2c_hid video hid_generic usbhid hid e1000e ahci ptp libahci pps_core CPU: 3 PID: 8220 Comm: cat Not tainted 3.16.0-rc6+ #4 Hardware name: Intel Corporation Shark Bay Client platform/WhiteTip Mountain 1, BIOS HSWLPTU1.86C.0119.R00.1303230105 03/23/2013 task: ffff8800219642c0 ti: ffff880047024000 task.ti: ffff880047024000 RIP: 0010:[<ffffffffa0137c70>] [<ffffffffa0137c70>] per_file_stats+0x110/0x160 [i915] RSP: 0018:ffff880047027d48 EFLAGS: 00010246 RAX: 6b6b6b6b6b6b6b6b RBX: ffff880047027e30 RCX: 0000000000000000 RDX: 0000000000000001 RSI: 0000000000000000 RDI: ffff88003a05cd00 RBP: ffff880047027d58 R08: 0000000000000001 R09: 0000000000000000 R10: ffff8800219642c0 R11: 0000000000000000 R12: ffff88003a05cd00 R13: 0000000000000000 R14: ffff88003a05cd00 R15: ffff880047027d88 FS: 00007f5f73a13740(0000) GS:ffff88014e380000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00000000023ff038 CR3: 0000000021a4b000 CR4: 00000000001407e0 Stack: 0000000000000001 000000000000ffff ffff880047027dc8 ffffffff813438e4 ffff880047027e30 ffffffffa0137b60 ffff880021a8af58 ffff880021a8f1a0 ffff8800a2061fb0 ffff8800a2062048 ffff8800a2061fb0 ffff8800a1e23478 Call Trace: [<ffffffff813438e4>] idr_for_each+0xf4/0x180 [<ffffffffa0137b60>] ? i915_gem_stolen_list_info+0x1f0/0x1f0 [i915] [<ffffffffa013a17a>] i915_gem_object_info+0x5ca/0x6a0 [i915] [<ffffffff81193ec5>] seq_read+0xf5/0x3a0 [<ffffffff8116d950>] vfs_read+0x90/0x150 [<ffffffff8116e509>] SyS_read+0x49/0xb0 [<ffffffff815d8622>] tracesys+0xd0/0xd5 Code: 01 00 00 49 39 84 24 08 01 00 00 74 55 49 8b 84 24 b8 00 00 00 48 01 43 18 31 c0 5b 41 5c 5d c3 0f 1f 00 49 8b 44 24 08 4c 89 e7 <48> 8b 70 28 48 81 c6 48 80 00 00 e8 80 14 01 00 84 c0 74 bc 49 RIP [<ffffffffa0137c70>] per_file_stats+0x110/0x160 [i915] RSP <ffff880047027d48> Reported-by: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81712 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com> Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm/ttm: Pass GFP flags in order to avoid deadlock.Tetsuo Handa
Commit 7dc19d5a "drivers: convert shrinkers to new count/scan API" added deadlock warnings that ttm_page_pool_free() and ttm_dma_page_pool_free() are currently doing GFP_KERNEL allocation. But these functions did not get updated to receive gfp_t argument. This patch explicitly passes sc->gfp_mask or GFP_KERNEL to these functions, and removes the deadlock warning. Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: stable <stable@kernel.org> [2.6.35+] Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm/ttm: Fix possible stack overflow by recursive shrinker calls.Tetsuo Handa
While ttm_dma_pool_shrink_scan() tries to take mutex before doing GFP_KERNEL allocation, ttm_pool_shrink_scan() does not do it. This can result in stack overflow if kmalloc() in ttm_page_pool_free() triggered recursion due to memory pressure. shrink_slab() => ttm_pool_shrink_scan() => ttm_page_pool_free() => kmalloc(GFP_KERNEL) => shrink_slab() => ttm_pool_shrink_scan() => ttm_page_pool_free() => kmalloc(GFP_KERNEL) Change ttm_pool_shrink_scan() to do like ttm_dma_pool_shrink_scan() does. Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: stable <stable@kernel.org> [2.6.35+] Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm/ttm: Use mutex_trylock() to avoid deadlock inside shrinker functions.Tetsuo Handa
I can observe that RHEL7 environment stalls with 100% CPU usage when a certain type of memory pressure is given. While the shrinker functions are called by shrink_slab() before the OOM killer is triggered, the stall lasts for many minutes. One of reasons of this stall is that ttm_dma_pool_shrink_count()/ttm_dma_pool_shrink_scan() are called and are blocked at mutex_lock(&_manager->lock). GFP_KERNEL allocation with _manager->lock held causes someone (including kswapd) to deadlock when these functions are called due to memory pressure. This patch changes "mutex_lock();" to "if (!mutex_trylock()) return ...;" in order to avoid deadlock. Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: stable <stable@kernel.org> [3.3+] Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm/ttm: Choose a pool to shrink correctly in ttm_dma_pool_shrink_scan().Tetsuo Handa
We can use "unsigned int" instead of "atomic_t" by updating start_pool variable under _manager->lock. This patch will make it possible to avoid skipping when choosing a pool to shrink in round-robin style, after next patch changes mutex_lock(_manager->lock) to !mutex_trylock(_manager->lork). Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: stable <stable@kernel.org> [3.3+] Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm/ttm: Fix possible division by 0 in ttm_dma_pool_shrink_scan().Tetsuo Handa
list_empty(&_manager->pools) being false before taking _manager->lock does not guarantee that _manager->npools != 0 after taking _manager->lock because _manager->npools is updated under _manager->lock. Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: stable <stable@kernel.org> [3.3+] Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm/tda998x: update for new drm connector APIs.Dave Airlie
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05drm/sti: fix warning in build.Dave Airlie
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05Merge branch 'drm_kms_for_next-v8' of ↵Dave Airlie
git://git.linaro.org/people/benjamin.gaignard/kernel into drm-next This series of patches add the support of DRM/KMS drivers for STMicroelectronics chipsets stih416 and stih407. Hardware is split in two main blocks: Compositor and TVout. Each of them includes specific hardware IPs and the display timing are controlled by a specific Video Timing Generator hardware IP (VTG). Compositor is made of the follow hardware IPs: - GDP (Generic Display Pipeline) which is an entry point for graphic (RGB) buffers - VDP (Video Diplay Pipeline) which is an entry point for video (YUV) buffers - HQVDP (High Quality Video Display Processor) that supports scaling, deinterlacing and some miscellaneous image quality improvements. It fetches the Video decoded buffers from memory, processes them and pushes them to the Compositor through a HW dedicated bus. - Mixer is responsible of mixing all the entries depending of their respective z-order and layout TVout is divided in 3 parts: - HDMI to generate HDMI signals, depending of chipset version HDMI phy can change. - HDA to generate signals for HD analog TV - VIP to control/switch data path coming from Compositor On stih416 compositor and Tvout are on different dies so a Video Trafic Advance inter-die Communication mechanism (VTAC) is needed. +---------------------------------------------+ +----------------------------------------+ | +-------------------------------+ +----+ | | +----+ +--------------------------+ | | | | | | | | | | | +---------+ +----+ | | | | +----+ +------+ | | | | | | | | | VIP |---->|HDMI| | | | | |GPD +------------->| | | | | | | | | | | | +----+ | | | | +----+ |Mixer |--|-->| | | | | |---|->| switcher| | | | | | | | | | | | | | | | | +----+ | | | | | | | | | | | | | | | |---->|HDA | | | | | +------+ | |VTAC|========>|VTAC| | +---------+ +----+ | | | | | | | | | | | | | | | | Compositor | | | | | | | | TVout | | | +-------------------------------+ | | | | | | +--------------------------+ | | ^ | | | | | | ^ | | | | | | | | | | | | +--------------+ | | | | | | +-------------+ | | | VTG (master) |----->| | | | | |----->| VTG (slave) | | | +--------------+ +----+ | | +----+ +-------------+ | |Digital die | | Analog Die| +---------------------------------------------+ +----------------------------------------+ On stih407 Compositor and Tvout are on the same die +-----------------------------------------------------------------+ | +-------------------------------+ +--------------------------+ | | | | | +---------+ +----+ | | | | +----+ +------+ | | | VIP |---->|HDMI| | | | | |GPD +------------->| | | | | | +----+ | | | | +----+ |Mixer |--|--|->| switcher| | | | | +----+ +-----+ | | | | | | +----+ | | | | |VDP +-->+HQVDP+--->| | | | | |---->|HDA | | | | | +----+ +-----+ +------+ | | +---------+ +----+ | | | | | | | | | | Compositor | | TVout | | | +-------------------------------+ +--------------------------+ | | ^ ^ | | | | | | +--------------+ | | | VTG | | | +--------------+ | |Digital die | +-----------------------------------------------------------------+ In addition of the drivers for the IPs listed before a thin I2C driver (hdmiddc) is used by HDMI driver to retrieve EDID for monitor. To unify interfaces of GDP and VDP we create a "layer" interface called by compositor to control both GPD and VDP. Hardware have memory contraints (alignment, contiguous) so we use CMA drm helpers functions to allocate frame buffer. File naming convention is: - sti_* for IPs drivers - sti_drm_* for drm functions implementation. * 'drm_kms_for_next-v8' of git://git.linaro.org/people/benjamin.gaignard/kernel: drm: sti: Add DRM driver itself drm: sti: add Compositor drm: sti: add Mixer drm: sti: add VID layer drm: sti: add GDP layer drm: sti: add TVOut driver drm: sti: add HDA driver drm: sti: add HDMI driver drm: sti: add VTAC drivers drm: sti: add VTG driver drm: sti: add bindings for DRM driver
2014-08-05Merge branch 'tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox ↵Dave Airlie
into drm-next This builds upon the previous set of fixes which were pulled on 6th July. Included in this set are: - an update from Jean-Francois to add the missing reg documentation entry to the device tree documentation. - conversion of the tda998x driver to the component helpers. * 'tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox: drm/i2c: tda998x: add component support drm/i2c: tda998x: allow re-use of tda998x support code drm/i2c: tda998x: fix lack of required reg in DT documentation Conflicts: drivers/gpu/drm/i2c/tda998x_drv.c
2014-08-05Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into ↵Dave Airlie
drm-next This time around we have a mix of new hw enablement (mdp5 v1.3 / apq8084), plus devicetree and various upstream changes (mostly adapting to CCF vs downstream clk driver differences) for mdp4 / apq8064. With these drm/msm patches plus a few other small patchsets (from linaro qcom integration branch.. mostly stuff queued up for 3.17) we have the inforce ifc6410 board working, with gpu. Much nicer to work with than ancient vendor android branch :-) * 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/msm/hdmi: fix HDMI_MUX_EN gpio request typo drm/msm/hdmi: enable lpm-mux if it is present drm/msm/mdp5: add support for MDP5 v1.3 drm/msm: fix potential deadlock in gpu init drm/msm: use upstream iommu drm/msm: no mmu is only error if not using vram carveout drm/msm: fix BUG_ON() in error cleanup path drm/msm/mdp4: add mdp axi clk drm/msm: hdmi phy 8960 phy pll drm/msm: update generated headers drm/msm: DT support for 8960/8064 (v3) drm/msm: Implement msm drm fb_mmap callback function drm/msm: activate iommu support drm/msm: fix double struct_mutex acquire
2014-08-05Merge tag 'v3.16' into drm-nextDave Airlie
Linux 3.16 backmerge requested by i915, nouveau and radeon authors Conflicts: drivers/gpu/drm/i915/i915_gem_render_state.c drivers/gpu/drm/i915/intel_drv.h
2014-08-04drm/msm/hdmi: fix HDMI_MUX_EN gpio request typoBeeresh Gopal
HDMI_MUX_EN gpio is requested. If an error occurs, the same name should be printed (HDMI_MUX_EN) instead of HDMI_MUX_SEL (typo). Signed-off-by: Beeresh Gopal <gbeeresh@codeaurora.org> Signed-off-by: Stephane Viau <sviau@codeaurora.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm/hdmi: enable lpm-mux if it is presentBeeresh Gopal
lpm-mux is programmed to enable HDMI connector on the docking station for S805 chipset based devices. Signed-off-by: Beeresh Gopal <gbeeresh@codeaurora.org> Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm/mdp5: add support for MDP5 v1.3Stephane Viau
MDP5 has several functional blocks (ie: VIG/RGB pipes, LMs, ...). From one revision to another, these blocks' base addresses might change due to the number of instances present in the MDP5 hw. A way of dealing with these offset changes is to introduce dynamic offsets 'per block'. This change adds support for the new revision of MDP5: v1.3. The idea is to define one hw config per MDP version and select either one of them at runtime, after reading the MDP5 version. Once the MDP version is known, 'per block' dynamic offsets are initialized through a global pointer, which is then used for read/write register access. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: fix potential deadlock in gpu initRob Clark
Somewhere along the way, the firmware loader sprouted another lock dependency, resulting in possible deadlock scenario: &dev->struct_mutex --> &sb->s_type->i_mutex_key#2 --> &mm->mmap_sem which is problematic vs things like gem mmap. So introduce a separate mutex to synchronize gpu init. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: use upstream iommuRob Clark
Downstream kernel IOMMU had a non-standard way of dealing with multiple devices and multiple ports/contexts. We don't need that on upstream kernel, so rip out the crazy. Note that we have to move the pinning of the ringbuffer to after the IOMMU is attached. No idea how that managed to work properly on the downstream kernel. For now, I am leaving the IOMMU port name stuff in place, to simplify things for folks trying to backport latest drm/msm to device kernels. Once we no longer have to care about pre-DT kernels, we can drop this and instead backport upstream IOMMU driver. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: no mmu is only error if not using vram carveoutRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: fix BUG_ON() in error cleanup pathRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm/mdp4: add mdp axi clkRob Clark
Downstream kernel holds this clk via a fake-parent relationship. Upstream clock framework requires that we hold it explicitly. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: hdmi phy 8960 phy pllRob Clark
On downstream kernel the clk driver directly bangs hdmi phy registers. For upstream kernel, we need to model this as a clock and register with the clock framework. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: update generated headersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: DT support for 8960/8064 (v3)Rob Clark
Now that we (almost) have enough dependencies in place (MMCC, RPM, etc), add necessary DT support so that we can use drm/msm on upstream kernel. v2: update for review comments v3: rebase on component helper changes Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: Implement msm drm fb_mmap callback functionHai Li
This change implements msm drm specific fb_mmap function for fb device to properly map the fb address to userspace. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> (+ minor comment tweak)
2014-08-04drm/msm: activate iommu supportStephane Viau
This changes activates the iommu support for MDP5, through the platform config structure. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: fix double struct_mutex acquireRob Clark
Mutex is already grabbed in show_locked().. somehow this slipped through. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/tegra: add MODULE_DEVICE_TABLEsStephen Warren
When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow the module to be auto-loaded since the module will match the devices instantiated from device tree. (Notes for stable: in 3.14+, just git rm any conflicting file, since they are added in later kernels. For 3.13 and below, manual merging will be needed) Cc: <stable@vger.kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: dc - Reset controller on driver removeThierry Reding
Since the device will no longer be used, may as well keep it in reset to potentially save some power and make sure it is in a clean state the next time it's probed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: Properly align stride for framebuffersThierry Reding
Tegra20 and Tegra30 both required the buffer line stride to be aligned on 8 byte boundaries. Tegra114 and Tegra124 increased the alignment to 64 bytes. Introduce a parameter to specify the alignment requirements for each display controller and round up the pitch of newly allocated framebuffers appropriately. Originally-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: sor - Configure proper sync polaritiesThierry Reding
Program the sync signal polarities according to the display mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: sor - Use bits-per-color from panelStéphane Marchesin
This change uses the value of bits-per-color from panel to remove one more hardcoded value. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: Make job submission 64-bit safeThierry Reding
Job submission currently relies on the fact that struct drm_tegra_reloc and struct host1x_reloc are the same size and uses a simple call to the copy_from_user() function to copy them to kernel space. This causes the handle to be stored in the buffer object field, which then needs a cast to a 32 bit integer to resolve it to a proper buffer object pointer and store it back in the buffer object field. On 64-bit architectures that will no longer work, since pointers are 64 bits wide whereas handles will remain 32 bits. This causes the sizes of both structures to because different and copying will no longer work. Fix this by adding a new function, host1x_reloc_get_user(), that copies the structures field by field. While at it, use substructures for the command and target buffers in struct host1x_reloc for better readability. Also use unsized types to make it more obvious that this isn't part of userspace ABI. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: Allow non-authenticated processes to create buffer objectsThierry Reding
This matches what other drivers do for equivalent IOCTLs. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: Add SET/GET_FLAGS IOCTLsThierry Reding
The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a buffer object after it has been allocated or imported. Flags associated with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS IOCTL. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: Add SET/GET_TILING IOCTLsThierry Reding
Currently the tiling parameters of buffer objects can only be set at allocation time, and only a single tiled mode is supported. This new DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also allows the tiling mode to be changed after the allocation. This will enable the Tegra DRM driver to import buffers from a GPU and directly scan them out by configuring the display controller appropriately. To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the current tiling mode of a buffer object. This is necessary when importing buffers via handle (as is done in Mesa for example) so that userspace can determine the proper parameters for the 2D or 3D engines. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: Implement more tiling modesThierry Reding
Tegra124 supports a block-linear mode in addition to the regular pitch linear and tiled modes. Add support for these by moving the internal representation into a structure rather than a simple flag. Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: dsi - Handle non-continuous clock flagAlexandre Courbot
Handle the MIPI_DSI_CLOCK_NONCONTINUOUS flag and only set TX-only clock behavior when this flag is present to allow panels requiring continuous clock mode to operate with this driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: sor - missing unlock on errorDan Carpenter
We should unlock before returning the error code. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04Merge branch 'drm/dsi/for-next' into drm/tegra/for-nextThierry Reding
* drm/dsi/for-next: drm/dsi: Flag for non-continuous clock behavior
2014-08-04Merge tag 'drm-intel-next-2014-07-25-merged' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next Final feature pull for 3.17. drm-intel-next-2014-07-25: - Ditch UMS support (well just the config option for now) - Prep work for future platforms (Sonika Jindal, Damien) - runtime pm/soix fixes (Paulo, Jesse) - psr tracking improvements, locking fixes, now enabled by default! - rps fixes for chv (Deepak, Ville) - drm core patches for rotation support (Ville, Sagar Kamble) - the i915 parts unfortunately didn't make it yet - userptr fixes (Chris) - minimum backlight brightness (Jani), acked long ago by Matthew Garret on irc - I've forgotten about this patch :( QA is a bit unhappy about the DP MST stuff since it broke hpd testing a bit, but otherwise looks sane. I've backmerged drm-next to resolve conflicts with the mst stuff, which means the new tag itself doesn't contain the overview as usual. * tag 'drm-intel-next-2014-07-25-merged' of git://anongit.freedesktop.org/drm-intel: (75 commits) drm/i915/userptr: Keep spin_lock/unlock in the same block drm/i915: Allow overlapping userptr objects drm/i915: Ditch UMS config option drm/i915: respect the VBT minimum backlight brightness drm/i915: extract backlight minimum brightness from VBT drm/i915: Replace HAS_PCH_SPLIT which incorrectly lets some platforms in drm/i915: Returning from increase/decrease of pllclock when invalid drm/i915: Setting legacy palette correctly for different platforms drm/i915: Avoid incorrect returning for some platforms drm/i915: Writing proper check for reading of pipe status reg drm/i915: Returning the right VGA control reg for platforms drm/i915: Allowing changing of wm latencies for valid platforms drm/i915: Adding HAS_GMCH_DISPLAY macro drm/i915: Fix possible overflow when recording semaphore states. drm/i915: Do not unmap object unless no other VMAs reference it drm/i915: remove plane/cursor/pipe assertions from intel_crtc_disable drm/i915: Reorder ctx unref on ppgtt cleanup drm/i915/error: Check the potential ctx obj's vm drm/i915: Fix printing proper min/min/rpe values in debugfs drm/i915: BDW can also detect unclaimed registers ...
2014-08-04drm: close race in connector registration (v2)Dave Airlie
Daniel pointed out with hotplug that userspace could be trying to oops us as root for lols, and that to be correct we shouldn't register the object with the idr before we have fully set the connector object up. His proposed solution was a lot more life changing, this seemed like a simpler proposition to me, get the connector object id from the idr, but don't register the object until the drm_connector_register callback. The open question is whether the drm_mode_object_register needs a bigger lock than just the idr one, but I can't see why it would, but I can be locking challenged. v2: fix bool noreg into sane - add comment. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-04drm/i915: only hook up hpd pulse for DP outputsChris Wilson
On HSW+, the digital encoders are shared between HDMI and DP outputs, with one encoder masquerading as both. The VBT should tell us if we need to have DP or HDMI support on a particular port, but if we don't have DP support and we enable the DP hpd pulse handler then we cause an oops. Don't hook up the DP hpd handling if we don't have a DP port. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81856 Reported-by: Intel QA Team. Signed-off-by: Dave Airlie <airlied@redhat.com> # v1 [ickle: Fix the error handling after a malloc failure] Reviewed-by: Dave Airlie <airlied@redhat.com> Cc: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
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