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2015-02-16Merge JFFS2 updates from David WoodhouseBrian Norris
2015-02-15mtd: hisilicon: && vs & typoDan Carpenter
The intent was to mask away some bits here, not to test true or false. Fix: 54f531f6e332 ('mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 Soc') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-13jffs2: fix handling of corrupted summary lengthChen Jie
sm->offset maybe wrong but magic maybe right, the offset do not have CRC. Badness at c00c7580 [verbose debug info unavailable] NIP: c00c7580 LR: c00c718c CTR: 00000014 REGS: df07bb40 TRAP: 0700 Not tainted (2.6.34.13-WR4.3.0.0_standard) MSR: 00029000 <EE,ME,CE> CR: 22084f84 XER: 00000000 TASK = df84d6e0[908] 'mount' THREAD: df07a000 GPR00: 00000001 df07bbf0 df84d6e0 00000000 00000001 00000000 df07bb58 00000041 GPR08: 00000041 c0638860 00000000 00000010 22084f88 100636c8 df814ff8 00000000 GPR16: df84d6e0 dfa558cc c05adb90 00000048 c0452d30 00000000 000240d0 000040d0 GPR24: 00000014 c05ae734 c05be2e0 00000000 00000001 00000000 00000000 c05ae730 NIP [c00c7580] __alloc_pages_nodemask+0x4d0/0x638 LR [c00c718c] __alloc_pages_nodemask+0xdc/0x638 Call Trace: [df07bbf0] [c00c718c] __alloc_pages_nodemask+0xdc/0x638 (unreliable) [df07bc90] [c00c7708] __get_free_pages+0x20/0x48 [df07bca0] [c00f4a40] __kmalloc+0x15c/0x1ec [df07bcd0] [c01fc880] jffs2_scan_medium+0xa58/0x14d0 [df07bd70] [c01ff38c] jffs2_do_mount_fs+0x1f4/0x6b4 [df07bdb0] [c020144c] jffs2_do_fill_super+0xa8/0x260 [df07bdd0] [c020230c] jffs2_fill_super+0x104/0x184 [df07be00] [c0335814] get_sb_mtd_aux+0x9c/0xec [df07be20] [c033596c] get_sb_mtd+0x84/0x1e8 [df07be60] [c0201ed0] jffs2_get_sb+0x1c/0x2c [df07be70] [c0103898] vfs_kern_mount+0x78/0x1e8 [df07bea0] [c0103a58] do_kern_mount+0x40/0x100 [df07bec0] [c011fe90] do_mount+0x240/0x890 [df07bf10] [c0120570] sys_mount+0x90/0xd8 [df07bf40] [c00110d8] ret_from_syscall+0x0/0x4 === Exception: c01 at 0xff61a34 LR = 0x100135f0 Instruction dump: 38800005 38600000 48010f41 4bfffe1c 4bfc2d15 4bfffe8c 72e90200 4082fc28 3d20c064 39298860 8809000d 68000001 <0f000000> 2f800000 419efc0c 38000001 mount: mounting /dev/mtdblock3 on /common failed: Input/output error Signed-off-by: Chen Jie <chenjie6@huawei.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2015-02-08mtd: hisilicon: add device tree binding documentationZhou Wang
This patch adds the related dts binding document for Hisilicon 504 NAND controller. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-08mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 SocZhou Wang
This patch adds the support for hisilicon 504 NAND controller which is now used by Hisilicon Soc Hip04. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-07mtd: avoid registering reboot notifier twiceNiklas Cassel
Calling mtd_device_parse_register with the same mtd_info (e.g. registering several partitions on a single device) would add the same reboot notifier twice, causing an infinte loop in notifier_chain_register during boot up. Signed-off-by: Niklas Cassel <nks@flawful.org> [Brian: add FIXME comments] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: concat: set the return lengths properlyNiklas Cassel
In concat_read_oob both retlen and oobretlen should be updated. concat_write_oob previously only (improperly) updated retlen. Signed-off-by: Niklas Cassel <niklass@axis.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: kconfig: replace PPC_OF with PPCKevin Hao
The PPC_OF is a ppc specific option which is used to mean that the firmware device tree access functions are available. Since all the ppc platforms have a device tree, it is aways set to 'y' for ppc. So it makes no sense to keep a such option in the current kernel. Replace it with PPC. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: denali: remove unnecessary stubsMasahiro Yamada
This driver uses NAND_ECC_HW_SYNDROME mode. The nand_scan_tail() function would not complain about missing ecc->calculate, ecc->correct, ecc->hwctl handlers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: nand: remove redundant local variableBaruch Siach
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05MAINTAINERS: add maintainer entry for FREESCALE QUAD SPI driverHan Xu
Add a maintainer entry for FREESCALE QUAD SPI driver and add myself as a maintainer. Signed-off-by: Han Xu <han.xu@freescale.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: fsl-quadspi: improve read performance by increase AHB transfer sizeAllen Xu
Set AHB transfer size to 1K which improved the read performance. Add ahb_buf_size field in fsl_qspi_devtype_data to denote the size for different SoC. Before: root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16 16+0 records in 16+0 records out 16777216 bytes (17 MB) copied, 0.472183 s, 25.1 MB/s After: root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16 16+0 records in 16+0 records out 16777216 bytes (17 MB) copied, 0.369439 s, 29.5 MB/s Signed-off-by: Allen Xu <b45815@freescale.com> Signed-off-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: fsl-quadspi: Remove unnecessary 'map_failed' labelFabio Estevam
There is no need to keep the 'map_failed' label. We can simply return the error code directly and let the code shorter and cleaner. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: fsl-quadspi: Remove unneeded success/error messagesFabio Estevam
When the driver successfully probe we already have messages like: [ 1.140989] fsl-quadspi 21e4000.qspi: s25fl128s (16384 Kbytes) [ 1.150902] fsl-quadspi 21e4000.qspi: s25fl128s (16384 Kbytes) Or in case of error: [ 1.175920] fsl-quadspi: probe of 21e4000.qspi failed with error -12 , so remove the unneeded success/error messages. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: fsl-quadspi: Fix the error pathsFabio Estevam
Jumping to 'map_failed' label is not correct at these points, as it misses to disable the clocks that were previously enabled. Jump to 'irq_failed' label instead that will correctly disable the clocks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-05mtd: nand: omap: drop condition with no effectNicholas Mc Guire
The if and the else branch code are identical - so the condition has no effect on the effective code. This patch removes the condition and the duplicated code and updates the documentation as suggested by Roger Quadros <rogerq@ti.com>. Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Reviewed-by: Pekon Gupta <pekon@pek-sem.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-02mtd: nand: jz4740: Convert to GPIO descriptor APILars-Peter Clausen
Use the GPIO descriptor API instead of the deprecated legacy GPIO API to manage the busy GPIO. The patch updates both the jz4740 nand driver and the only user of the driver the qi-lb60 board driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-02-01mtd: nand: Request strength instead of bytes for soft BCHAaron Sierra
Previously, we requested that drivers pass ecc.size and ecc.bytes when using NAND_ECC_SOFT_BCH. However, a driver is likely to only know the ECC strength required for its NAND, so each driver would need to perform a strength-to-bytes calculation. Avoid duplicating this calculation in each driver by asking drivers to pass ecc.size and ecc.strength so that the strength-to-bytes calculation need only be implemented once. This reverts/generalizes this commit: mtd: nand: Base BCH ECC bytes on required strength Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-20mtd: nand: default bitflip-reporting threshold to 75% of correction strengthBrian Norris
The MTD API reports -EUCLEAN only if the maximum number of bitflips found in any ECC block exceeds a certain threshold. This is done to avoid excessive -EUCLEAN reports to MTD users, which may induce additional scrubbing of data, even when the ECC algorithm in use is perfectly capable of handling the bitflips. This threshold can be controlled by user-space (via sysfs), to allow users to determine what they are willing to tolerate in their application. But it still helps to have sane defaults. In recent discussion [1], it was pointed out that our default threshold is equal to the correction strength. That means that we won't actually report any -EUCLEAN (i.e., "bitflips were corrected") errors until there are almost too many to handle. It was determined that 3/4 of the correction strength is probably a better default. [1] http://lists.infradead.org/pipermail/linux-mtd/2015-January/057259.html Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <shijie.huang@intel.com>
2015-01-20mtd: atmel_nand: introduce a new compatible string for sama5d4 chipWu, Josh
Since in SAMA5D4 chip, the PMECC can correct bit flips in erased page. So we add a DT property to indicate this hardware character. If the PMECC support correct bitflip erased page (all data are 0xff). Then we can use the PMECC correct the page and skip the erased page check. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-20mtd: atmel_nand: return max bitflips in all sectors in pmecc_correction()Wu, Josh
atmel_nand_pmecc_read_page() will return the total bitflips in this page. This is incorrect. As one nand page includes multiple ecc sectors, that will cause the returned total bitflips exceed ecc capablity. So this patch will make pmecc_correct() return the max bitflips of all sectors in the page. That also makes atmel_nand_pmecc_read_page() return the max bitflips. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-20mtd: fsl-quadspi: Fix module unboundFabio Estevam
When removing the fsl-quadspi module and running 'cat /proc/mtd' afterwards, we see garbage data like: $ rmmod fsl-quadspi $ cat /proc/mtd dev: size erasesize name mtd0: 00000000 00000000 "(null)" mtd0: 00000000 00000000 "(null)" mtd0: 00000000 00000000 "(null)" ... mtd0: a22296c6c756e28 00000000 "(null)" mtd0: a22296c6c756e28 3064746d "(null)" If we continue doing multiple module load/unload operations, then it will also lead to a kernel crash. The reason for this is due to the wrong mtd index used in mtd_device_unregister() in the remove function. We need to keep the mtd unregister index aligned with the one used in the probe function, which means we need to take into account the 'has_second_chip' property. By doing so we can guarantee that the mtd index is the same in the registration and unregistration functions. With this patch applied we can load/unload the fsl-quadspi driver several times and it will result in no crash. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Tested-by: Frank Li <Frank.Li@freescale.com> Acked-by: Allen Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-20mtd: spi-nor: support for (GigaDevice) GD25Q128BRafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-15nandsim: remove unused STATE_DATAOUT_STATUS_M and OPT_SMARTMEDIAAkinobu Mita
There is no path to switch to STATE_DATAOUT_STATUS_M state, and OPT_SMARTMEDIA is unused. This is leftover from commit 0be718e5525a73557e76ea1c05b8001dde507049 ("mtd: nand: remove a bunch of unused commands"). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-15mtd: nand: ams-delta: fix overwritten mtd_info->owner in initializationAkinobu Mita
In initialization routine, mtd_info->owner is overwritten by memset() just after being initialized. This can be fixed by moving memset() calls to just before setting mtd_info->owner. But the memory region is allocated by kmalloc, so we can fix it by using kzalloc instead of kmalloc. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Jonathan McDowell <noodles@earth.li> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-15mtd: spi-nor: fsl-qspi: support deep sleep mode for imx6 sx chipAllen Xu
i.mx6 sx support turn off fastmix and megamix power. qpsi controller can be turned off and all status lost when suspend/resume. add suspend/resume functions and reset qspi controller when resume. Signed-off-by: Allen Xu <b45815@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-13mtd: denali: fix incorrect bitmask error in denali_setup_dmaGraham Moore
commit 3157d1ed2309 ("mtd: denali: remove unnecessary casts") introduced an error by using a wrong bitmask. A uint16_t cast was replaced with & 0xff, should be & 0xffff. Signed-off-by: Graham Moore <grmoore@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-12mtd: st_spi_fsm: Fix [-Wsign-compare] build warningLee Jones
drivers/mtd/devices/st_spi_fsm.c:1647:17: warning: comparison between signed and unsigned integer expressions Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-12mtd: st_spi_fsm: Obtain and use EMI clockLee Jones
ST's Common Clk Framework is now available. This patch ensures the FSM makes use of it by obtaining and enabling the EMI clock. If system fails to provide the EMI clock, we bomb out. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-12mtd: st_spi_fsm: Extend fsm_clear_fifo to handle unwanted bytesLee Jones
Under certain conditions, the SPI-FSM Controller can be left in a state where the data FIFO is not entirely empty. This can lead to problems where subsequent data transfers appear to have been shifted by a number of unidentified bytes. One simple example would be an errant FSM sequence which loaded more data to the FIFO than was read by the host. Another more interesting case results from an obscure artefact in the FSM Controller. When switching from data transfers in x4 or x2 mode to data transfers in x1 mode, extraneous bytes will appear in the FIFO, unless the previous data transfer was a multiple of 32 cycles (i.e. 8 bytes for x2, and 16 bytes for x4). This applies equally whether FSM is being operated directly by a S/W driver, or by the SPI boot-controller in FSM-Boot mode. Furthermore, data in the FIFO not only survive a transition between FSM-Boot and FSM, but also a S/W reset of IP block [1]. By taking certain precautions, it is possible to prevent the driver from causing this type of problem (e.g. ensuring that the host and programmed sequence agree on the transfer size, and restricting transfer sizes to multiples of 32-cycles [2]). However, at the point the driver is loaded, no assumptions can be made regarding the state of the FIFO. Even if previous S/W drivers have behaved correctly, it is impossible to control the number of transactions serviced by the controller operating in FSM-Boot. To address this problem, we ensure the FIFO is cleared during initialisation, before performing any FSM operations. Previously, the fsm_clear_fifo() code was capable of detecting and clearing any unwanted 32-bit words from the FIFO. This patch extends the capability to handle an arbitrary number of bytes present in the FIFO [3]. Now that the issue is better understood, we also remove the calls to fsm_clear_fifo() following the fsm_read() and fsm_write() operations. The process of actually clearing the FIFO deserves a mention. While the FIFO may contain any number of bytes, the SPI_FAST_SEQ_STA register only reports the number of complete 32-bit words present. Furthermore, data can only be drained from the FIFO by reading complete 32-bit words. With this in mind, a two stage process is used to the clear the FIFO: 1. Read any complete 32-bit words from the FIFO, as reported by the SPI_FAST_SEQ_STA register. 2. Mop up any remaining bytes. At this point, it is not known if there are 0, 1, 2, or 3 bytes in the FIFO. To handle all cases, a dummy FSM sequence is used to load one byte at a time, until a complete 32-bit word is formed; at most, 4 bytes will need to be loaded. [1] Although this issue has existed since early versions of the SPI-FSM controller, its full extent only emerged recently as a consequence of the targetpacks starting to use FSM-Boot(x4) as the default configuration. [2] The requirement to restrict transfers to multiples of 32 cycles was found empirically back when DUAL and QUAD mode support was added. The current analysis now gives a satisfactory explanation for this requirement. [3] Theoretically, it is possible for the FIFO to contain an arbitrary number of bits. However, since there are no known use-cases that leave incomplete bytes in the FIFO, only words and bytes are considered here. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-12jffs2: compr_rubin: Remove unused functionRickard Strandqvist
Remove the function pulledbits() that is not used anywhere. This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-09mtd: map_rom: Support UBI on ROMAaron Sierra
UBI needs to know the physical erase block size, even on read-only devices, since it defines the on-device layout. Use a device-tree provided value to support previously written UBI on read-only NOR. UBI also needs a non-zero writebufsize, so we set it to one. Note: This was implemented because hardware write-protected CFI NOR cannot be probed for the physical erase block size. Signed-off-by: Joe Schultz <jschultz@xes-inc.ccom> Signed-off-by: Aaron Sierra <asierra@xes-inc.ccom> [Brian: removed unneeded #ifdef, note 'optional' erase-size property] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-09mtd: physmap_of: Add read-only fallbackJoe Schultz
Previously, when probing a CFI chip which was write-protected at the hardware level, the probe would fail due to the fact it could not put the chip into QUERY mode. This would result in no MTD devices being created. Add a fallback to probe using the map_rom driver if the user-selected probe fails. Signed-off-by: Joe Schultz <jschultz@xes-inc.com> Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-09mtd: map_ram: Enable mtdoopsAlessio Igor Bogani
Signed-off-by: Alessio Igor Bogani <alessio.bogani@elettra.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-09Documentation: fsl-quadspi: Add an entry for the imx6sx compatible stringFabio Estevam
"fsl,imx6sx-qspi" is also a valid compatible string, so add an entry for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-09mtd: nftl: reorganize operations in condition checkAndy Shevchenko
We need to compare ret variable for negative value. The current code assigns the boolean to the ret and prints it wrongly in the warning message. Reported-by: Andrey Karpov <karpov@viva64.com> Cc: Giel van Schijndel <me@mortis.eu> Cc: Dimitri Gorokhovik <dimitri.gorokhovik@free.fr> Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-09mtd: nand: remove duplicate comment lineBaruch Siach
Commit 7854d3f7495b1 ("mtd: spelling, capitalization, uniformity") added a correctly spelled line, but failed to remove the wrongly spelled one. Commit 064a7694b534 ("mtd: Fix typo mtd/tests") then fixed the spelling again, but left the duplication. Fixes: 7854d3f7495b1 ("mtd: spelling, capitalization, uniformity") Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-07mtd: nand: added nand_shutdownScott Branden
Add nand_shutdown to wait for current nand operations to finish and prevent further operations by changing the nand flash state to FL_SHUTDOWN. This is addressing a problem observed during reboot tests using UBIFS root file system: NAND erase operations that are in progress during system reboot/shutdown are causing partial erased blocks. Although UBI should be able to detect and recover from this error, this change will avoid the creation of partial erased blocks on reboot in the middle of a NAND erase operation. Signed-off-by: Scott Branden <sbranden@broadcom.com> Tested-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-07mtd: implement common reboot notifier boilerplateBrian Norris
cfi_cmdset_000{1,2}.c already implement their own reboot notifiers, and we're going to add one for NAND. Let's put the boilerplate in one place. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Scott Branden <sbranden@broadcom.com>
2015-01-07mtd: mtdblock: remove the needless mtdblks_lockGu Zheng
The global lock mtdblks_lock was used to protect the original mtdblks array to avoid race conditions. As the mtdblks array was already gone, but the mtdblks_lock is left, and it causes latency when open/release dev. So we need to remove it here. Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-07mtd: bcm47xxpart: support SquashFS with an original magicRafał Miłecki
SquashFS is supposed to use magic defined as SQUASHFS_MAGIC. What we were supporting so far (SQSH_MAGIC) is something ZTE specific. This patch adds support for Xiaomi R1D. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-07mtd: bcm47xxpart: lower minimal blocksize to 4Ki (from 64Ki)Rafał Miłecki
Some devices like Netgear WNR1000v3 or WGR614v10 have partitions aligned to 0x1000. Using bigger blocksize stopped us from detecting some parts. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-07mtd: bcm47xxpart: support TRX data partition being UBIRafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-07mtd: spi-nor: Add quad I/O support for Micron SPI NORBean Huo 霍斌斌 (beanhuo)
This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes. For Micron SPI NOR flash, enabling or disabling quad I/O protocol can be done By two methods, which are to use EVCR (Enhanced Volatile Configuration Register) and the ENTER QUAD I/O MODE command. There is no difference between these two methods. Unfortunately, for some Micron SPI NOR flashes, there no ENTER Quad I/O command (35h), such as n25q064. But for all current Micron SPI NOR, if it support quad I/O mode, using EVCR definitely be supported. It is a recommended method to enable Quad I/O mode by EVCR, Quad I/O protocol bit 7. When EVCR bit 7 is reset to 0, the SPI NOR flash will operate in quad I/O mode. This patch has been tested on N25Q512A and MT25TL256BAA1ESF. Micron SPI NOR of spi_nor_ids[] table all support this method. Signed-off-by: Bean Huo <beanhuo@micron.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-22mtd: gpmi: Remove "We support only one NAND chip" from bindings docStefan Roese
This sentence "We support only one NAND chip now" is not true any more. Multiple chips are supported. So lets remove this sentence to not confuse anyone. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Huang Shijie <b32955@freescale.com> Cc: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-22mtd: nand: gpmi: remove deprecated commentBoris BREZILLON
Now that we have raw functions properly implemented we can remove this FIXME. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-22mtd: gpmi: Remove noisy error messageFabio Estevam
mx28evk board has a socket for NAND flash that comes with no NAND flash populated, and then we get this message on every boot: [ 1.657603] gpmi-nand 8000c000.gpmi-nand: driver registration failed: -19 which is not very helpful, so get rid of this error message. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-20Linux 3.19-rc1v3.19-rc1Linus Torvalds
2014-12-20Merge tag 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/borntraeger/linux Pull ACCESS_ONCE cleanup preparation from Christian Borntraeger: "kernel: Provide READ_ONCE and ASSIGN_ONCE As discussed on LKML http://marc.info/?i=54611D86.4040306%40de.ibm.com ACCESS_ONCE might fail with specific compilers for non-scalar accesses. Here is a set of patches to tackle that problem. The first patch introduce READ_ONCE and ASSIGN_ONCE. If the data structure is larger than the machine word size memcpy is used and a warning is emitted. The next patches fix up several in-tree users of ACCESS_ONCE on non-scalar types. This does not yet contain a patch that forces ACCESS_ONCE to work only on scalar types. This is targetted for the next merge window as Linux next already contains new offenders regarding ACCESS_ONCE vs. non-scalar types" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/borntraeger/linux: s390/kvm: REPLACE barrier fixup with READ_ONCE arm/spinlock: Replace ACCESS_ONCE with READ_ONCE arm64/spinlock: Replace ACCESS_ONCE READ_ONCE mips/gup: Replace ACCESS_ONCE with READ_ONCE x86/gup: Replace ACCESS_ONCE with READ_ONCE x86/spinlock: Replace ACCESS_ONCE with READ_ONCE mm: replace ACCESS_ONCE with READ_ONCE or barriers kernel: Provide READ_ONCE and ASSIGN_ONCE
2014-12-20Merge tag 'clk-for-linus-3.19' of ↵Linus Torvalds
git://git.linaro.org/people/mike.turquette/linux Pull clk framework updates from Mike Turquette: "This is much later than usual due to several last minute bugs that had to be addressed. As usual the majority of changes are new drivers and modifications to existing drivers. The core recieved many fixes along with the groundwork for several large changes coming in the future which will better parition clock providers from clock consumers" * tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/linux: (86 commits) clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated ARM: OMAP3: clock: fix boot breakage in legacy mode ARM: OMAP2+: clock: fix DPLL code to use new determine rate APIs clk: Really fix deadlock with mmap_sem clk: mmp: fix sparse non static symbol warning clk: Change clk_ops->determine_rate to return a clk_hw as the best parent clk: change clk_debugfs_add_file to take a struct clk_hw clk: Don't expose __clk_get_accuracy clk: Don't try to use a struct clk* after it could have been freed clk: Remove unused function __clk_get_prepare_count clk: samsung: Fix double add of syscore ops after driver rebind clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi clk: samsung: exynos4415: Fix build with PM_SLEEP disabled clk: samsung: remove unnecessary inclusion of header files from clk.h clk: samsung: remove unnecessary CONFIG_OF from clk.c clk: samsung: Spelling s/bwtween/between/ clk: rockchip: Add support for the mmc clock phases using the framework clk: rockchip: add bindings for the mmc clocks clk: rockchip: rk3288 export i2s0_clkout for use in DT clk: rockchip: use clock ID for DMC (memory controller) on rk3288 ...
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