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2022-05-05drm/amd/pm: enable PMLOG support for SMU 13.0.0Evan Quan
Fulfill the interface for setting PMLOG DramAddr on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable ppfeature mask setting for SMU 13.0.0Evan Quan
Fulfill the interfaces for retrieving and setting ppfeature masks on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable RunDcBtc support for SMU 13.0.0Evan Quan
Fulfill the RunDcBtc for SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable power profile setting for SMU 13.0.0Evan Quan
Fulfill the interfaces for retrieving and setting power profile mode on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable ac/dc switching for SMU 13.0.0Evan Quan
Fulfill the ->set_power_source interface which notifies PMFW the current system power source(AC/DC). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amd/pm: enable power limit retrieving and setting for SMU 13.0.0Evan Quan
Fulfill the interfaces for retrieving and setting power limit on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: simplify the return expression of vega10_ih_hw_init()Minghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu: simplify the return expressionMinghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/gfx11: Avoid uninitialised variable 'index'Mike Lothian
This stops clang complaining: drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized] if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:433:30: note: uninitialized use occurs here amdgpu_device_wb_free(adev, index); ^~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:2: note: remove the 'if' if its condition is always false if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:364:16: note: initialize the variable 'index' to silence this warning unsigned index; ^ = 0 Signed-off-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/gfx10: Avoid uninitialised variable 'index'Mike Lothian
This stops clang complaining: drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized] if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3903:30: note: uninitialized use occurs here amdgpu_device_wb_free(adev, index); ^~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:2: note: remove the 'if' if its condition is always false if (ring->is_mes_queue) { ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3839:16: note: initialize the variable 'index' to silence this warning unsigned index; ^ = 0 Signed-off-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/gfx11: Add missing breakMike Lothian
This stops clang complaining: drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough] default: ^ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: note: insert 'break;' to avoid fall-through default: ^ break; Signed-off-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05Revert "fbdev: fbmem: add a helper to determine if an aperture is used by a ↵Alex Deucher
fw fb" This reverts commit 9a45ac2320d0a6ae01880a30d4b86025fce4061b. This was added a helper for amdgpu to workaround a runtime pm regression caused by a runtime pm fix in efifb. We now have a better workaround in amdgpu in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)") so this workaround is no longer necessary. Since amdgpu was the only user of this interface, we can remove it. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05Revert "drm/amdgpu: disable runpm if we are the primary adapter"Alex Deucher
This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b. This workaround is no longer necessary. We have a better workaround in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)"). Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05drm/amdgpu/gfx11: remove some register fields that no longer existAlex Deucher
Some copy paste leftovers for older asics. They were protected by __BIG_ENDIAN, so we didn't notice them initially. Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add VCN 4.0 SupportJames Zhu
Enable VCN 4.0 on asics where it is present. Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add vcn_4_0_0 video codec queryJames Zhu
Add vcn_4_0_0 video codec query. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/vcn: enable vcn4 dpg modeJames Zhu
Enable vcn4 dpg mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/jpeg: enable JPEG PG and CG for VCN4_0_0James Zhu
Enable JPEG PG and CG for VCN4_0_0. Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: enable VCN4 PG and CG for VCN4_0_0Leo Liu
Most of the tiles can be power/clock gated. Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/jpeg: add jpeg support for VCN4_0_0James Zhu
Add jpeg support for VCN4_0_0. Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add VCN4 ip block supportLeo Liu
Add VCN 4.0 initialization and decoder/encoder ring functions. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add irq sources for vcn v4_0James Zhu
Add the interrupt source packet definitions for VCN4. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: move out asic specific definition from common headerJames Zhu
Move out asic specific definition from common header. Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: make software ring functions reuseable for newer VCNLeo Liu
Software ring will be supported only from VCN4 Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add vcn 4_0_0 header files v7Leo Liu
Add VCN 4.0.0 registers Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add SDMA v6_0 ip blockStanley Yang
Add SDMA v6 ip block for asics which support it. Signed-off-by: Stanley Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add initial support for sdma v6.0Stanley Yang
Add functions for SDMA version 6. Signed-off-by: Stanley Yang <Stanley.Yang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add sdma v6_0_0 pkt header v3Hawking Zhang
v1: add sdma v6_0_0 pkt definitions (Hawking) v2: add gcr control field definition (Likun) v3: correct some definitions (Likun) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: 3.2.184Aric Cyr
This version brings along following fixes: - Have optc3 function accessible to newer DCN - Add CM boot option for USB4 tunneling - Fix system hang issue when game resolution is changed - Remove outdated register for dcn3+ - Add new DSC interface to disconnect from pipe - Clean up pixel format types in enum surface_pixel_format Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: [FW Promotion] Release 0.0.115.0Anthony Koo
- Add new cmd for querying HPD state Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: Clean up pixel format typesAric Cyr
[Why & How] Equate the first non-subsampled video surface format to the enum SURFACE_PIXEL_FORMAT_SUBSAMPLE_END since it's not a real format. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: Add new DSC interface to disconnect from pipeEric Bernstein
[Why & How] Add new DSC interface to disconnect from pipe. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: Remove outdated register for dcn3+Tse, Kaitlyn
[Why & How] Remove MPCC_OGAM_LUT_RAM_CONTROL register which is outdated. Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Tse Kaitlyn <Kaitlyn.Tse@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04Revert "drm/amd/display: Reset cached PSR parameters after hibernate"Evgenii Krasnikov
This reverts commit d2069326d26c7de78e77a060fb6e6d0d21c35dbd. Commit d2069326d26c ("drm/amd/display: Reset cached PSR parameters after hibernate") causes a system hang when game resolution is changed. Revert it. Reviewed-by: Jayendran Ramani <Jayendran.Ramani@amd.com> Reviewed-by: Harry Vanzylldejong <Harry.Vanzylldejong@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Evgenii Krasnikov <Evgenii.Krasnikov@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: Add Connection Manager boot option.Jimmy Kizito
[Why] Boot up behaviour may differ depending on the Connection Manager handling USB4 tunneling. [How] Send boot option to firmware to indicate Connection Manager. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amd/display: Make OPTC3 function accessible to other DCNLee, Alvin
[Why] Newer DCN should use optc3 [How] Declare optc3 vmin/vmax function in header. Reviewed-by: Harry Vanzylldejong <Harry.Vanzylldejong@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add MES11 supportAlex Deucher
Enable MES 11 on asics which support it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/discovery: add GFX 11.0 SupportLikun Gao
Enable GFX 11.0 on asics where it is present. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/gfx11: enable kiq to map mes ringJack Xiao
Enable KIQ to map MES ring: 1). add MES queue mapping support in MAP_QUEUES packet. 2). use correct MQD settings for MES queue. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/gfx10: enable kiq to map mes ringJack Xiao
Enable KIQ to map MES ring: 1). add MES queue mapping support in MAP_QUEUES packet. 2). use correct MQD settings for MES queue. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: enable GENERIC0_INT for gfx/compute pipesHawking Zhang
To generate an interrupt to RLC for accessing indirect registers that CP can not access directly Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: enable fgcg for soc21Evan Quan
Enable Fine Grained Clock Gating on soc21 asics. Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: enable GFX CGCG/CGLS for GC11.0.0Evan Quan
Enable GFX CGCG (coarse grained clockgating) and CGLS (coarse grained light sleep) for GC11.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdkfd: Add KFD support for soc21 v3Mukul Joshi
Add initial support for soc21 in KFD compute driver (Mukul) - Add new definition for soc21 device. - Add new file for amdgpu-kfd interface for GFX11 family. - Add new file for queue management, interrupt handling, mqd management for GFX11 family in KFD driver. - Related changes/updates for soc21 device in KFD driver. - Repurpose last 2 entries of SDMA MQD for driver use. v2: Add an optional argument into update queue operation (Mukul) v3: Switch to ip version check, replace kgd_dev with amdgpu_device (Hawking) Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdkfd: add helper to generate cache info from gfx configAlex Deucher
Rather than using hardcoded tables, we can use the gfx and gmc config pulled from the IP discovery table to generate the cache configuration. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add init support for GFX11 (v2)Hawking Zhang
Add initial support for GC version 11. GC is the graphics and compute block on the GPU. v1: add initial gfx11 support (Wenhui) v2: switch to new amdgpu_gfx_is_high_priority_compute_queue interface (Hawking) v3: fix num_mec (Alex) Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu/mes11: initiate mes v11 supportJack Xiao
Initiate mes v11 code base from mes v10, rename function and register names. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: support imu for gfx11Likun Gao
Add support to initialize imu for gfx v11. IMU is a new power management block for gfx which manages gfx power. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: add mes unmap legacy queue routineJack Xiao
For mes kiq has been taken over by mes sched, drv can't directly use mes kiq to unmap queues. drv has to use mes sched api to unmap legacy queue. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04drm/amdgpu: support RS64 CP fw front door loadLikun Gao
Support to load RS64 CP firmware front door load. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 16:38:43 +0000