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- Make ixp4xx driver depend on ARCH_IXP4XX (Geert Uytterhoeven)
* remotes/lorenzo/pci/misc:
PCI: controller: PCI_IXP4XX should depend on ARCH_IXP4XX
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- Add max-virtual-functions to endpoint binding (Kishon Vijay Abraham I)
- Add pci_epf_add_vepf() API to add virtual function to endpoint (Kishon
Vijay Abraham I)
- Add pci_epf_vepf_link() to link virtual function to endpoint physical
function (Kishon Vijay Abraham I)
- Add virtual function number to pci_epc_ops endpoint ops interfaces
(Kishon Vijay Abraham I)
- Simplify register base address computation for endpoint BAR configuration
(Kishon Vijay Abraham I)
- Add support to configure virtual functions in cadence endpoint driver
(Kishon Vijay Abraham I)
- Add SR-IOV configuration to endpoint test driver (Kishon Vijay Abraham I)
- Document configfs usage to create virtual functions for endpoints (Kishon
Vijay Abraham I)
* remotes/lorenzo/pci/endpoint:
Documentation: PCI: endpoint/pci-endpoint-cfs: Guide to use SR-IOV
misc: pci_endpoint_test: Populate sriov_configure ops to configure SR-IOV device
PCI: cadence: Add support to configure virtual functions
PCI: cadence: Simplify code to get register base address for configuring BAR
PCI: endpoint: Add virtual function number in pci_epc ops
PCI: endpoint: Add support to link a physical function to a virtual function
PCI: endpoint: Add support to add virtual function in endpoint core
dt-bindings: PCI: pci-ep: Add binding to specify virtual function
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- Document optional clock DT property (Michal Simek)
- Enable PCIe ref clock (Hyun Kwon)
* remotes/lorenzo/pci/xilinx-nwl:
PCI: xilinx-nwl: Enable the clock through CCF
dt-bindings: pci: xilinx-nwl: Document optional clock property
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- Remove redundant dev_err() after devm_ioremap_resource() (ErKun Yang)
* remotes/lorenzo/pci/xgene:
PCI: xgene-msi: Remove redundant dev_err() call in xgene_msi_probe()
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- Fix handling BME_CHGED event (Om Prakash Singh)
- Fix MSI-X programming (Om Prakash Singh)
- Disable interrupts before entering L2 (Om Prakash Singh)
- Don't allow suspend when Tegra PCIe is in EP mode (Om Prakash Singh)
* remotes/lorenzo/pci/tegra194:
PCI: tegra194: Cleanup unused code
PCI: tegra194: Don't allow suspend when Tegra PCIe is in EP mode
PCI: tegra194: Disable interrupts before entering L2
PCI: tegra194: Fix MSI-X programming
PCI: tegra194: Fix handling BME_CHGED event
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- Remove unused struct tegra_pcie_bus (Krzysztof Wilczyński)
* remotes/lorenzo/pci/tegra:
PCI: tegra: make const array err_msg static
PCI: tegra: Use 'seq_puts' instead of 'seq_printf'
PCI: tegra: Fix OF node reference leak
PCI: tegra: Remove unused struct tegra_pcie_bus
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- Fix runtime PM imbalance in rcar_pcie_ep_probe() (Dinghao Liu)
* remotes/lorenzo/pci/rcar:
PCI: rcar: Add L1 link state fix into data abort hook
PCI: rcar: Fix runtime PM imbalance in rcar_pcie_ep_probe()
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- Split DT bindings for PCIe controllers with independent MSI domains into
separate nodes for MT2712/MT7622 (Chuanjia Liu)
- Locate shared registers from "mediatek,generic-pciecfg" property
(Chuanjia Liu)
- Get IRQ from "pcie_irq" if "interrupt-names" property is present to fix
an MSI issue (Chuanjia Liu)
- Get PCI domain from "linux,pci-domain" property if present (Chuanjia Liu)
* remotes/lorenzo/pci/mediatek:
PCI: mediatek: Use PCI domain to handle ports detection
PCI: mediatek: Add new method to get irq number
PCI: mediatek: Add new method to get shared pcie-cfg base address
dt-bindings: PCI: mediatek: Update the Device tree bindings
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- Add Intel Keem Bay PCIe controller driver and DT binding (Srikanth
Thokala)
* remotes/lorenzo/pci/keembay:
PCI: keembay: Add support for Intel Keem Bay
dt-bindings: PCI: Add Intel Keem Bay PCIe controller
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- Don't fail devm_pci_alloc_host_bridge() on missing 'ranges' (Rob Herring)
- Fix BCMA probe resource handling (Rob Herring)
* remotes/lorenzo/pci/iproc:
PCI: iproc: Fix BCMA probe resource handling
PCI: of: Don't fail devm_pci_alloc_host_bridge() on missing 'ranges'
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- Add domain_nr in struct pci_host_bridge (Boqun Feng)
- Use host bridge MSI domain for root buses if present (Boqun Feng)
- Allow ARM64 virtual host bridge with no ACPI companion (e.g., Hyper-V)
(Boqun Feng)
- Make Hyper-V enumeration more generic (Arnd Bergmann)
- Set Hyper-V domain_nr at probe-time (Boqun Feng)
- Set up Hyper-V MSI domain at bridge probe-time (Boqun Feng)
- Enable Hyper-V bridge probing on ARM64 (Boqun Feng)
* remotes/lorenzo/pci/hyper-v:
PCI: hv: Turn on the host bridge probing on ARM64
PCI: hv: Set up MSI domain at bridge probing time
PCI: hv: Set ->domain_nr of pci_host_bridge at probing time
PCI: hv: Generify PCI probing
arm64: PCI: Support root bridge preparation for Hyper-V
arm64: PCI: Restructure pcibios_root_bridge_prepare()
PCI: Support populating MSI domains of root buses via bridges
PCI: Introduce domain_nr in pci_host_bridge
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- Support Hyper-V Create Interrupt v3 message (Sunil Muthuswamy)
* remotes/lorenzo/pci/hv:
PCI: hv: Support for create interrupt v3
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- Convert bool in structs to bitfield (Kishon Vijay Abraham I)
- Work around J7200 non-PCIe SERDES lane electrical issue that prevents
PCIe link training (Nadeem Athani)
- Add J7200 PCIe support to j721e (Kishon Vijay Abraham I)
- Add AM64 PCIe support to j721e (Kishon Vijay Abraham I)
- Add J7200 and AM64 device IDs to endpoint test (Kishon Vijay Abraham I)
* remotes/lorenzo/pci/cadence:
misc: pci_endpoint_test: Add deviceID for AM64 and J7200
PCI: j721e: Add PCIe support for AM64
PCI: j721e: Add PCIe support for J7200
PCI: cadence: Add quirk flag to set minimum delay in LTSSM Detect.Quiet state
PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool
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- Fix PIO config access status checking (Evan Wang)
- Increase config access polling delay to 1.5s (Pali Rohár)
- Add PCIe Root Capabilities to bridge emulation (Pali Rohár)
- Report Config Request Retry Status when Software Visibility enabled (Pali
Rohár)
- Add back configuration of PCIe resources from 'ranges' DT property and
pay attention to DT size and CPU/PCI offset to fix issues with I/O port
space (Pali Rohár)
- Serialize masking and unmasking legacy INTx interrupts (Pali Rohár)
* remotes/lorenzo/pci/aardvark:
PCI: aardvark: Fix masking and unmasking legacy INTx interrupts
PCI: aardvark: Configure PCIe resources from 'ranges' DT property
PCI: aardvark: Fix reporting CRS value
PCI: pci-bridge-emul: Add PCIe Root Capabilities Register
PCI: aardvark: Increase polling delay to 1.5s while waiting for PIO response
PCI: aardvark: Fix checking for PIO status
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- Add Toshiba Visconti PCIe host controller driver (Nobuhiro Iwamatsu)
* pci/visconti:
MAINTAINERS: Add entries for Toshiba Visconti PCIe controller
PCI: visconti: Add Toshiba Visconti PCIe host controller driver
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- Add Rockchip RK356X host controller driver (Simon Xue)
* pci/rockchip-dwc:
PCI: rockchip-dwc: Add Rockchip RK356X host controller driver
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- Remove surplus break statement (Krzysztof Wilczyński)
* pci/dwc:
PCI: dwc: Remove surplus break statement after return
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- Remove surplus break statement and local code block (Krzysztof
Wilczyński)
* pci/artpec6:
PCI: artpec6: Remove local code block from switch statement
PCI: artpec6: Remove surplus break statement after return
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- Add pci_numachip_init() declaration (Krzysztof Wilczyński)
- Allocate pci_dev_str_match_path() string atomically (Dan Carpenter)
- Drop error message when Precision Time Measurement supported but not
enabled (Jakub Kicinski)
- Correct the pci_iomap.h header guard #endif comment (Jonathan Cameron)
- Add schedule point in proc_bus_pci_read() (Krzysztof Wilczyński)
- Make saved capability state private to core (Bjorn Helgaas)
- Sync __pci_register_driver() stub for CONFIG_PCI=n (Andy Shevchenko)
- Convert sta2x11 from PCI-DMA-API to generic DMA-API (Christophe JAILLET)
* pci/misc:
x86/PCI: sta2x11: switch from 'pci_' to 'dma_' API
PCI: Sync __pci_register_driver() stub for CONFIG_PCI=n
PCI: Make saved capability state private to core
PCI: Add schedule point in proc_bus_pci_read()
PCI: Correct the pci_iomap.h header guard #endif comment
PCI/PTM: Remove error message at boot
PCI: Fix pci_dev_str_match_path() alloc while atomic bug
x86/PCI: Add pci_numachip_init() declaration
# Conflicts:
# include/linux/pci.h
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- Check Resource Item Names against those defined for type (Bjorn Helgaas)
- Treat initial 0xff as missing EEPROM (Heiner Kallweit)
- Reject resource tags with invalid size (Bjorn Helgaas)
- Don't check Large Resource Item Names for validity (Bjorn Helgaas)
- Allow access to valid parts of VPD if some is invalid (Bjorn Helgaas)
- Remove pci_vpd_size() old_size argument (Heiner Kallweit)
- Make pci_vpd_wait() uninterruptible (Heiner Kallweit)
- Remove struct pci_vpd.flag (Heiner Kallweit)
- Remove struct pci_vpd_ops (Heiner Kallweit)
- Remove struct pci_vpd.valid member (Heiner Kallweit)
- Embed struct pci_vpd in struct pci_dev (Heiner Kallweit)
- Determine VPD size in pci_vpd_init() (Heiner Kallweit)
- Treat invalid VPD like missing VPD capability (Heiner Kallweit)
- Add pci_vpd_alloc() to allocate buffer and read VPD into it (Heiner
Kallweit)
- Add pci_vpd_find_ro_info_keyword() (Heiner Kallweit)
- Add pci_vpd_check_csum() (Heiner Kallweit)
- Add pci_vpd_find_id_string() (Heiner Kallweit)
- Read VPD with pci_vpd_alloc() (bnx2x, bnxt, sfc, sfc falcon, tg3 drivers)
(Heiner Kallweit)
- Search VPD with pci_vpd_find_ro_info_keyword() (bnx2, bnx2x, bnxt, cxgb4,
cxlflash SCSI, sfc, sfc falcon, tg3 drivers) (Heiner Kallweit)
- Search VPD with pci_vpd_find_id_string() (cxgb4 driver) (Heiner Kallweit)
- Validate VPD checksum with pci_vpd_check_csum() (cxgb4, tg3 drivers)
(Heiner Kallweit)
- Replace open-coded byte swapping with swab32s() in bnx2 (Heiner Kallweit)
- Remove unused vpd_param member ec (Heiner Kallweit)
- Stop exporting pci_vpd_find_tag(), pci_vpd_find_info_keyword() (Heiner
Kallweit)
- Move several VPD defines and inlines to internal PCI core (Heiner
Kallweit)
* pci/vpd:
PCI/VPD: Use unaligned access helpers
PCI/VPD: Clean up public VPD defines and inline functions
cxgb4: Use pci_vpd_find_id_string() to find VPD ID string
PCI/VPD: Add pci_vpd_find_id_string()
PCI/VPD: Include post-processing in pci_vpd_find_tag()
PCI/VPD: Stop exporting pci_vpd_find_info_keyword()
PCI/VPD: Stop exporting pci_vpd_find_tag()
scsi: cxlflash: Search VPD with pci_vpd_find_ro_info_keyword()
cxgb4: Search VPD with pci_vpd_find_ro_info_keyword()
cxgb4: Remove unused vpd_param member ec
cxgb4: Validate VPD checksum with pci_vpd_check_csum()
bnxt: Search VPD with pci_vpd_find_ro_info_keyword()
bnxt: Read VPD with pci_vpd_alloc()
bnx2x: Search VPD with pci_vpd_find_ro_info_keyword()
bnx2x: Read VPD with pci_vpd_alloc()
bnx2: Replace open-coded byte swapping with swab32s()
bnx2: Search VPD with pci_vpd_find_ro_info_keyword()
sfc: falcon: Search VPD with pci_vpd_find_ro_info_keyword()
sfc: falcon: Read VPD with pci_vpd_alloc()
tg3: Search VPD with pci_vpd_find_ro_info_keyword()
tg3: Validate VPD checksum with pci_vpd_check_csum()
tg3: Read VPD with pci_vpd_alloc()
sfc: Search VPD with pci_vpd_find_ro_info_keyword()
sfc: Read VPD with pci_vpd_alloc()
PCI/VPD: Add pci_vpd_check_csum()
PCI/VPD: Add pci_vpd_find_ro_info_keyword()
PCI/VPD: Add pci_vpd_alloc()
PCI/VPD: Treat invalid VPD like missing VPD capability
PCI/VPD: Determine VPD size in pci_vpd_init()
PCI/VPD: Embed struct pci_vpd in struct pci_dev
PCI/VPD: Remove struct pci_vpd.valid member
PCI/VPD: Remove struct pci_vpd_ops
PCI/VPD: Reorder pci_read_vpd(), pci_write_vpd()
PCI/VPD: Remove struct pci_vpd.flag
PCI/VPD: Make pci_vpd_wait() uninterruptible
PCI/VPD: Remove pci_vpd_size() old_size argument
PCI/VPD: Allow access to valid parts of VPD if some is invalid
PCI/VPD: Don't check Large Resource Item Names for validity
PCI/VPD: Reject resource tags with invalid size
PCI/VPD: Treat initial 0xff as missing EEPROM
PCI/VPD: Check Resource Item Names against those valid for type
PCI/VPD: Correct diagnostic for VPD read failure
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- Add ACS quirks for NXP LX2xx0 and LX2xx2 platforms (Wasim Khan)
- Add ACS quirks for Cavium multi-function devices (George Cherian)
- Enforce pci=noats with Transaction Blocking (Alex Williamson)
* pci/virtualization:
PCI/ACS: Enforce pci=noats with Transaction Blocking
PCI: Add ACS quirks for Cavium multi-function devices
PCI: Add ACS quirks for NXP LX2xx0 and LX2xx2 platforms
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- Refactor pci_ioremap_bar() and pci_ioremap_wc_bar() (Krzysztof
Wilczyński)
- Optimize pci_resource_len() to reduce kernel size (Zhen Lei)
* pci/resource:
PCI: Optimize pci_resource_len() to reduce kernel size
PCI: Refactor pci_ioremap_bar() and pci_ioremap_wc_bar()
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- Cache PCIe Device Capabilities register (Amey Narkhede)
- Add pcie_reset_flr() with 'probe' argument (Amey Narkhede)
- Add pdev->reset_methods[] array to track reset method ordering (Amey
Narkhede)
- Remove reset_fn field from pci_dev (Amey Narkhede)
- Add sysfs interface to query and set device reset mechanism (Amey
Narkhede)
- Add pci_set_acpi_fwnode() to set ACPI_COMPANION (Shanker Donthineni)
- Use acpi_pci_power_manageable() instead of duplicating logic (Shanker
Donthineni)
- Set ACPI fwnode early and at the same time with OF (Shanker Donthineni)
- Add support for ACPI _RST reset method (Shanker Donthineni)
- Change reset function 'probe' argument to bool (Amey Narkhede)
* pci/reset:
PCI: Change the type of probe argument in reset functions
PCI: Add support for ACPI _RST reset method
PCI: Setup ACPI fwnode early and at the same time with OF
PCI: Use acpi_pci_power_manageable()
PCI: Add pci_set_acpi_fwnode() to set ACPI_COMPANION
PCI: Allow userspace to query and set device reset mechanism
PCI: Remove reset_fn field from pci_dev
PCI: Add array to track reset method ordering
PCI: Add pcie_reset_flr() with 'probe' argument
PCI: Cache PCIe Device Capabilities register
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- Enable Bandwidth Notification only if port supports it (Stuart Hayes)
* pci/portdrv:
PCI/portdrv: Enable Bandwidth Notification only if port supports it
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- Convert irq_find_mapping() + generic_handle_irq() to
generic_handle_domain_irq() (Marc Zyngier)
* pci/irq:
PCI: Bulk conversion to generic_handle_domain_irq()
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- Allow PASID on fake PCIe devices, e.g., HiSilicon KunPeng920 and
KunPeng930 AMBA devices, without TLP prefixes (Zhangfei Gao)
- Allow SVA / dma-can-stall on fake PCIe devices (Zhangfei Gao)
* pci/iommu:
PCI: Set dma-can-stall for HiSilicon chips
PCI: Allow PASID on fake PCIe devices without TLP prefixes
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- Fix ibmphp double unmap of io_mem (Vishal Aslot)
* pci/hotplug:
PCI: ibmphp: Fix double unmap of io_mem
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- Call Max Payload Size-related fixup quirks early, so they're considered
by pci_configure_mps() (Marek Behún)
- Restrict Max Payload Size Supported to work around ASMedia ASM1062 SATA
erratum (Marek Behún)
- Return ~0 data on pciconfig_read() CAP_SYS_ADMIN failure (Krzysztof
Wilczyński)
* pci/enumeration:
PCI: Return int from pciconfig_read() syscall
PCI: Return ~0 data on pciconfig_read() CAP_SYS_ADMIN failure
PCI: Restrict ASMedia ASM1062 SATA Max Payload Size Supported
PCI: Call Max Payload Size-related fixup quirks early
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ebda_rsrc_controller() calls iounmap(io_mem) on the error path. Its caller,
ibmphp_access_ebda(), also calls iounmap(io_mem) on good and error paths.
Remove the iounmap(io_mem) invocation from ebda_rsrc_controller().
[bhelgaas: remove item from TODO]
Link: https://lore.kernel.org/r/20210818165751.591185-1-os.vaslot@gmail.com
Signed-off-by: Vishal Aslot <os.vaslot@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The wrappers in include/linux/pci-dma-compat.h should go away.
The patch has been generated with the coccinelle script below.
It has been hand modified to use 'dma_set_mask_and_coherent()' instead of
'pci_set_dma_mask()/pci_set_consistent_dma_mask()' when applicable.
This is less verbose.
It has been compile tested.
@@
@@
- PCI_DMA_BIDIRECTIONAL
+ DMA_BIDIRECTIONAL
@@
@@
- PCI_DMA_TODEVICE
+ DMA_TO_DEVICE
@@
@@
- PCI_DMA_FROMDEVICE
+ DMA_FROM_DEVICE
@@
@@
- PCI_DMA_NONE
+ DMA_NONE
@@
expression e1, e2, e3;
@@
- pci_alloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3;
@@
- pci_zalloc_consistent(e1, e2, e3)
+ dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
@@
expression e1, e2, e3, e4;
@@
- pci_free_consistent(e1, e2, e3, e4)
+ dma_free_coherent(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_single(e1, e2, e3, e4)
+ dma_map_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_single(e1, e2, e3, e4)
+ dma_unmap_single(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4, e5;
@@
- pci_map_page(e1, e2, e3, e4, e5)
+ dma_map_page(&e1->dev, e2, e3, e4, e5)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_page(e1, e2, e3, e4)
+ dma_unmap_page(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_map_sg(e1, e2, e3, e4)
+ dma_map_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_unmap_sg(e1, e2, e3, e4)
+ dma_unmap_sg(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+ dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_single_for_device(e1, e2, e3, e4)
+ dma_sync_single_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+ dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
@@
expression e1, e2, e3, e4;
@@
- pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+ dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
@@
expression e1, e2;
@@
- pci_dma_mapping_error(e1, e2)
+ dma_mapping_error(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_dma_mask(e1, e2)
+ dma_set_mask(&e1->dev, e2)
@@
expression e1, e2;
@@
- pci_set_consistent_dma_mask(e1, e2)
+ dma_set_coherent_mask(&e1->dev, e2)
Link: https://lore.kernel.org/r/99656452963ba3c63a6cb12e151279d81da365eb.1629658069.git.christophe.jaillet@wanadoo.fr
Link: https://lore.kernel.org/kernel-janitors/20200421081257.GA131897@infradead.org/
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use unaligned access helpers to simplify the code.
Link: https://lore.kernel.org/r/0f1c7e21-5330-72ab-139d-f5ce3c65f04a@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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After recent introduction of new VPD API functions and user migration
these defines and inline functions aren't used outside VPD core any
longer.
Link: https://lore.kernel.org/r/d33e06bf-bc5e-ece7-bf35-7245ae224d1b@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use pci_vpd_find_id_string() to find the VPD ID string. This simplifies the
code and avoids the need for pci_vpd_lrdt_size().
Link: https://lore.kernel.org/r/19ea2e9b-6e94-288a-6612-88db01b1b417@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Add a pci_vpd_find_id_string() API function to retrieve the ID string from
VPD.
This way callers don't need pci_vpd_lrdt_size() any longer, and it can be
made private to the VPD core.
Link: https://lore.kernel.org/r/c5225bf6-8d29-970d-e271-0d7b52252630@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Move pci_vpd_find_tag() post-processing from pci_vpd_find_ro_info_keyword()
to pci_vpd_find_tag(). This simplifies function pci_vpd_find_id_string()
that will be added in a subsequent patch.
Link: https://lore.kernel.org/r/fb15393f-d3b2-e140-2643-570d3abd7382@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Now that the last users have been migrated to pci_vpd_find_ro_keyword()
we can stop exporting this function. It's still used in VPD core code.
Link: https://lore.kernel.org/r/96ca2a56-383e-9b61-9cba-4f1e5611dc15@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Now that the last users have been migrated to pci_vpd_find_ro_keyword()
we can stop exporting this function. It's still used in VPD core code.
Link: https://lore.kernel.org/r/71131eca-0502-7878-365f-30b6614161cf@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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HiSilicon KunPeng920 and KunPeng930 have devices that appear as PCI but are
actually on the AMBA bus. These fake PCI devices can support SVA via the
SMMU stall feature.
DT systems can indicate this in the device tree, but ACPI systems don't
have that mechanism, so add a "dma-can-stall" property manually for them.
[bhelgaas: add text from Robin as comment near quirk]
Link: https://lore.kernel.org/r/1626144876-11352-4-git-send-email-zhangfei.gao@linaro.org
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
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Add a driver for the DesignWare-based PCIe controller found on
RK356X. The existing pcie-rockchip-host driver is only used for
the Rockchip-designed IP found on RK3399.
Link: https://lore.kernel.org/r/20210625065511.1096935-1-xxm@rock-chips.com
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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As part of code refactoring completed in a0fd361db8e5 ("PCI: dwc: Move
"dbi", "dbi2", and "addr_space" resource setup into common code"),
dw_plat_add_pcie_ep() was removed and the call to the dw_pcie_ep_init() was
moved into dw_plat_pcie_probe().
This left a break statement behind that is not needed any more as as
dw_plat_pcie_probe() returns immediately after calling dw_pcie_ep_init().
Remove this surplus break statement that became dead code.
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20210701210252.1638709-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The switch statement in the artpec6_pcie_probe() has a local code block
where "val" is defined and immediately used by the artpec6_pcie_readl().
This extra code block adds brackets at the same indentation level as the
switch statement itself which can hinder readability of the code.
Move the "val" declaration to the top of the function and remove
the extra code block from the switch statement.
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20210701204401.1636562-2-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
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As part of code refactoring completed in a0fd361db8e5 ("PCI: dwc: Move
"dbi", "dbi2", and "addr_space" resource setup into common code"),
artpec6_add_pcie_ep() was removed and the call to the dw_pcie_ep_init()
was moved into artpec6_pcie_probe().
This left a break statement behind that is not needed any more as
artpec6_pcie_probe() returns immediately after calling dw_pcie_ep_init().
Remove this surplus break statement that became dead code.
Link: https://lore.kernel.org/r/20210701204401.1636562-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Add entries for Toshiba Visconti PCIe controller binding and driver.
Link: https://lore.kernel.org/r/20210811083830.784065-4-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Add support for the PCIe RC controller on Toshiba Visconti ARM SoCs. This
PCIe controller is based on the Synopsys DesignWare PCIe core.
Link: https://lore.kernel.org/r/20210811083830.784065-3-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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Previously we assumed that all Root Ports and Switch Downstream Ports
supported Link Bandwidth Notification. Per spec, this is only required
for Ports supporting Links wider than x1 and/or multiple Link speeds
(PCIe r5.0, sec 7.5.3.6).
Because we assumed all Ports supported it, we tried to set up a Bandwidth
Notification IRQ, which failed for devices that don't support IRQs at all,
which meant pcieport didn't attach to the Port at all.
Check the Link Bandwidth Notification Capability bit and enable the service
only when the Port supports it.
[bhelgaas: commit log]
Fixes: e8303bb7a75c ("PCI/LINK: Report degraded links via link bandwidth notification")
Link: https://lore.kernel.org/r/20210512213314.7778-1-stuart.w.hayes@gmail.com
Signed-off-by: Stuart Hayes <stuart.w.hayes@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lukas Wunner <lukas@wunner.de>
Cc: stable@vger.kernel.org
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Some systems, e.g., HiSilicon KunPeng920 and KunPeng930, have devices that
appear as PCI but are actually on the AMBA bus. Some of these fake PCI
devices support a PASID-like feature and they do have a working PASID
capability even though they do not use the PCIe Transport Layer Protocol
and do not support TLP prefixes.
Add a pasid_no_tlp bit for this "PASID works without TLP prefixes" case and
update pci_enable_pasid() so it can enable PASID on these devices.
Set this bit for HiSilicon KunPeng920 and KunPeng930.
[bhelgaas: squashed, commit log]
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/1626144876-11352-2-git-send-email-zhangfei.gao@linaro.org
Link: https://lore.kernel.org/r/1626144876-11352-3-git-send-email-zhangfei.gao@linaro.org
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Use of_get_pci_domain_nr() to get the pci domain.
If the "linux,pci-domain" property is present, we assume that the PCIe
bridge is an individual bridge, hence we only need to parse one port.
Link: https://lore.kernel.org/r/20210823032800.1660-5-chuanjia.liu@mediatek.com
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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Use platform_get_irq_byname() to get the irq number
if the "interrupt-names" property is defined.
Link: https://lore.kernel.org/r/20210823032800.1660-4-chuanjia.liu@mediatek.com
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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For the new dts format, add a new method to get
shared pcie-cfg base address and use it to configure
the PCIECFG controller
Link: https://lore.kernel.org/r/20210823032800.1660-3-chuanjia.liu@mediatek.com
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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There are two independent PCIe controllers in MT2712 and MT7622
platform. Each of them should contain an independent MSI domain.
In old dts architecture, MSI domain will be inherited from the root
bridge, and all of the devices will share the same MSI domain.
Hence that, the PCIe devices will not work properly if the irq number
which required is more than 32.
Split the PCIe node for MT2712 and MT7622 platform to comply with
the hardware design and fix MSI issue.
Link: https://lore.kernel.org/r/20210823032800.1660-2-chuanjia.liu@mediatek.com
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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