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2021-02-01scsi: ufs: use devm_blk_ksm_init()Eric Biggers
Use the new resource-managed variant of blk_ksm_init() so that the UFS driver doesn't have to manually call blk_ksm_destroy(). Signed-off-by: Eric Biggers <ebiggers@google.com> Reviewed-by: Satya Tangirala <satyat@google.com> Link: https://lore.kernel.org/r/20210121082155.111333-3-ebiggers@kernel.org Acked-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01block/keyslot-manager: introduce devm_blk_ksm_init()Eric Biggers
Add a resource-managed variant of blk_ksm_init() so that drivers don't have to worry about calling blk_ksm_destroy(). Note that the implementation uses a custom devres action to call blk_ksm_destroy() rather than switching the two allocations to be directly devres-managed, e.g. with devm_kmalloc(). This is because we need to keep zeroing the memory containing the keyslots when it is freed, and also because we want to continue using kvmalloc() (and there is no devm_kvmalloc()). Signed-off-by: Eric Biggers <ebiggers@google.com> Reviewed-by: Satya Tangirala <satyat@google.com> Acked-by: Jens Axboe <axboe@kernel.dk> Link: https://lore.kernel.org/r/20210121082155.111333-2-ebiggers@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-aspeed: Fix kunit-related build errorAndrew Jeffery
Randy found that with the following Kconfig settings we have duplicate definitions (e.g. __inittest()) in sdhci-of-aspeed due to competing module_init()/module_exit() calls from kunit and driver the itself. ``` CONFIG_MMC_SDHCI_OF_ASPEED=m CONFIG_MMC_SDHCI_OF_ASPEED_TEST=y ``` Conditionally open-code the kunit initialisation to avoid the error. Fixes: 7efa02a981d6 ("mmc: sdhci-of-aspeed: Add KUnit tests for phase calculations") Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Link: https://lore.kernel.org/r/20210122114852.3790565-1-andrew@aj.id.au Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: remove sirf prima/atlas driverArnd Bergmann
The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/r/20210120142801.334550-3-arnd@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: remove dw_mmc-zx driverArnd Bergmann
The zte zx platform is getting removed, so this driver is no longer needed. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210120142801.334550-2-arnd@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: atmel-mci: Assign boolean values to a bool variableJiapeng Zhong
Fix the following coccicheck warnings: ./drivers/mmc/host/atmel-mci.c:2436:2-34: WARNING: Assignment of 0/1 to bool variable. ./drivers/mmc/host/atmel-mci.c:2425:2-20: WARNING: Assignment of 0/1 to bool variable. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/1611128377-66216-1-git-send-email-abaci-bugfix@linux.alibaba.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-iproc: Add ACPI bindings for the RPiJeremy Linton
The RPi4 has an Arasan controller it carries over from the RPi3 and a newer eMMC2 controller. Because of a couple of quirks, it seems wiser to bind these controllers to the same driver that DT is using on this platform rather than the generic sdhci_acpi driver with PNP0D40. So, BCM2847 describes the older Arasan and BRCME88C describes the newer eMMC2. The older Arasan is reusing an existing ACPI _HID used by other OSes booting these tables on the RPi. With this change, Linux is capable of utilizing the SD card slot, and the Wi-Fi when booted with UEFI+ACPI on the RPi4. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210120000406.1843400-2-jeremy.linton@arm.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: mmci: Convert bindings to DT schemaLinus Walleij
This converts the MMCI bindings from simple text to a proper schema. Cc: devicetree@vger.kernel.org Cc: Marek Vasut <marex@denx.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20210119100655.2755164-1-linus.walleij@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: test: clean up mmc_test_cleanup()Yue Hu
mmc_test_cleanup() has same body as __mmc_test_prepare() with write except the character to memset(). Signed-off-by: Yue Hu <huyue2@yulong.com> Link: https://lore.kernel.org/r/20210119073705.375-1-zbestahu@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: test: remove the shutdown functionYue Hu
Since it's doing nothing for shutdown behavior. And the callback will be checked firstly in mmc_bus_shutdown(). Signed-off-by: Yue Hu <huyue2@yulong.com> Link: https://lore.kernel.org/r/20210119051425.305-1-zbestahu@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: core: remove unused host parameter of mmc_sd_get_csd()Yue Hu
The host parameter is not used in the body of mmc_sd_get_csd(), so let's remove it. Update related code at the same time. Signed-off-by: Yue Hu <huyue2@yulong.com> Link: https://lore.kernel.org/r/20210118084520.241-1-zbestahu@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01MAINTAINERS: Add entry for the ASPEED SD/MMC driverAndrew Jeffery
Add myself as the maintainer. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210114031433.2388532-6-andrew@aj.id.au Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-aspeed: Add KUnit tests for phase calculationsAndrew Jeffery
Converting degrees of phase to logic delays is irritating to test on hardware, so lets exercise the function using KUnit. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210114031433.2388532-5-andrew@aj.id.au Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-aspeed: Add AST2600 bus clock supportAndrew Jeffery
The AST2600 can achieve HS200 speeds with a change to the bus clock divisor behaviour. The divisor can also be more accurate with respect to the requested clock rate, but keep the one-hot behaviour for backwards compatibility with the AST2400 and AST2500. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210114031433.2388532-4-andrew@aj.id.au Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-aspeed: Expose clock phase controlsAndrew Jeffery
The Aspeed SD/eMMC controllers expose configurable clock phase correction by inserting delays of up to 15 logic elements in length into the bus clock path. The hardware supports independent configuration for both bus directions on a per-slot basis. The timing delay per element encoded in the driver was experimentally determined by scope measurements. The phase controls for both slots are grouped together in a single register of the global register block of the SD/MMC controller(s), which drives the use of a locking scheme between the SDHCIs and the global register set. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210114031433.2388532-3-andrew@aj.id.au Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: core: Add helper for parsing clock phase propertiesAndrew Jeffery
Drivers for MMC hosts that accept phase corrections can take advantage of the helper by embedding an instance of struct mmc_clk_phase_map in their private data and invoking mmc_of_parse_clk_phase() to extract phase parameters. It is the responsibility of the host driver to translate and apply the extracted values to hardware as required. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210114031433.2388532-2-andrew@aj.id.au Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01dt-bindings: mmc: sdhci-am654: fix compatible for j7200Grygorii Strashko
On TI J7200 SoC the SDHCI controller compatible defined as "ti,j7200-sdhci-8bit", "ti,j721e-sdhci-8bit" or "ti,j7200-sdhci-4bit", "ti,j721e-sdhci-4bit" which causes dtbs_check warnings: mmc@4f80000: compatible: ['ti,j7200-sdhci-8bit', 'ti,j721e-sdhci-8bit'] is too long mmc@4f80000: compatible: Additional items are not allowed ('ti,j721e-sdhci-8bit' was unexpected) mmc@4fb0000: compatible:0: 'ti,j7200-sdhci-4bit' is not one of ['ti,am654-sdhci-5.1', 'ti,j721e-sdhci-8bit', 'ti,j721e-sdhci-4bit', 'ti,j7200-sdhci-8bit', 'ti,j721e-sdhci-4bit', 'ti,am64-sdhci-8bit', 'ti,am64-sdhci-4bit'] mmc@4fb0000: compatible: ['ti,j7200-sdhci-4bit', 'ti,j721e-sdhci-4bit'] is too long mmc@4fb0000: compatible: Additional items are not allowed ('ti,j721e-sdhci-4bit' was unexpected) Fix it by adding missing compatible strings and their combinations. Fixes: 407d0c2cdd12 ("dt-bindings: mmc: sdhci-am654: Convert sdhci-am654 controller documentation to json schema") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20210115193218.5809-1-grygorii.strashko@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: omap_hsmmc: Simplify bool comparison and conversionYang Li
Fix the following coccicheck warning: ./drivers/mmc/host/omap_hsmmc.c:297:6-25: WARNING: Comparison of 0/1 to bool variable According to the context, vqmmc_enabled is more suitable for bool type. Reported-by: Abaci Robot<abaci@linux.alibaba.com> Signed-off-by: Yang Li <abaci-bugfix@linux.alibaba.com> Link: https://lore.kernel.org/r/1610704281-11036-1-git-send-email-abaci-bugfix@linux.alibaba.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: core: convert comma to semicolonZheng Yongjun
Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Link: https://lore.kernel.org/r/20201216131737.14883-1-zhengyongjun3@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-pci-gli: Finetune HS400 RX delay for GL9763ERenius Chen
To improve the compatibility of GL9763E with HS400 eMMC cards, finetune the RX delay of HS400 mode. Signed-off-by: Renius Chen <reniuschengl@gmail.com> Link: https://lore.kernel.org/r/20210111082249.17092-1-reniuschengl@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-arasan: Use dev_err_probe() to avoid spamming logsMuhammad Husaini Zulkifli
Using dev_err_probe() can avoid spamming logs when probe is deferred. This function can also help to reduce code the size, uniform error handling and simplify the code. Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Link: https://lore.kernel.org/r/20210114152700.21916-5-muhammad.husaini.zulkifli@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-arasan: Add structure device pointer in probe functionMuhammad Husaini Zulkifli
Add struct device *dev in probe func() so that it can widely use in probe to make code more readable. Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Link: https://lore.kernel.org/r/20210114152700.21916-4-muhammad.husaini.zulkifli@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-arasan: Convert to use np instead of pdev->dev.of_nodeMuhammad Husaini Zulkifli
Use np pointer to simplify code and improve readability. Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Link: https://lore.kernel.org/r/20210114152700.21916-3-muhammad.husaini.zulkifli@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-arasan: use of_device_get_match_data()Muhammad Husaini Zulkifli
Use of_device_get_match_data() helper to get the match-data. Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Link: https://lore.kernel.org/r/20210114152700.21916-2-muhammad.husaini.zulkifli@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-pci-gli: Enlarge ASPM L1 entry delay of GL9763ERenius Chen
GL9763E enters ASPM L1 state after a very short idle in default, even during a burst of request. So the R/W performance of GL9763E is low with some platforms, which support ASPM mechanism, due to entering ASPM L1 state very frequently in R/W process. Set the L1 entry delay bits in vendor-specific register to 0x3FF to enlarge the idle period to 260us for improving the R/W performance of GL9763E. Signed-off-by: Renius Chen <reniuschengl@gmail.com> Link: https://lore.kernel.org/r/20210115054736.27769-1-reniuschengl@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: core: remove redundant card null check to mmc_can_sleep()Yue Hu
Note that only _mmc_suspend() will call mmc_can_sleep(). And card is checked before in mmc_can_poweroff_notify(). Signed-off-by: Yue Hu <huyue2@yulong.com> Link: https://lore.kernel.org/r/20210115034506.646-1-zbestahu@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: core: remove needless err = 0 in mmc_init_card()Yue Hu
Since they will always being in successful path to return 0 directly, no need to set err = 0. Signed-off-by: Yue Hu <huyue2@yulong.com> Link: https://lore.kernel.org/r/20210113113431.522-1-zbestahu@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci_am654: Add Support for TI's AM64 SoCFaiz Abbas
Add support for the controller present on the AM64x SoC. There are instances: sdhci0: 8bit bus width, max 400 MBps sdhci1: 4bit bus width, max 100 MBps Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Link: https://lore.kernel.org/r/20210113115908.3882-3-a-govindraju@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01dt-bindings: mmc: sdhci-am654: Add compatible string for AM64 SoCAswath Govindraju
Add compatible string for AM64 SoC in device tree binding of AM654 SDHCI module as the same IP is used. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210113115908.3882-2-a-govindraju@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: rtsx: add delay before power onRicky Wu
To make sure voltage is below 0.5V before power on during a power cycle, add a delay of at least 100ms. The delays in the mmc core is not sufficient for the rtsx pci device. Signed-off-by: Ricky Wu <ricky_wu@realtek.com> Link: https://lore.kernel.org/r/20210113105723.7916-1-ricky_wu@realtek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sunxi-mmc: Ensure host is suspended during system sleepSamuel Holland
If the device suspend process begins before the mmc host's autosuspend timeout, the host will continue running during system sleep. Avoid this by forcing runtime suspend during a global suspend transition. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20210113052421.36553-1-samuel@sholland.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: xenon: add AP807 compatible stringMarcin Wojtas
This patch adds new compatible string to differentiate between the controllers versions included in the AP807 north bridge. Thanks to this change, the SoCs which use AP807 will not run unintentionally in the 'slow mode' with disabled UHS modes. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Link: https://lore.kernel.org/r/20210112094655.12274-3-kostap@marvell.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01dt-bindings: mmc: xenon: add AP807 compatible stringMarcin Wojtas
This patch adds DT binding description for the Xenon SD/MMC controller included in AP807 north bridge. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Link: https://lore.kernel.org/r/20210112094655.12274-2-kostap@marvell.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-arasan: Change code style of mapping the syscon fieldMuhammad Husaini Zulkifli
Change code style of mapping the syscon in sdhci_arasan_update_support64b() for readability and consistency. Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20210111155001.12307-3-muhammad.husaini.zulkifli@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-arasan: Fixed kernel-doc format warningMuhammad Husaini Zulkifli
Commit 36c6aadaae86 ("mmc: sdhci-of-arasan: Add support for Intel Keem Bay") introduces syscon map sdhci_arasan_update_support64b(). Unfortunately, kernel-doc format script tool has not been run before and causing warning on the documentation style. Below is the output when running the kernel-doc script tool: drivers/mmc/host/sdhci-of-arasan.c:1388: warning: contents before sections Let's fix this by using standard conventions kernel-doc format. Fixes: 36c6aadaae86 ("mmc: sdhci-of-arasan: Add support for Intel Keem Bay") Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20210111155001.12307-2-muhammad.husaini.zulkifli@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01dt-bindings: mmc: sdhci-msm: Document the SDX55 compatibleManivannan Sadhasivam
The SDHCI controller on SDX55 is based on MSM SDHCI v5 IP. Hence, document the compatible with "qcom,sdhci-msm-v5" as the fallback. While at it, let's also sort the compatibles in ascending order. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-mmc@vger.kernel.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210107143118.2386-1-manivannan.sadhasivam@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-pci-gli: Add a switch to enable/disable CQHCI supportRenius Chen
Add a vendor-specific bit named GLI_9763E_MB_ERP_ON at the bit7 of register 888h to decide whether to enhance random R/W performance of GL9763E. CQHCI support will be enabled if and only if the bit is set and the GLI_9763E_MB_CMQ_OFF bit is not set. Signed-off-by: Renius Chen <reniuschengl@gmail.com> Link: https://lore.kernel.org/r/20210106085332.5494-1-reniuschengl@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: rtsx: Add MMC_CAP2_NO_SDIO flagRicky Wu
Added flag MMC_CAP2_NO_SDIO to mmc->caps2 Card Reader not support SDIO Signed-off-by: Ricky Wu <ricky_wu@realtek.com> Link: https://lore.kernel.org/r/20201230090401.12627-2-ricky_wu@realtek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01dt-bindings: mmc: renesas,sdhi: Add r8a779a0 supportWolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201227174202.40834-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: omap: remove unused struct component card_detect_irqH. Nikolaus Schaller
I have not found any user for this struct component. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Link: https://lore.kernel.org/r/b6f2168b863e4273c6bca5a22fbd4a3a8ddf68d6.1608714110.git.hns@goldelico.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: jz4740: remove unused struct component card_detect_irqH. Nikolaus Schaller
I have not found any user for this struct component. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/415ea1cb85eedc12f0c2f70da9a1ae3885bdd091.1608714110.git.hns@goldelico.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: renesas_sdhi: Add a condition of cmd/data timeout for retuneYoshihiro Shimoda
According to the datasheet, this controller needs retune when cmd or data timeout happens. So, add a condition into .check_retune(). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/1608708622-29668-3-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: tmio: Add data timeout error detectionMasaharu Hayakawa
Currently, busy timeout is not checked for data transfer command. But, if the temperature condition changes, the data cannot be acquired correctly and timeout may occur. Also, we could reproduce an issue by using mmc_test driver (e.g. "Correct xfer_size at write (start failure)"). Therefore, this adds timeout error check. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> [saito: rework commit message.] Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [shimoda: rebase, add commit description] Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/1608708622-29668-2-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: meson-gx: check for scatterlist size alignment in block modeDmitry Lebed
Enable SGDMA support for SD_IO_RW_EXTENDED and add proper check for scatterlist size alignment in block mode. According to documentation, in SDIO block mode meson-gx DMA could only handle buffers with sizes that are multiples of SDIO block size. Some SDIO drivers like brcmfmac use scatterlist API, but do not enforce proper scatterlist buffer size alignemnt, this looks like a root cause of non-working CMD53. Some minor style fixes. Signed-off-by: Dmitry Lebed <lebed.dmitry@gmail.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20201218075312.67338-1-lebed.dmitry@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: mediatek: fix race condition between msdc_request_timeout and irqChaotian Jing
when get request SW timeout, if CMD/DAT xfer done irq coming right now, then there is race between the msdc_request_timeout work and irq handler, and the host->cmd and host->data may set to NULL in irq handler. also, current flow ensure that only one path can go to msdc_request_done(), so no need check the return value of cancel_delayed_work(). Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Link: https://lore.kernel.org/r/20201218071611.12276-1-chaotian.jing@mediatek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: renesas_internal_dmac: add pre_req and post_req supportYoshihiro Shimoda
Add pre_req and post_req support to improve performance. Inspired by a patch in the BSP by Masaharu Hayakawa. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/1608114572-1892-3-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: renesas_sdhi_internal_dmac: Fix DMA buffer alignment from 8 to 128-bytesTakeshi Saito
According to the latest datasheet, the internal DMAC buffer alignment R-Car Gen3 SDHI HW should be 128-bytes. So, fix it. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [shimoda: revise commit description, rebase] Fixes: 2a68ea7896e3 ("mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/1608114572-1892-2-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-msm: Actually set the actual clockDouglas Anderson
The MSM SDHCI driver always set the "actual_clock" field to 0. It had a comment about it not being needed because we weren't using the standard SDHCI divider mechanism and we'd just fallback to "host->clock". However, it's still better to provide the actual clock. Why? 1. It will make timeout calculations slightly better. On one system I have, the eMMC requets 200 MHz (for HS400-ES) but actually gets 192 MHz. These are close, but why not get the more accurate one. 2. If things are seriously off in the clock driver and it's missing rates or picking the wrong rate (maybe it's rounding up instead of down), this will make it much more obvious what's going on. NOTE: we have to be a little careful here because the "actual_clock" field shouldn't include the multiplier that sdhci-msm needs internally. Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Link: https://lore.kernel.org/r/20201214092048.v5.2.I7564620993acd4baa63fa0e3925ca879a86d3ee3@changeid Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-msm: Warn about overclocking SD/MMCDouglas Anderson
As talked about in commit 5e4b7e82d497 ("clk: qcom: gcc-sdm845: Use floor ops for sdcc clks"), most clocks handled by the Qualcomm clock drivers are rounded _up_ by default instead of down. We should make sure SD/MMC clocks are always rounded down in the clock drivers. Let's add a warning in the Qualcomm SDHCI driver to help catch the problem. This would have saved a bunch of time [1]. NOTE: this doesn't actually fix any problems, it just makes it obvious to devs that there is a problem and that should be an indication to fix the clock driver. [1] http://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid Suggested-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20201214092048.v5.1.Iec3430c7d3c2a29262695edef7b82a14aaa567e5@changeid Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sunxi: add support for A100 mmc controllerYangtao Li
This patch adds support for A100 MMC controller, which use word address for internal dma. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20201211011934.6171-10-andre.przywara@arm.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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