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2024-11-04arm64: dts: imx8ulp-evk: Add bt-sco sound card supportShengjiu Wang
Add bt-sco sound card, which is used by BT HFP case. It supports wb profile as default Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8ulp: Add audio device nodesShengjiu Wang
Add edma1, sai4, sai5 device nodes bus of in per_bridge3. Add edma2, sai6, sai7, spdif device nodes in bus of per_bridge5. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm-mek: enable dsp node for rproc usageLaurentiu Mihalcea
Set the status of the dsp node to "okay" and assign and add its reserved memory regions. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm: add node for VPU dspLaurentiu Mihalcea
Add DT node for i.MX8QM's DSP, which is found in the VPU subsystem. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm: drop dsp node from audio_subsys busLaurentiu Mihalcea
On i.MX8QM, the DSP is in the VPU subsystem, which means that using the 'dsp' node from 'imx8-ss-audio.dtsi' is wrong as it's placed under the wrong bus. As such, drop it. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qxp-mek: add dsp rproc-related mem regionsLaurentiu Mihalcea
Add missing dsp rproc-related reserved memory regions and assign them to the 'dsp' node. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8-ss-audio: configure dsp node for rproc usageLaurentiu Mihalcea
The 'dsp' node is currently configured for running an audio firmware. Since the firmware requires that some audio-related IPs be disabled in Linux, this will clash with the configurations from the imx8 board DTs (i.e: imx8qm-mek, imx8qxp-mek, etc...), thus making the dsp unusable (since the firmware won't function properly). To avoid this issue, configure the 'dsp' node for rproc. This way, users will be able to use the dsp alongside the board-level audio configuration as long as the firmware doesn't need the audio IPs. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04ARM: dts: imx: Add devicetree for Kobo Clara 2EAndreas Kemnade
Adds a devicetree for the Kobo Clara 2E Ebook reader. It is based on boards marked with "37NB-E60K2M+4A2" or "37NB-E60K2M+4B0". It is equipped with an i.MX6SLL SoC. Expected to work: - Buttons - Wifi - Bluetooth (if Wifi is initialized first, driver does not handle regulators yet) - LED - uSD - USB - RTC - Touchscreen Add human-readable comments for devices without mainlined driver and binding. Such comments can e.g. be help to find testers if someone starts to work on the missing drivers. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04dt-bindings: arm: fsl: add compatible strings for Kobo Clara 2EAndreas Kemnade
Adds compatible strings for the Kobo Clara 2E eBook reader. There are two variants differing in the EPD PMIC used. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-03arm64: dts: renesas: rzg3s-smarc-som: Enable RTCClaudiu Beznea
Enable RTC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-9-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: rzg3s-smarc-som: Enable VBATTBClaudiu Beznea
Enable the VBATTB controller. It provides the clock for RTC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-8-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: r9a08g045: Add RTC nodeClaudiu Beznea
Add the DT node for the RTC IP available on the Renesas RZ/G3S SoC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-7-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: r9a08g045: Add VBATTB nodeClaudiu Beznea
Add the DT node for the VBATTB IP along with DT bindings for the clock it provides. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03Merge tag 'renesas-r9a08g045-dt-binding-defs-tag3' into renesas-dts-for-v6.13Geert Uytterhoeven
Renesas RZ/G3S DT Binding Definitions VBATTB clock definitions for the Renesas RZ/G3S (R9A08G045) SoC, shared by driver and DT source files.
2024-11-03arm64: dts: renesas: white-hawk-cpu-common: Add pin control for DSI-eDP IRQGeert Uytterhoeven
When the DSI to eDP bridge was added, pin control for the IRQ pin was left out, because the pin controller did not support INTC-EX pins yet. Commit 10544ec1b3436037 ("pinctrl: renesas: r8a779g0: Add INTC-EX pins, groups, and function") added support for these pins, so add the missing pin control description. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/89bab2008891be1f003a3c0dbcdf36af3b98da70.1729240573.git.geert+renesas@glider.be
2024-11-03ARM: dts: renesas: r7s72100: Add DMA support to MMCIFWolfram Sang
Add DMA properties to the device node for the MMC Host Interface. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241015224801.2535-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03ARM: dts: renesas: r7s72100: Add DMAC nodeWolfram Sang
Add a device node for the Direct Memory Access Controller on the RZ/A1H SoC. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241015224801.2535-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: hihope: Drop #sound-dai-cellsLad Prabhakar
"#sound-dai-cells" is required if the board is using "simple-card". However, the HiHope board uses "audio-graph", thus remove the unneeded `#sound-dai-cells`. Commit 9e72606cd2db ("arm64: dts: renesas: #sound-dai-cells is used when simple-card") updated the comment regarding usage of "#sound-dai-cells" in the SoC DTSI but missed to remove "#sound-dai-cells" from board DTS files. Fixes: 9e72606cd2db ("arm64: dts: renesas: #sound-dai-cells is used when simple-card") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/20241010135332.710648-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTBClaudiu Beznea
The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC, the tamper detector and a small general usage memory of 128B. The VBATTB controller controls the clock for the RTC on the Renesas RZ/G3S. The HW block diagram for the clock logic is as follows: +----------+ XC `\ RTXIN --->| |----->| \ +----+ VBATTCLK | 32K clock| | |----->|gate|-----------> | osc | XBYP | | +----+ RTXOUT --->| |----->| / +----------+ ,/ One could connect as input to this HW block either a crystal or an external clock device. This is board specific. After discussions w/ Stephen Boyd the clock tree associated with this hardware block was exported in Linux as: input-xtal xbyp xc mux vbattclk where: - input-xtal is the input clock (connected to RTXIN, RTXOUT pins) - xc, xbyp are mux inputs - mux is the internal mux - vbattclk is the gate clock that feeds in the end the RTC to allow selecting the input of the MUX though assigned-clock DT properties, using the already existing clock drivers and avoid adding other DT properties. This allows select the input of the mux based on the type of the connected input clock: - if the 32768 crystal is connected as input for the VBATTB, the input of the mux should be xc - if an external clock device is connected as input for the VBATTB the input of the mux should be xbyp Add bindings for the VBATTB controller. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: ti: k3-am62p5-sk: add 1.4ghz opp entryBryan Brattlof
The AM62Px reference board is capable of supplying 0v85 to the VDD_CORE which allows the Cortex-A53s to operate at 1.4GHz according to chapter 6.6 of the SoC's data sheet[0] . Append the 1.4Ghz entry to the OPP table to enable this frequency [0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-5-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62p: add opp frequenciesBryan Brattlof
One power management technique available to the Cortex-A53s is their ability to dynamically scale their frequency across the device's Operating Performance Points (OPP) The OPPs available for the Cortex-A53s on the AM62Px can vary based on the silicon variant used. The SoC variant is encoded into the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register which is used to limit the OPP entries the SoC supports. A table of all these variants can be found in its data sheet[0] for the AM62Px processor family. Add the OPP table into the SoC's fdti file along with the syscon node to describe the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register to detect the SoC variant. [0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-4-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62a7-sk: add 1.4ghz opp entryBryan Brattlof
The AM62Ax reference board is capable of supplying 0v85 to the VDD_CORE which allows the Cortex-A53s to operate at 1.4GHz according to chapter 7.5 of the SoC's data sheet[0]. Append the 1.4Ghz entry to the OPP table to enable this OPP [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-3-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62a: add opp frequenciesBryan Brattlof
One power management technique available to the Cortex-A53s is their ability to dynamically scale their frequency across the device's Operating Performance Points (OPP) The OPPs available for the Cortex-A53s on the AM62Ax can vary based on the silicon variant used. The SoC variant is encoded into the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register which is used to limit to only OPP entries the variant supports. A table of all these variants can be found in it's data sheet[0] for the AM62Ax family. Add the OPP table into the SoC's fdti file along with the syscon node to describe the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register to detect the SoC variant. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-2-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62-verdin: Add Ivy carrier boardJoão Paulo Gonçalves
Add Toradex Verdin Ivy carrier board support. One notable feature of Ivy is the analog inputs. These inputs are multiplexed, allowing the same input to measure either voltage or current. For current measurements, a GPIO switch enables or disables the shunt resistor. This process is automatically managed by the Linux kernel using the IIO and MUX subsystems. Voltage measurement is always enabled, but the voltage measured by the ADC is scaled by a cascade voltage divider. In the device tree, the equivalent gain of the voltage divider is used, which can be calculated as follows: ------------ + | .-. R1=30K | | | | '-' |------------------- Analog Input (AIN) | | .-. .-. R2=10K | | R3=30K | | | | | | '-' '-' | | | |-------- | .-. + | R4=10K | | | | | ADC Input (Channels 0 and 1) | '-' - | | - -----------| |-------- === === GND GND Vin = Analog Input (AIN) Vout = ADC Input Rth = Thevenin Equiv. Resistance Vth = Thevenin Equiv. Voltage RL = Load Resistor R1 = 30K, R2 = 10K, R3 = 30K, R4 = 10K RL = R4 = 10K Rth = (R1 // R2) + R3 = 37500 Ohms Vth = (Vin * R2) / (R1 + R2) = Vin/4; Vout = (Vth * RL)/ (Rth + RL) = Vth/4.75 = Vin/19 Gain = Vout/Vin = 1/19 https://www.toradex.com/products/carrier-board/ivy-carrier-board Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240924120044.130913-4-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62-verdin: add label to som adc nodeJoão Paulo Gonçalves
Add a label to ti-ads1015 node to make it easier to reference it from other nodes. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240924120044.130913-3-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03dt-bindings: arm: ti: Add verdin am62 ivy boardJoão Paulo Gonçalves
Add Toradex Verdin Ivy carrier board support. https://www.toradex.com/products/carrier-board/ivy-carrier-board Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240924120044.130913-2-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-02riscv: dts: sophgo: Add emmc support for Huashan PiInochi Amaoto
Add emmc node configuration for Huashan Pi. Link: https://lore.kernel.org/r/20241025112902.1200716-3-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-02riscv: dts: sophgo: Add sdio configuration for Huashan PiInochi Amaoto
Add configuration for sdio for Huashan Pi to support sdio wifi. Link: https://lore.kernel.org/r/20241025112902.1200716-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-02riscv: dts: sophgo: fix pinctrl base-addressThomas Bonnefille
Fix the base-address of the pinctrl controller to match its register address. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Fixes: 93b61555f509 ("riscv: dts: sophgo: Add initial SG2002 SoC device tree") Link: https://lore.kernel.org/r/20241028-fix-address-v1-1-dcbe21e59ccf@bootlin.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-02ARM: dts: imx6sll: Improve gpc descriptionFabio Estevam
According to fsl,imx-gpc.yaml, 'clocks', 'clock-names', and 'pgc' are required properties. Describe them to fix the following dt-schema warnings: interrupt-controller@20dc000: 'clocks' is a required property interrupt-controller@20dc000: 'clock-names' is a required property interrupt-controller@20dc000: 'pgc' is a required property Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-02dt-bindings: power: fsl,imx-gpc: Document fsl,imx6sll-gpcFabio Estevam
Document the existing fsl,imx6sll-gpc compatible used with fsl,imx6q-gpc fallback. This fixes the following dt-schema warning: ['fsl,imx6sll-gpc', 'fsl,imx6q-gpc'] is too long Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-02ARM: dts: imx6sl: Pass tempmon #thermal-sensor-cellsFabio Estevam
According to fsl,imx-anatop.yaml, #thermal-sensor-cells is a required property. Add it to fix the following dt-schema warning: tempmon: '#thermal-sensor-cells' is a required property Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-02ARM: dts: imx6sx: Fix tempmon descriptionFabio Estevam
According to imx-thermal.yaml, the valid compatible string for i.MX6SX is just: compatible = "fsl,imx6sx-tempmon". Also pass #thermal-sensor-cells = <0> as it is a required property. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-02ARM: dts: imx6sll: Remove regulator-3p0 unit addressFabio Estevam
According to imx-thermal.yaml, the anatop regulators should not contain unit-address/reg entries. Change it accordingly. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-02dt-bindings: soc: imx: fsl,imx-anatop: Add additional regulatorsFabio Estevam
i.MX7 has the following anatop regulators: vdd1p0d and vdd1p2. i.MX6SX has the following anatop regulators: vddpcie. Add them to the allowed patternProperties. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-02dt-bindings: soc: imx: fsl,imx-anatop: Fix the i.MX7 irq numberFabio Estevam
Unlike the other i.MX devices, i.MX7 has only two anatop interrupts. Add logic that contemplates such case to fix the following dt-schema warning: anatop@30360000: interrupts: [[0, 49, 4], [0, 51, 4]] is too short Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-02ARM: dts: imx6sll: Fix the last SPDIF clock nameFabio Estevam
The last SPDIF clock is IMX6SLL_CLK_SPBA, so change the last clock-name entry to 'spba' as expected by fsl,spdif.yaml. This fixes the following dt-schema warning: spdif@2004000: clock-names:9: 'spba' was expected Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Add cma heap for ↵Bryan O'Donoghue
libcamera softisp support libcamera softisp requires a linux,cma heap export in order to support user-space debayering, 3a and export to other system components such as pipewire, Firefox/Chromium - Hangouts, Zoom etc. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-6-cdff2f1a5792@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-11-01arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Add cma heap for libcamera ↵Bryan O'Donoghue
softisp support libcamera softisp requires a linux,cma heap export in order to support user-space debayering, 3a and export to other system components such as pipewire, Firefox/Chromium - Hangouts, Zoom etc. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-5-cdff2f1a5792@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-11-01arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Drop redundant clock-lanes ↵Bryan O'Donoghue
from camera@1a Remove redundant clock-lanes property. The sensor doesn't require clock-lanes at all. Remove now. Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # rb5 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-4-cdff2f1a5792@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-11-01arm64: dts: qcom: sc8280xp-x13s: Drop redundant clock-lanes from camera@10Bryan O'Donoghue
clock-lanes does nothing here - the sensor doesn't care about this property, remove it. Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x13s Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-3-cdff2f1a5792@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-11-01arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Convert mezzanine ↵Bryan O'Donoghue
riser to dtso Convert the navigation / camera mezzanine from its own dts to a dtso. A small amount of additional includes / address / cell size change needs to be applied to convert. Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # rb3 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241025-b4-linux-next-24-10-25-camss-dts-fixups-v1-2-cdff2f1a5792@linaro.org [bjorn: Corrected up makefile syntax, added missing cells for cci_i2c1] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-11-01ARM: dts: imx7ulp: Remove incorrect mmc fallback compatibleFabio Estevam
Per fsl-imx-esdhc.yaml, the correct compatible string for i.MX7ULP is: compatible = "fsl,imx7ulp-usdhc" Remove the undocumented "fsl,imx6sx-usdhc" fallback compatible. This fixes the following dt-schema warnings: mmc@2198000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6sl-usdhc', 'fsl,imx6q-usdhc'] is too long ['fsl,imx6sl-usdhc', 'fsl,imx6q-usdhc'] is too short 'fsl,imx50-esdhc' was expected ... Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01ARM: dts: imx6sl: Remove incorrect mmc fallback compatibleFabio Estevam
Per fsl-imx-esdhc.yaml, the correct compatible string for i.MX6SL is: compatible = "fsl,imx6sl-usdhc" Remove the undocumented "fsl,imx6q-usdhc" fallback compatible. This fixes the following dt-schema warnings: mmc@2190000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6sl-usdhc', 'fsl,imx6q-usdhc'] is too long ['fsl,imx6sl-usdhc', 'fsl,imx6q-usdhc'] is too short 'fsl,imx50-esdhc' was expected ... Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01ARM: dts: imx6sx: Remove incorrect mmc fallback compatibleFabio Estevam
Per fsl-imx-esdhc.yaml, the correct compatible string for i.MX6SX is: compatible = "fsl,imx6sx-usdhc" Remove the undocumented "fsl,imx6sl-usdhc" fallback compatible. This fixes the following dt-schema warnings: mmc@2198000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6sl-usdhc', 'fsl,imx6q-usdhc'] is too long ['fsl,imx6sl-usdhc', 'fsl,imx6q-usdhc'] is too short 'fsl,imx50-esdhc' was expected ... Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01ARM: dts: imx6sl/sll: Add the "fsl,imx6dl-gpt" fallbackFabio Estevam
Per fsl,imxgpt.yaml, the i.MX6SL GPT compatible should be described as: compatible = "fsl,imx6sl-gpt", "fsl,imx6dl-gpt"; Do as suggested to fix the following dt-schema warnings: timer@2098000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx6sl-gpt'] is too short 'fsl,imx1-gpt' was expected 'fsl,imx21-gpt' was expected 'fsl,imx27-gpt' was expected 'fsl,imx31-gpt' was expected 'fsl,imx6sl-gpt' is not one of ['fsl,imx25-gpt', 'fsl,imx50-gpt', 'fsl,imx51-gpt', 'fsl,imx53-gpt', 'fsl,imx6q-gpt'] 'fsl,imx6dl-gpt' was expected 'fsl,imx6sl-gpt' is not one of ['fsl,imx6ul-gpt', 'fsl,imx7d-gpt'] Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01dt-bindings: arm: fsl: Add Boundary Device Nitrogen8MP Universal SMARC ↵Bhavin Sharma
Carrier Board Adds support for the Nitrogen8MP SMARC System on Module and the Nitrogen8MP Universal SMARC Carrier Board. Signed-off-by: Bhavin Sharma <bhavin.sharma@siliconsignals.io> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01dt-bindings: arm: fsl: Add Gateworks GW82XX-2x dev kitTim Harvey
Adds support for the Gateworks GW82XX-2X development kit based on a GW82XX baseboard and a GW702X System On Module. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01dt-bindings: dsp: fsl,dsp: fix power domain countLaurentiu Mihalcea
Per the current binding, QM/QXP DSPs are supposed to have 4 power domains, while the rest just 1. For QM/QXP, the 4 power domains are: DSP, DSP_RAM, MU13A, MU13B. First off, drop MU13A from the count as its already attached to lsio_mu13. This decreases the count to 3. Secondly, drop DSP and DSP_RAM from the count for QXP. These are already attached to the DSP's LPCGs. Thirdly, a new power domain is required for DSP-SCU communication (MU2A). With this in mind, the number of required power domains for QXP is 2 (MU2A, MU13B), while for QM it's 4 (MU13B, DSP, DSP_RAM, MU2A). Update the fsl,dsp binding to reflect all of this information. Since the arm,mhuv2 binding has an example node using the fsl,imx8qxp-dsp compatible, remove two of the extra PDs to align with the required power domain count. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01ARM: dts: imx6ul: Drop duplicate space in iomux node groupsMarek Vasut
Drop space between node name and opening brace {. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-30 05:08:59 +0000