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2024-10-28arm64: dts: ti: k3-am642-evm: Add overlay for PCIe0 EP modeSiddharth Vadapalli
Add overlay to enable the PCIe0 instance of PCIe on AM642-EVM in Endpoint mode of operation. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20240930103413.3085689-1-s-vadapalli@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j7200-evm: Add overlay for PCIE1 Endpoint ModeSiddharth Vadapalli
Add overlay to enable the PCIE1 instance of PCIe on J7200-EVM in Endpoint mode of operation. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20241001093426.3401765-1-s-vadapalli@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-am62-main: Update otap/itap valuesJudith Mendez
Update itap/itap values according to device datasheet [0]. Now that we have fixed timing issues for am62x [1], lets change the otap/itap values back according to the device datasheet. [0] https://www.ti.com/lit/ds/symlink/am625.pdf [1] https://lore.kernel.org/linux-mmc/20240913185403.1339115-1-jm@ti.com/ Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240924195335.546900-1-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-am625-beagleplay: Enable MikroBUS PWMAyush Singh
Add pinmux for PWM functionality of MikroBUS PWM pin and enable the pwm controller. Signed-off-by: Ayush Singh <ayush@beagleboard.org> Link: https://lore.kernel.org/r/20241016-beagleplay-pwm-v1-1-245ae88859bc@beagleboard.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-am62-verdin: Fix SD regulator startup delayFrancesco Dolcini
The power switch used to power the SD card interface might have more than 2ms turn-on time, increase the startup delay to 20ms to prevent failures. Fixes: 316b80246b16 ("arm64: dts: ti: add verdin am62") Cc: stable@vger.kernel.org Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20241024130628.49650-1-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-am62-verdin: Fix SoM ADC compatibleJoão Paulo Gonçalves
Fix Verdin AM62 on-SOM ADC compatible. Currently the hardware is not correctly described in the DT, use the correct TI TLA2024 compatible that matches what is assembled on the board. The "ti,tla2024" compatible was introduced in Linux v5.19 and Verdin AM62 support was introduced in Linux v6.5. The new DTB will not work on kernel older than v5.19, but this seems unlikely to happen. U-Boot does not use the ADC node and a known Android 14 out-of-tree port uses a Linux Kernel 6.1. With that said, despite this being a breaking change, it seems fair to to not expect any regression because of it. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Link: https://lore.kernel.org/r/20241015113334.246110-1-jpaulo.silvagoncalves@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-am625-verdin: add TPM deviceFrancesco Dolcini
Add on-SOM TPM device to the device tree file. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20241018170436.80010-1-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j721s2: Fix clock IDs for MCSPI instancesAnurag Dutta
The clock IDs for multiple MCSPI instances across wakeup domain in J721s2 are incorrect when compared with documentation [1]. Fix the clock IDs to their appropriate values. [1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html Fixes: 04d7cb647b85 ("arm64: dts: ti: k3-j721s2: Add MCSPI nodes") Signed-off-by: Anurag Dutta <a-dutta@ti.com> Link: https://lore.kernel.org/r/20241023104532.3438851-4-a-dutta@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j721e: Fix clock IDs for MCSPI instancesAnurag Dutta
The clock IDs for multiple MCSPI instances across wakeup domain in J721e are incorrect when compared with documentation [1]. Fix the clock ids to their appropriate values. [1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html Fixes: 76aa309f9fa7 ("arm64: dts: ti: k3-j721e: Add MCSPI nodes") Signed-off-by: Anurag Dutta <a-dutta@ti.com> Link: https://lore.kernel.org/r/20241023104532.3438851-3-a-dutta@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instancesAnurag Dutta
The clock IDs for multiple MCSPI instances across wakeup as well as main domain in J7200 are incorrect when compared with documentation [1]. This results in kernel crashes when the said instances are enabled. Fix the clock ids to their appropriate values. [1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html Fixes: 8f6c475f4ca7 ("arm64: dts: ti: k3-j7200: Add MCSPI nodes") Signed-off-by: Anurag Dutta <a-dutta@ti.com> Reviewed-by: Aniket Limaye <a-limaye@ti.com> Link: https://lore.kernel.org/r/20241023104532.3438851-2-a-dutta@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j7200: Fix register map for main domain pmxJared McArthur
Commit 0d0a0b441346 ("arm64: dts: ti: k3-j7200: fix main pinmux range") split the main_pmx0 into two nodes: main_pmx0 and main_pmx1 due to a non-addressable region, but incorrectly represented the ranges. As a result, the memory map for the pinctrl is incorrect. Fix this by introducing the correct ranges. The ranges are taken from the J7200 TRM [1] (Table 5-695. CTRL_MMR0 Registers). Padconfig starting addresses and ranges: - 0 to 66: 0x11c000, 0x10c - 68: 0x11c110, 0x004 - 71 to 73: 0x11c11c, 0x00c - 89 to 90: 0x11c164, 0x008 The datasheet [2] doesn't contain PADCONFIG63 (Table 6-106. Pin Multiplexing), but the pin is necessary for enabling the MMC1 CLKLP pad loopback and should be included in the pinmux register map. Due to the change in pinmux node addresses, change the pinmux node for the USB0_DRVVBUS pin to main_pmx2. The offset has not changed since the new main_pmx2 node has the same base address and range as the original main_pmx1 node. All other pinmuxing done within J7200 dts or dtso files only uses main_pmx0 which has not changed. [1] https://www.ti.com/lit/pdf/spruiu1 [2] https://www.ti.com/lit/gpn/dra821u Fixes: 0d0a0b441346 ("arm64: dts: ti: k3-j7200: fix main pinmux range") Signed-off-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Jared McArthur <j-mcarthur@ti.com> Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20240926102533.398139-1-a-limaye@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j7200-evm*: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to: - pmic regulator for enabling AVS Support - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces - mmc0, mmc1, usb0, ospi0, hbmc for enabling various bootmodes. Reviewed-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-12-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j721e-sk*: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to: - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces - mmc1, usb0, usb1, ospi0 for enabling various bootmodes. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-11-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j721e-evm*: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to: - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces - mmc0, mmc1, usb0, ospi0, ospi1, hbmc for enabling various bootmodes. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-10-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-am68-sk*: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to: - main_uart8, mcu_uart0(DM), wkup_uart0(TIFS) for Traces - mmc1, ospi0 for enabling various bootmodes. - eeprom for board detection Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-9-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j721s2-evm*: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to: - pmic regulator for enabling AVS Support - main_uart8, mcu_uart0(DM), wkup_uart0(TIFS) for Traces - mmc0, mmc1, usb0, ospi0, ospi1 for enabling various bootmodes. Reviewed-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-8-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j784s4-j742s2-evm-common: Remove parent nodes bootph-*Manorit Chawdhry
Adding bootph properties on leaf nodes imply that they are applicable to the parent nodes as well. Bootloaders can derive the parent nodes when bootph is available in the leaf nodes. Remove the bootph-* properties from parent nodes as they are redundant. Reviewed-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-7-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j7200: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to - System controller nodes that allow controlling power domain, clocks, etc. - secure_proxy_sa3/secure_proxy_main mboxes for communication with System Controller - mcu_ringacc/mcu_udmap for DMA to SMS - chipid for detection soc information. - mcu_timer0 for bootloader tick-timer. - hbmc_mux for enabling Hyperflash support - ESM nodes for enabling ESM support. - wkup_vtm for enabling Adaptive voltage scaling(AVS) support Reviewed-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-6-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j721e: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to - System controller nodes that allow controlling power domain, clocks, etc. - secure_proxy_sa3/secure_proxy_main mboxes for communication with System Controller - mcu_ringacc/mcu_udmap for DMA to SMS - chipid for detection soc information. - mcu_timer0 for bootloader tick-timer. - hbmc_mux for enabling Hyperflash support - ESM nodes for enabling ESM support. - wkup_vtm for enabling Adaptive voltage scaling(AVS) support Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-5-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j721s2: Add bootph-* propertiesManorit Chawdhry
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to - System controller nodes that allow controlling power domain, clocks, etc. - secure_proxy_sa3/secure_proxy_main mboxes for communication with System Controller - mcu_ringacc/mcu_udmap for DMA to SMS - chipid for detection soc information. - mcu_timer0 for bootloader tick-timer. - wkup_vtm for enabling Adaptive voltage scaling(AVS) support Reviewed-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-4-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j784s4: Add bootph-* propertiesManorit Chawdhry
The following nodes are being used in the bootloaders. Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to - secure_proxy_sa3/secure_proxy_main mboxes for communication with System Controller - wkup_vtm for enabling Adaptive voltage scaling(AVS) support Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-3-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-*Manorit Chawdhry
Adding bootph properties on leaf nodes imply that they are applicable to the parent nodes as well. Bootloaders can derive the parent nodes when bootph is available in the leaf nodes. Remove the bootph-* properties from parent nodes as they are redundant. Reviewed-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-2-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Move bootph from mcu_timer1 to ↵Manorit Chawdhry
mcu_timer0 Bootloader are using mcu_timer0 instead of mcu_timer1. Adds bootph to mcu_timer0 instead of mcu_timer1. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-1-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-27dt-bindings: arm: samsung: Document Exynos9810 and starlte board bindingMarkuss Broks
Add the compatibles for Exynos9810 SoC and samsung,starlte board to the list of boards. Samsung Galaxy S9 (SM-G960F, codenamed starlte) is a mobile phone, released in 2018. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241026-exynos9810-v3-6-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-27dt-bindings: soc: samsung: exynos-pmu: Add exynos9810 compatibleMarkuss Broks
Add compatible for Samsung Exynos9810 PMU to the schema. Like on other devices, it contains various registers related to power management and other vital to SoC functions. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241026-exynos9810-v3-5-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-27dt-bindings: arm: cpus: Add Samsung Mongoose M3Markuss Broks
Add the compatible for Samsung Mongoose M3 CPU core to the schema. Mongoose M3 (codenamed Meerkat) is the big core in Exynos9810 SoC, designed by Samsung. It implements ARMv8.2-A ISA. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241026-exynos9810-v3-1-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-26arm64: dts: exynos8895: Add spi_0/1 nodesIvaylo Ivanov
Add nodes for spi_0 (SPI_CAM0) and spi_1 (SPI_CAM1), which allows using them. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20241023091734.538682-6-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-26arm64: dts: exynos8895: Add Multi Core Timer (MCT) nodeIvaylo Ivanov
MCT has one global timer and 8 CPU local timers. The global timer can generate 4 interrupts, and each local timer can generate an interrupt making 12 interrupts in total. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20241023091734.538682-4-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-26arm64: dts: exynos8895: Add clock management unit nodesIvaylo Ivanov
Add clock management unit nodes for: - cmu_top, which provides muxes, divs and gates for other CMUs - cmu_peris, which provides clocks for GIC and MCT - cmu_fsys0, which provides clocks for USBDRD30 - cmu_fsys1, which provides clocks for MMC, UFS and PCIE - cmu_peric0, which provides clocks for UART_DBG, USI00 ~ USI03 - cmu_peric1, which provides clocks for SPI_CAM0/1, UART_BT, USI04 ~ USI13 Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20241023091734.538682-3-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-26dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatibleIvaylo Ivanov
Just like most Samsung Exynos SoCs, Exynos8895 uses almost the same Multi-Core Timer block with no functional differences. Add dedicated samsung,exynos8895-mct compatible to the dt-schema for representing the MCT timer of Exynos8895 SoC. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241023091734.538682-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-26Merge branch 'for-v6.13/clk-dt-bindings' into next/dt64Krzysztof Kozlowski
2024-10-26dt-bindings: clock: samsung: Add Exynos8895 SoCIvaylo Ivanov
Provide dt-schema documentation for Samsung Exynos8895 SoC clock controller CMU blocks: - CMU_FSYS0/1 - CMU_PERIC0/1 - CMU_PERIS - CMU_TOP Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20241023090136.537395-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-25arm64: dts: mt8183: Damu: add i2c2's i2c-scl-internal-delay-nsDaolong Zhu
Add i2c2's i2c-scl-internal-delay-ns. Fixes: cabc71b08eb5 ("arm64: dts: mt8183: Add kukui-jacuzzi-damu board") Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com> Signed-off-by: Hsin-Te Yuan <yuanhsinte@chromium.org> Link: https://lore.kernel.org/r/20241025-i2c-delay-v2-4-9be1bcaf35e0@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-10-25arm64: dts: mt8183: cozmo: add i2c2's i2c-scl-internal-delay-nsDaolong Zhu
Add i2c2's i2c-scl-internal-delay-ns. Fixes: 52e84f233459 ("arm64: dts: mt8183: Add kukui-jacuzzi-cozmo board") Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com> Signed-off-by: Hsin-Te Yuan <yuanhsinte@chromium.org> Link: https://lore.kernel.org/r/20241025-i2c-delay-v2-3-9be1bcaf35e0@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-10-25arm64: dts: mt8183: burnet: add i2c2's i2c-scl-internal-delay-nsDaolong Zhu
Add i2c2's i2c-scl-internal-delay-ns. Fixes: dd6e3b06214f ("arm64: dts: mt8183: Add kukui-jacuzzi-burnet board") Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com> Signed-off-by: Hsin-Te Yuan <yuanhsinte@chromium.org> Link: https://lore.kernel.org/r/20241025-i2c-delay-v2-2-9be1bcaf35e0@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-10-25arm64: dts: mt8183: fennel: add i2c2's i2c-scl-internal-delay-nsDaolong Zhu
Add i2c2's i2c-scl-internal-delay-ns. Fixes: 6cd7fdc8c530 ("arm64: dts: mt8183: Add kukui-jacuzzi-fennel board") Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com> Signed-off-by: Hsin-Te Yuan <yuanhsinte@chromium.org> Reviewed-by: Link: https://lore.kernel.org/r/20241025-i2c-delay-v2-1-9be1bcaf35e0@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-10-25dt-bindings: clock: r9a08g045-cpg: Add power domain ID for RTCClaudiu Beznea
The RTC and VBATTB don't share the MSTOP control bit (but only the bus clock and the reset signal). As the MSTOP control is modeled though power domains add power domain ID for the RTC device available on the Renesas RZ/G3S SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241019084738.3370489-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-10-25arm64: dts: renesas: r9a09g057: Add OPP tableLad Prabhakar
Add OPP table for RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241008164935.335043-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-10-25arm64: dts: rockchip: Add rk3588-orangepi-5b device treeCenk Uluisik
Implements a slightly modified rk3588s-orangepi-5b.dts from the vendor. Unfortunately the &wireless_bluetooth and &wireless_wlan are not implemented yet. Therefore add the sdhci alias to be mmc0 on the rk3588s-orangepi-5b.dts. How is the Orange Pi 5B unique? - the Orange Pi 5b uses combphy0_ps for the WiFi. - the Orange Pi 5B has GPIO0_C5 hooked to BT_WAKE_HOST. - builtin eMMC storage - ap6275p Wifi module (like the Orange Pi 5 Plus) - builtin BlueTooth module Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com> Link: https://lore.kernel.org/r/20241024095038.42079-3-cenk.uluisik@googlemail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-25dt-bindings: arm: rockchip: Add Orange Pi 5b enum to Orange Pi 5 entryCenk Uluisik
This extends the Xunlong Orange Pi 5 device tree binding with an enum for the Orange Pi 5b, which is implemented before the device tree. How does this board differ from the original Orange Pi 5? - the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1 slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps for the WiFi. - The Orange Pi 5 with the M.2 socket has a regulator defined hooked to "GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5 hooked to BT_WAKE_HOST. - builtin eMMC storage - no SPI NOR flash (u-boot, preboot etc. initiates from within the eMMC storage) - ap6275p Wifi module (like the Orange Pi 5 Plus) - builtin BlueTooth module Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241024095038.42079-2-cenk.uluisik@googlemail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-25arm64: dts: rockchip: refactor common Orange Pi 5 boardCenk Uluisik
Unique to the Orange Pi 5 board: - M.2 NVMe M-Key PCIe 2.0x1 on combphy0_ps - SPI NOR flash Co-Developed-by: Jimmy Hon <honyuenkwun@gmail.com> Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com> Link: https://lore.kernel.org/r/20241024095038.42079-1-cenk.uluisik@googlemail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-25arm64: dts: rockchip: Remove 'enable-active-low' from two boardsHeiko Stuebner
The 'enable-active-low' property is not a valid, because it is the default behaviour of the fixed regulator. Only 'enable-active-high' is valid, and when this property is absent the fixed regulator will act as active low by default. Both the rk3588-orange-pi-5 and the Wolfvision pf5 io expander overlay smuggled those enable-active-low properties in, so remove them to make dtbscheck happier. Fixes: 28799a7734a0 ("arm64: dts: rockchip: add wolfvision pf5 io expander board") Cc: Michael Riesch <michael.riesch@wolfvision.net> Fixes: b6bc755d806e ("arm64: dts: rockchip: Add Orange Pi 5") Cc: Muhammed Efe Cetin <efectn@6tel.net> Reviewed-by: Michael Riesch <michael.riesch@wolfvision.net> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20241008203940.2573684-10-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-25arm64: dts: rockchip: add HDMI support to rk3588-jaguarHeiko Stuebner
The jaguar has an hdmi output port, which is connected to the hdmi0 controller of the rk3588. Add the necessary plumbing to enable it using the recently merged hdmi-qp controller. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Tested-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20241024151403.1748554-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-25arm64: dts: rockchip: add HDMI support to rk3588-tiger-haikouHeiko Stuebner
The Haikou baseboard has an hdmi output port, which is connected via the Q7 connector to the hdmi0 controller of the rk3588. Add the necessary plumbing to enable it using the recently merged hdmi-qp controller. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Tested-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20241024151403.1748554-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-25arm64: dts: rockchip: add HDMI pinctrl to rk3588-tiger SoMHeiko Stuebner
The Tiger SoM routes all relevant HDMI pins to its Q7 connector. Some from the M0 and some from the M1 set of pins. Add the necessary pinctrl entry to the hdmi controller for the SoM. Not all baseboards may use all pins, but even for them it'll serve documentation purposes. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20241024151403.1748554-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: tegra: smaug: Declare cros-ec extconDiogo Ivo
Leverage the Chrome OS EC in the Pixel C to convey information about the state of the USB-C port via the extcon class. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Link: https://lore.kernel.org/r/20241001-cros_ec_extcon-v1-1-1e212a1a4bbc@tecnico.ulisboa.pt Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: tegra: Add SDMMC sdr104-offsets for Tegra X1Diogo Ivo
Define the sdr104-specific offsets, preventing the driver from defaulting to the 1.8V offsets, which cause the system to hang during the SDR104 mode calibration. The zeroing of these values was chosen since it restores functionality and no better suggestions are provided by the Tegra X1 TRM. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: dts: nvidia: tegra210-smaug: Add TMP451 temperature sensor nodeJasper Korten
The Google Pixel C contains a TI TMP451 temperature sensor. Add a DT node for temperature sensor. Information gathered from downstream tree. Link: https://android.googlesource.com/kernel/tegra/+/refs/heads/android-tegra-dragon-3.18-oreo-m8/arch/arm64/boot/dts/tegra/tegra210-smaug.dtsi#1000 Signed-off-by: Jasper Korten <jja2000@gmail.com> Tested-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: dts: nvidia: tegra210-smaug: Add touchscreen nodeJasper Korten
The Google Pixel C contains a RMI4 HID over I2C touchscreen. Add a DT node for the touchscreen. Information gathered from downstream tree. Link: https://android.googlesource.com/kernel/tegra/+/refs/heads/android-tegra-dragon-3.18-oreo-m8/arch/arm64/boot/dts/tegra/tegra210-smaug.dtsi#542 Signed-off-by: Jasper Korten <jja2000@gmail.com> Tested-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: tegra: p2180: Add mandatory compatible for WiFi nodeTomasz Maciej Nowak
The dtschema requires to specify common ancestor which all SDIO chips are derived from, so add accordingly. Fixes: a50d5dcd2815 ("arm64: tegra: Wire up WiFi on Jetson TX1 module") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202409030438.8tumAnp1-lkp@intel.com Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-31 19:41:20 +0000