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2022-01-18drm/i915: Use REG_BIT() & co. for universal plane bitsVille Syrjälä
Polish the skl+ universal plane register defines by using REG_BIT() & co. The defines are also currently spread around in some semi-random fashion. Collect them up into one place. v2: deal with gvt Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-7-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-18drm/i915: Sipmplify PLANE_STRIDE maskingVille Syrjälä
There's no need to have separate masks for the stride bitfield in PLANE_STRIDE for different platforms. All the extra bits are hardcoded to zero anyway. Also the masks we're using now don't even match the actual hardware since the bitfield was only 10 bits on skl/derivatives, only getting bumped to 11 bits on glk. So let's just use a 12 bit mask for everything. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-5-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-17drm/i915/psr: remove unused lines_to_wait vbt infoJani Nikula
The lines_to_wait info from VBT is never used. Remove. Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112112715.1234366-1-jani.nikula@intel.com
2022-01-13drm/i915/pxp: Hold RPM wakelock during PXP unbindJuston Li
Similar to commit b8d8436840ca ("drm/i915/gt: Hold RPM wakelock during PXP suspend") but to fix the same warning for unbind during shutdown: ------------[ cut here ]------------ RPM wakelock ref not held during HW access WARNING: CPU: 0 PID: 4139 at drivers/gpu/drm/i915/intel_runtime_pm.h:115 gen12_fwtable_write32+0x1b7/0 Modules linked in: 8021q ccm rfcomm cmac algif_hash algif_skcipher af_alg uinput snd_hda_codec_hdmi vf industrialio iwl7000_mac80211 cros_ec_sensorhub lzo_rle lzo_compress zram iwlwifi cfg80211 joydev CPU: 0 PID: 4139 Comm: halt Tainted: G U W 5.10.84 #13 344e11e079c4a03940d949e537eab645f6 RIP: 0010:gen12_fwtable_write32+0x1b7/0x200 Code: 48 c7 c7 fc b3 b5 89 31 c0 e8 2c f3 ad ff 0f 0b e9 04 ff ff ff c6 05 71 e9 1d 01 01 48 c7 c7 d67 RSP: 0018:ffffa09ec0bb3bb0 EFLAGS: 00010246 RAX: 12dde97bbd260300 RBX: 00000000000320f0 RCX: ffffffff89e60ea0 RDX: 0000000000000000 RSI: 00000000ffffdfff RDI: ffffffff89e60e70 RBP: ffffa09ec0bb3bd8 R08: 0000000000000000 R09: ffffa09ec0bb3950 R10: 00000000ffffdfff R11: ffffffff89e91160 R12: 0000000000000000 R13: 0000000028121969 R14: ffff9515c32f0990 R15: 0000000040000000 FS: 0000790dcf225740(0000) GS:ffff951737800000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 000058b25efae147 CR3: 0000000133ea6001 CR4: 0000000000770ef0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff07f0 DR7: 0000000000000400 PKRU: 55555554 Call Trace: intel_pxp_fini_hw+0x2f/0x39 i915_pxp_tee_component_unbind+0x1c/0x42 component_unbind+0x32/0x48 component_unbind_all+0x80/0x9d take_down_master+0x24/0x36 component_master_del+0x56/0x70 mei_pxp_remove+0x2c/0x68 mei_cl_device_remove+0x35/0x68 device_release_driver_internal+0x100/0x1a1 mei_cl_bus_remove_device+0x21/0x79 mei_cl_bus_remove_devices+0x3b/0x51 mei_stop+0x3b/0xae mei_me_shutdown+0x23/0x58 device_shutdown+0x144/0x1d3 kernel_power_off+0x13/0x4c __se_sys_reboot+0x1d4/0x1e9 do_syscall_64+0x43/0x55 entry_SYSCALL_64_after_hwframe+0x44/0xa9 RIP: 0033:0x790dcf316273 Code: 64 89 01 48 83 c8 ff c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 89 fa be 69 19 12 28 bf ad8 RSP: 002b:00007ffca0df9198 EFLAGS: 00000202 ORIG_RAX: 00000000000000a9 RAX: ffffffffffffffda RBX: 000000004321fedc RCX: 0000790dcf316273 RDX: 000000004321fedc RSI: 0000000028121969 RDI: 00000000fee1dead RBP: 00007ffca0df9200 R08: 0000000000000007 R09: 0000563ce8cd8970 R10: 0000000000000000 R11: 0000000000000202 R12: 00007ffca0df9308 R13: 0000000000000001 R14: 0000000000000000 R15: 0000000000000003 ---[ end trace 2f501b01b348f114 ]--- ACPI: Preparing to enter system sleep state S5 reboot: Power down Changes since v1: - Rebase to latest drm-tip Fixes: 0cfab4cb3c4e ("drm/i915/pxp: Enable PXP power management") Suggested-by: Lee Shawn C <shawn.c.lee@intel.com> Signed-off-by: Juston Li <juston.li@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220106200236.489656-2-juston.li@intel.com
2022-01-13drm/i915/display/adlp: Implement new step in the TC voltage swing prog sequenceJosé Roberto de Souza
TC voltage swing programming sequence was updated with a new step. BSpec: 54956 Cc: stable@vger.kernel.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Clint Taylor <clinton.a.taylor@intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220113174826.50272-1-jose.souza@intel.com
2022-01-13drm/i915/display/ehl: Update voltage swing tableJosé Roberto de Souza
EHL table was recently updated with some minor fixes. BSpec: 21257 Cc: stable@vger.kernel.org Cc: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220113160437.49059-1-jose.souza@intel.com
2022-01-13drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_*Jani Nikula
Prefer acronym-based naming to be in line with the rest of the driver. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112111740.1208374-1-jani.nikula@intel.com
2022-01-13drm/i915/dp: make intel_dp_pack_aux() static againJani Nikula
The last user of intel_dp_pack_aux() outside intel_dp_aux.c got removed in commit ad26451a7902 ("drm/i915/display: Drop PSR support from HSW and BDW"). Make the function static again. Rename the pack/unpack functions to follow the usual naming conventions while at it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112105703.1151391-1-jani.nikula@intel.com
2022-01-12Merge tag 'gvt-next-2022-01-12' of https://github.com/intel/gvt-linux into ↵Rodrigo Vivi
drm-intel-next gvt-next-2022-01-12 - Constify some pointers. (Rikard Falkeborn) - Use list_entry to access list members. (Guenter Roeck) - Fix cmd parser error for Passmark9. (Zhenyu Wang) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> From: "Wang, Zhi A" <zhi.a.wang@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f3076d7e-ff71-4882-8d72-fcc577a882cb@intel.com
2022-01-12drm/i915/gvt: Constify vgpu_typesRikard Falkeborn
It is never modified, so make it const to allow the compiler to put it in read-only memory. While at it, make name a const char*. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-10-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify gtt_type_table_entryRikard Falkeborn
It is never modified, so make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-9-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify formatsRikard Falkeborn
These are never modified, so make them const to allow the compiler to put them in read-only memory. WHile at it, make the description const char* since it is never modified. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-8-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify cmd_interrupt_eventsRikard Falkeborn
It is never modified, so make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-7-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify gvt_mmio_blockRikard Falkeborn
These are never modified, so make them const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-6-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify intel_gvt_sched_policy_opsRikard Falkeborn
These are never modified, so make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-5-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify intel_gvt_irq_opsRikard Falkeborn
These are never modified, so make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-4-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify intel_gvt_gtt_pte_opsRikard Falkeborn
These are never modified, so make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-3-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Constify intel_gvt_gtt_gma_opsRikard Falkeborn
These are never modified, so make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-2-rikard.falkeborn@gmail.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Fix cmd parser error for Passmark9Zhenyu Wang
This is to add one new register required for windows guest driver update when running Passmark9, otherwise cmd parser would complain and fail guest workload. Cc: Terrence Xu <terrence.xu@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20211011043329.3519093-1-zhenyuw@linux.intel.com Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-12drm/i915/gvt: Use list_entry to access list membersGuenter Roeck
Use list_entry() instead of container_of() to access list members. Also drop unnecessary and misleading NULL checks on the result of list_entry(). Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20210523172304.3033229-1-linux@roeck-us.net Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
2022-01-11drm/i915: Drop unused _PORT3 and _PORT4 TC phy register offsetsMatt Roper
All MG/DKL PHY register regions are evenly spaced offset-wise (0x168000, 0x169000, 0x16A000, 0x16B000) so the _MMIO_PORT() macro we use to access their registers only needs the first two offsets. We can drop the _PORT3 and _PORT4 offsets which are never directly referenced. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-12-matthew.d.roper@intel.com
2022-01-11drm/i915: Move TC PHY registers to their own headerMatt Roper
Registers representing the MG/DKL TC PHYs (including the TC DPLLs which exist inside the PHY) are only needed in a couple files and on specific platforms; let's keep them separate from the general register pool. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-11-matthew.d.roper@intel.com
2022-01-11drm/i915: Move combo PHY registers to their own headerMatt Roper
These registers are only needed in a couple files and on specific platforms; let's keep them separate from the general register pool. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-10-matthew.d.roper@intel.com
2022-01-11drm/i915: Move SNPS PHY registers to their own headerMatt Roper
These registers are only needed in a couple files and on specific platforms; let's keep them separate from the general register pool. v2: - Don't forget to include i915_reg_defs.h (Jani) - Ensure include guard matches header name (Jani) Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-9-matthew.d.roper@intel.com
2022-01-11drm/i915/gt: Move engine registers to their own headerMatt Roper
Let's continue breaking up and cleaning up the massive i915_reg.h file by moving all registers that are defined in relation to an engine base to their own header. There are probably a bunch of other "engine registers" that we haven't moved yet (especially those that belong to the render engine in the 0x2??? range), but this is a relatively straightforward first step. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-8-matthew.d.roper@intel.com
2022-01-11drm/i915: Introduce i915_reg_defs.hMatt Roper
We'd like to start splitting i915_reg.h into various domain-specific register files and cleaning them up. Let's move the basic macros and type definitions to their own header file that can be including in each of the new split headers. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-7-matthew.d.roper@intel.com
2022-01-11drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7Matt Roper
It's preferable to use parameterized register macros where possible. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-6-matthew.d.roper@intel.com
2022-01-11drm/i915: Use RING_PSMI_CTL rather than per-engine macrosMatt Roper
We have a parameterized macro for RING_PSMI_CTL; let's use that instead of the per-engine definitions where possible. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-5-matthew.d.roper@intel.com
2022-01-11drm/i915: Parameterize ECOSKPDMatt Roper
Combine the separate render and blitter register definitions into a single definition. We already know we have some workarounds on an upcoming platform that will need to update the ECOSKPD register for other engines too, so this helps pave the way for that. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-4-matthew.d.roper@intel.com
2022-01-11drm/i915: Parameterize PWRCTX_MAXCNTMatt Roper
Rather than having separate definitions for each engine, create a single parameterized macro that takes the engine base offset. This will also ensure we get to the proper offset if we ever need to use these registers on newer platforms (where the media engine offsets have changed). Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-3-matthew.d.roper@intel.com
2022-01-11drm/i915: Use parameterized GPR register definitions everywhereMatt Roper
Since we have an engine-parameterized macro GEN8_RING_CS_GPR, let's use that in place of the HSW_CS_GPR and BCS_GPR register definitions. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-2-matthew.d.roper@intel.com
2022-01-11drm/i915/snps: vswing value refined for SNPS physClint Taylor
Updated new values from BSPEC. Bspec: 53920 Cc: Jani Nikula <jani.nikula@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220110234520.6836-1-clinton.a.taylor@intel.com
2022-01-10drm/i915: split out vlv sideband registers from i915_reg.hJani Nikula
Add a dedicated file vlv_sideband_reg.h for the VLV/CHV sideband registers. The sideband registers macros are needed by the same files that need vlv_sideband.h, so include the definitions from there. v2: Fix copyright year (Matt) Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220110095740.166078-2-jani.nikula@intel.com
2022-01-10drm/i915: split out PCI config space registers from i915_reg.hJani Nikula
The PCI config space registers don't really belong next to the MMIO register definitions. v2: Fix copyright year (Matt) Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220110095740.166078-1-jani.nikula@intel.com
2022-01-10drm/i915: split out gem/i915_gem_tiling.h from i915_drv.hJani Nikula
We already have the gem/i915_gem_tiling.c file. Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8073a429ed1f8ade9c0cc8a6ed1a0f82183100c5.1641561552.git.jani.nikula@intel.com
2022-01-10drm/i915: split out gem/i915_gem_userptr.h from i915_drv.hJani Nikula
We already have the gem/i915_gem_userptr.c file. Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/c29f66604ebd973b8eff1cce7d7c53615a26480f.1641561552.git.jani.nikula@intel.com
2022-01-10drm/i915: split out i915_gem_evict.h from i915_drv.hJani Nikula
We already have the i915_gem_evict.c file. v2: Fixed commit message (Tvrtko) Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ec666853171d04daeb21a93083940df36907c343.1641561552.git.jani.nikula@intel.com
2022-01-10drm/i915: split out i915_cmd_parser.h from i915_drv.hJani Nikula
We already have the i915_cmd_parser.c file. Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1a02b8788266f4f2fd4de12808b55c4a66179e98.1641561552.git.jani.nikula@intel.com
2022-01-10drm/i915: split out i915_getparam.h from i915_drv.hJani Nikula
We already have the i915_getparam.c file. Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/27f3af2298c3cdd3cb2839c2a9a52237248e087a.1641561552.git.jani.nikula@intel.com
2022-01-07drm/i915: Fix possible NULL pointer dereferences in i9xx_update_wm()Harish Chegondi
Check return pointer from intel_crtc_for_plane() before dereferencing it, as it can be NULL. v2: Moved the NULL check into intel_crtc_active(). Cc: Jani Nikula <jani.nikula@intel.com> Cc: Caz Yokoyama <caz.yokoyama@intel.com> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Harish Chegondi <harish.chegondi@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211217160255.1300348-1-harish.chegondi@intel.com
2022-01-05drm/i915: stop including i915_irq.h from i915_drv.hJani Nikula
Only include i915_irq.h where actually needed. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220105102131.988791-1-jani.nikula@intel.com
2021-12-31drm: Add orientation quirk for GPD Win MaxAnisse Astier
Panel is 800x1280, but mounted on a laptop form factor, sideways. Signed-off-by: Anisse Astier <anisse@astier.eu> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211229222200.53128-3-anisse@astier.eu
2021-12-31drm/i915/opregion: add support for mailbox #5 EDIDAnisse Astier
The ACPI OpRegion Mailbox #5 ASLE extension may contain an EDID to be used for the embedded display. Add support for using it via by adding the EDID to the list of available modes on the connector, and use it for eDP when available. If a panel's EDID is broken, there may be an override EDID set in the ACPI OpRegion mailbox #5. Use it if available. Fixes the GPD Win Max display. Based on original patch series by: Jani Nikula <jani.nikula@intel.com> https://patchwork.kernel.org/project/intel-gfx/patch/20200828061941.17051-1-jani.nikula@intel.com/ Changes: - EDID is copied and validated with drm_edid_is_valid - EDID is now only used as a fallback. - squashed the two patches Cc: Jani Nikula <jani.nikula@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Co-developed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Anisse Astier <anisse@astier.eu> Link: https://patchwork.freedesktop.org/patch/msgid/20211229222200.53128-2-anisse@astier.eu
2021-12-27drm/i915/dsi: Drop double check ACPI companion device for NULLAndy Shevchenko
acpi_dev_get_resources() does perform the NULL pointer check against ACPI companion device which is given as function parameter. Thus, there is no need to duplicate this check in the caller. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211222154033.6770-1-andriy.shevchenko@linux.intel.com
2021-12-23drm/i915/fbc: Remember to update FBC state even when not reallocating CFBVille Syrjälä
We mustn't forget to update our FBC state even if we don't have to reallocate the CFB. Otherwise we won't refresh our notion of what eg. the new fence or the new override CFB stride should be. Using the wrong CFB stride in particular can cause underruns and could even corrupt other stuff in stolen. Fixes: f4cfdbb02ca8 ("drm/i915/fbc: Nuke state_cache") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4774 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211216110822.8461-1-ville.syrjala@linux.intel.com Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2021-12-23drm/i915/bios: fix slab-out-of-bounds accessJani Nikula
If VBT size is not a multiple of 4, the last 4-byte store will be out of bounds of the allocated buffer. Spotted with KASAN. Round up the allocation size. v2: Use round_up() intead of roundup() as it's a power of 2 (Thomas) Reported-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Fixes: a36e7dc0af1c ("drm/i915/dg1: Read OPROM via SPI controller") Cc: Clint Taylor <clinton.a.taylor@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211222081654.1843211-1-jani.nikula@intel.com
2021-12-22drm: Always include the debugfs dentry in drm_crtcVille Syrjälä
Remove the counterproductive CONFIG_DEBUG_FS ifdef and just include the debugfs dentry in drm_crtc always. This way we don't need annoying ifdefs in the actual code with DEBUGFS=n. Also we don't have these ifdefs around any of the other debugfs dentries either so can't see why drm_crtc should be special. This fixes the i915 DEBUGFS=n build because I assumed the dentry would always be there. Cc: Jani Nikula <jani.nikula@intel.com> Reported-by: Nathan Chancellor <nathan@kernel.org> Tested-by: Nathan Chancellor <nathan@kernel.org> Fixes: e74c6aa955ca ("drm/i915/fbc: Register per-crtc debugfs files") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211221193754.12287-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Daniel Vetter <daniel@ffwll.ch>
2021-12-20drm/i915/adl-n: Enable ADL-N platformTejas Upadhyay
Adding PCI device ids and enabling ADL-N platform. ADL-N from i915 point of view is subplatform of ADL-P. BSpec: 68397 Changes since V2: - Added version log history Changes since V1: - replace IS_ALDERLAKE_N with IS_ADLP_N - Jani Nikula Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211210051802.4063958-1-tejaskumarx.surendrakumar.upadhyay@intel.com
2021-12-16drm/i915/dg1: Read OPROM via SPI controllerClint Taylor
Read OPROM SPI through MMIO and find VBT entry since we can't use OpRegion and PCI mapping may not work on some systems due to most BIOSes not leaving the Option ROM mapped. v2: Remove message with allocation failure Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211216062645.3477854-1-lucas.demarchi@intel.com
2021-12-16drm/i915: Remove unused intel_gmbus_set_speed() functionHans de Goede
The intel_gmbus_set_speed() function is not used anywhere, remove it. Note drivers/gpu/drm/gma500 has its own copy called gma_intel_gmbus_set_speed() which is used, the intel_gmbus_set_speed() version in the i915 code is not used at all Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211121191001.252076-1-hdegoede@redhat.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-31 03:55:19 +0000