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2015-10-21drm/amdgpu: add VCE support for Stoney (v2)Samuel Li
Stoney is VCE 3.x single. v2: Stoney is single pipe like Fiji Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add UVD support for StoneySamuel Li
Stoney is UVD 6.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add GFX support for Stoney (v2)Samuel Li
Stoney is GFX 8.1. v2: update to latest golden settings Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add SDMA support for Stoney (v2)Samuel Li
Stoney is SDMA 3.x. v2: update to latest golden register settings Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add DCE support for StoneySamuel Li
Stoney is DCE 11.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: Update SMC/DPM for StoneySamuel Li
Stoney is SMC 8.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add GMC support for StoneySamuel Li
Stoney is GMC 8.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add Stoney chip familySamuel Li
Stoney is based on Carrizo with some IP upgrades. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: fix the broken vm->mutex V2Chunming Zhou
fix the vm->mutex and ww_mutex confilcts. vm->mutex is always token first, then ww_mutex. V2: remove unneccessary checking for pt bo. Change-Id: Iea56e183752c02831126d06d2f5b7a474a6e4743 Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-21drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()Junwei Zhang
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-21drm/amdgpu: remove the exclusive lockChristian König
Finally getting rid of it. Signed-off-by: Christian König <christian.koenig@amd.com>
2015-10-21drm/amdgpu: remove old lockup detection infrastructureChristian König
It didn't worked to well anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-10-21drm: fix trivial typosGeliang Tang
s/regsiter/register/ Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-19drm/amdgpu/dce: simplify suspend/resumeAlex Deucher
We were basically opencoding the same thing in both hw_init and resume and hw_fini and suspend. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-19drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packetAlex Deucher
This is the recommended setting from the hw team for newer versions of the firmware. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-10-15drm/radeon: Use rdev->gem.mutex to protect hyperz/cmask ownersDaniel Vetter
This removes the last depency of radeon for dev->struct_mutex! Also the locking scheme for hyperz/cmask owners seems a bit unsound, there's no protection in the preclose handler (and that never did hold dev->struct_mutex while being called). So grab the same lock there, too. There's also all the checks in the cs checker, but since the overall design seems to never stall for the previous owner I figured it's ok if I leave this racy. It was racy even before I touched it after all too. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: fix lockup when clean pending fencesJunwei Zhang
The first lockup fence will lock the fence list of scheduler. Then cancel the delayed workqueues for all clean pending fences without waiting the workqueues to finish. Change-Id: I9bec826de1aa49d587b0662f3fb4a95333979429 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-14drm/amdgpu: add timer to fence to detect scheduler lockupJunwei Zhang
Change-Id: I67e987db0efdca28faa80b332b75571192130d33 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: David Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-14drm/amdgpu: add VM CS mapping trace pointChristian König
Output all VM mappings a command submission uses. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: add option to clear VM page tables after every submitChristian König
This makes it much easier to find when userspace misses to send some buffers. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: add option to stop on VM faultChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: only print meaningful VM faultsChristian König
Port of radeon commit 9b7d786b900baf7c0d1a7e211570aef1cb27590f. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: also trace already allocated VMIDsChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: Drop unnecessary #include <linux/vga_switcheroo.h>Lukas Wunner
This was added to two radeon files even though they don't use any vga_switcheroo symbols, the amdgpu fork inherited them: Added to amdgpu_acpi.c by commit d7a2952f1ade ("drm/radeon: Add support for the ATIF ACPI method to the radeon driver"). Added to amdgpu_bios.c by commit 6a9ee8af344e ("vga_switcheroo: initial implementation (v15)"). Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/radeon: Drop unnecessary #include <linux/vga_switcheroo.h>Lukas Wunner
This was added to three files even though they don't use any vga_switcheroo symbols: Added to radeon_acpi.c by commit d7a2952f1ade ("drm/radeon: Add support for the ATIF ACPI method to the radeon driver"). Added to radeon_asic.c by commit 0a10c85129c2 ("drm/radeon: create radeon_asic.c"). Added to radeon_bios.c by commit 6a9ee8af344e ("vga_switcheroo: initial implementation (v15)"). Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: clean up pageflip interrupt handlingAlex Deucher
Check to make sure we aren't touching a non-existent display controller and simplify the code. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: rework sdma structuresAlex Deucher
Rework the sdma structures in the driver to consolidate all of the sdma info into a single structure and allow for asics that may have different numbers of sdma instances. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu: unpin cursor BOs on suspend and pin them again on resumeAlex Deucher
Everything is evicted from VRAM before suspend, so we need to make sure all BOs are unpinned and re-pinned after resume. Fixes broken mouse cursor after resume introduced by commit b9729b17. Port of radeon commit: f3cbb17bcf676a2fc6aedebe9fbebd59e550c51a Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Fold set_cursor() into show_cursor()Alex Deucher
Port of radeon commit: 8991668ab4e26f985a8485719bce5d6d0623a644 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Clean up reference counting and pinning of the cursor BOsAlex Deucher
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce8 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce8 set_cursor. This fixes dce8 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0c930104462aa91344f07d002cf8248ed Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Move hotspot handling out of set_cursorAlex Deucher
It's only needed in dce8 crtc_cursor_set2. Port of radeon commit: 2e007e611bc0a46dfed1547e0228a57f800e703d Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Re-show the cursor after a modeset (v2)Alex Deucher
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Port of radeon commit: 6d3759fac636028849f3bbec80c4b77e9bfdb1d2 v2: change radeon reference in error message Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce8: Use cursor_set2 hook for enabling / disabling the HW cursorAlex Deucher
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Port of radeon commits: 78b1a6010b46a69bcd47b723a80f92693f26d17b 3feba08d79c32777a845c3c8a4ab93092bdf6f19 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce11: Fold set_cursor() into show_cursor()Alex Deucher
Port of radeon commit: 8991668ab4e26f985a8485719bce5d6d0623a644 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce11: Clean up reference counting and pinning of the cursor BOsAlex Deucher
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce11 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce11 set_cursor. This fixes dce11 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0c930104462aa91344f07d002cf8248ed Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce11: Move hotspot handling out of set_cursorAlex Deucher
It's only needed in dce11 crtc_cursor_set2. Port of radeon commit: 2e007e611bc0a46dfed1547e0228a57f800e703d Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce11: Re-show the cursor after a modeset (v2)Alex Deucher
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Port of radeon commit: 6d3759fac636028849f3bbec80c4b77e9bfdb1d2 v2: change radeon reference in error output Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce11: Use cursor_set2 hook for enabling / disabling the HW cursorAlex Deucher
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Port of radeon commits: 78b1a6010b46a69bcd47b723a80f92693f26d17b 3feba08d79c32777a845c3c8a4ab93092bdf6f19 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce10: Fold set_cursor() into show_cursor()Alex Deucher
Port of radeon commit: 8991668ab4e26f985a8485719bce5d6d0623a644 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce10: Clean up reference counting and pinning of the cursor BOsAlex Deucher
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce10 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce10 set_cursor. This fixes dce10 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0c930104462aa91344f07d002cf8248ed Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce10: Move hotspot handling out of set_cursorAlex Deucher
It's only needed in dce10 crtc_cursor_set2. Port of radeon commit: 2e007e611bc0a46dfed1547e0228a57f800e703d Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce10: Re-show the cursor after a modeset (v2)Alex Deucher
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Port of radeon commit: 6d3759fac636028849f3bbec80c4b77e9bfdb1d2 v2: change radeon reference in error message Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/dce10: Use cursor_set2 hook for enabling / disabling the HW cursorAlex Deucher
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Port of radeon commits: 78b1a6010b46a69bcd47b723a80f92693f26d17b 3feba08d79c32777a845c3c8a4ab93092bdf6f19 Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/atom: add support for new div32 opcodes (v3)Alex Deucher
Better precision than the regular div opcode. v2: drop 64 bit divide v3: fix op handling. This actually is a 64 bit divide. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/atom: add support for new mul32 opcodes (v2)Alex Deucher
Better precision than the regular mul opcode. v2: handle big endian properly. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/atom: add support for process ds opcodeAlex Deucher
Just skips a data section. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14drm/amdgpu/atom: implement debug opcodeAlex Deucher
Basically a nop. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-07drm/amdgpu: disable hw semaphores by defaultAlex Deucher
These are buggy on some asics and not really used anymore now that the GPU schedular is enabled. Change-Id: I67182b409d64de308392a15d1a0a15018071dc0b Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-07drm/amdgpu: enable scheduler by defaultChunming Zhou
Change-Id: Idce64f63e8422324996fc5d583d0bc9a5ac60d0c Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-07drm/amdgpu: add TOPDOWN flag to the whole vramChunming Zhou
need to decrease visible vram usage by default. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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