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2014-04-04drm/tegra: Add eDP supportThierry Reding
Add support for eDP functionality found on Tegra124 and later SoCs. Only fast link training is currently supported. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04gpu: host1x: export host1x_syncpt_incr_max() functionBryan Wu
Tegra V4L2 camera driver needs this function to do frame capture. Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/tegra: prime: Add vmap supportThierry Reding
This is trivial to support since all GEM objects are mapped into kernel space anyway. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/panel: add support for LG LD070WX3-SL01 panelAlexandre Courbot
This panel is used by Tegra Note 7 and supported by the simple-panel driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/panel: add support for LG LH500WX1-SD03 panelAlexandre Courbot
This panel is used by the NVIDIA SHIELD and supported by the simple-panel driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/panel: simple: Allow DSI panels to provide mode flagsThierry Reding
In order to differentiate between the different video modes (burst vs. non-burst, sync pulses vs. sync events) supported by peripherals, pass the flags that specify this mode in the panel description to the DSI peripheral device when probed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/panel: simple: Allow GPIO accesses to sleepThierry Reding
The enable GPIO for panels may be provided by GPIO expanders on slow busses (such as I2C), and therefore toggling the GPIO may sleep. Since these accesses don't happen in interrupt context, use the *_cansleep() variants of the GPIO API. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/panel: remove redundant regulator_disable()Alexandre Courbot
regulator_disable() is already performed by panel_simple_disable(), which is called by panel_simple_remove(). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/panel: use gpiod interface for enable GPIOAlexandre Courbot
Use the new GPIO descriptor interface to handle the panel's enable GPIO. This considerably simplifies the code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> [treding@nvidia.com: rework to improve readability] Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/panel: Add LG 12.9" LCD panelThierry Reding
The LP129QE LCD has an LED backlight and a display resolution of 2560x1700 pixels. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04MAINTAINERS: Add entry for DRM panel driversThierry Reding
Add myself as the maintainer for DRM panel drivers. The plan is to collect panel-related patches in one place to reduce conflicts and unburden Dave. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/ttm: Hide the implementation details of reservationThomas Hellstrom
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2014-04-04drm: gem-cma: Fix warnings due to improper printk formatsLaurent Pinchart
Use the %pad printk specifier to print dma_addr_t variables. This fixes warnings on platforms where dma_addr_t has a different size than int or size_t. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-04drm/cma: Use dma_mmap_writecombine() to mmap bufferLaurent Pinchart
The GEM CMA helpers uses a custom mmap implementation based on remap_pfn_range(). While this works when the buffer DMA and physical addresses are identical, it fails to take IOMMU into account and tries to mmap the buffer to userspace using the DMA virtual address instead of the physical address. This results in mapping random physical pages when the device is behind an IOMMU. Use the DMA mapping dma_mmap_writecombine() function instead. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-04drm/mm: Fix search for smallest hole satisfying constraintsMichel Dänzer
entry->size is the size of the node, not the size of the hole after it. So the code would actually find the hole which can satisfy the constraints and which is preceded by the smallest node, not the smallest hole satisfying the constraints. Reported-by: "Huang, FrankR" <FrankR.Huang@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-04drm/cma: include <drm/drmP.h> as neededShawn Guo
The following error and warnings will be seen when compiling a C file which includes <drm/drm_gem_cma_helper.h> but without <drm/drmP.h> being included before. include/drm/drm_gem_cma_helper.h:5:24: error: field ‘base’ has incomplete type include/drm/drm_gem_cma_helper.h: In function ‘to_drm_gem_cma_obj’: include/drm/drm_gem_cma_helper.h:16:9: warning: initialization from incompatible pointer type [enabled by default] include/drm/drm_gem_cma_helper.h: At top level: include/drm/drm_gem_cma_helper.h:24:34: warning: ‘struct drm_mode_create_dumb’ declared inside parameter list [enabled by default] include/drm/drm_gem_cma_helper.h:24:34: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] include/drm/drm_gem_cma_helper.h:24:34: warning: ‘struct drm_device’ declared inside parameter list [enabled by default] include/drm/drm_gem_cma_helper.h:24:34: warning: ‘struct drm_file’ declared inside parameter list [enabled by default] include/drm/drm_gem_cma_helper.h:28:10: warning: ‘struct drm_device’ declared inside parameter list [enabled by default] include/drm/drm_gem_cma_helper.h:28:10: warning: ‘struct drm_file’ declared inside parameter list [enabled by default] include/drm/drm_gem_cma_helper.h:35:3: warning: ‘struct drm_device’ declared inside parameter list [enabled by default] include/drm/drm_gem_cma_helper.h:46:14: warning: ‘struct drm_device’ declared inside parameter list [enabled by default] Fix them by including <drm/drmP.h> in drm_gem_cma_helper.h. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-04drm: Prefer noninterlace cmdline mode unless explicitly specifiedTakashi Iwai
Currently drm_pick_cmdline_mode() doesn't care about the interlace when the given mode line has no "i" suffix. That is, when there are multiple entries for the same resolution, an interlace mode might be picked up just depending on the assigned order, and there is no way to exclude it. This patch changes the logic for the mode selection, to prefer the noninterlace mode unless the interlace mode is explicitly given. When no matching mode is found, it still tries the interlace mode as fallback. Signed-off-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-04drm/radeon: Use two-ended allocation by size, v2Lauri Kasanen
This decreases eviction by up to 20%, by improving the fragmentation quality. No harm in normal cases that fit VRAM fully (PTS gaming suite). In some cases, even the VRAM-fitting cases improved slightly (openarena, urban terror). 512kb was measured as the most optimal threshold for 3d workloads common to radeon. Other drivers may need different thresholds according to their workloads. v2: Nicer formatting Signed-off-by: Lauri Kasanen <cand@gmx.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-04drm: Add support for two-ended allocation, v3Lauri Kasanen
Clients like i915 need to segregate cache domains within the GTT which can lead to small amounts of fragmentation. By allocating the uncached buffers from the bottom and the cacheable buffers from the top, we can reduce the amount of wasted space and also optimize allocation of the mappable portion of the GTT to only those buffers that require CPU access through the GTT. For other drivers, allocating small bos from one end and large ones from the other helps improve the quality of fragmentation. Based on drm_mm work by Chris Wilson. v3: Changed to use a TTM placement flag v2: Updated kerneldoc Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Christian König <deathsimple@vodafone.de> Signed-off-by: Lauri Kasanen <cand@gmx.com> Signed-off-by: David Airlie <airlied@redhat.com>
2014-04-04Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into ↵Dave Airlie
drm-next * 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/omap: Don't dereference list head when the connectors list is empty drm/msm/mdp: add timeout for irq wait drm/msm: validate flags, etc drm/msm: use componentised device support drm/msm: add chip-id param drm/msm: crank down gpu when inactive drm/msm: spin helper drm/msm: add hang_debug module param drm/msm: hdmi audio support
2014-04-04drm/rcar-du: Handle encoder initialization failuresLaurent Pinchart
The rcar_du_encoder_init() function can fail and return an error code. Don't ignore it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-04Merge branch 'drm-next-3.15' of ↵Dave Airlie
git://people.freedesktop.org/~deathsimple/linux into drm-next - Rework of finding the right PLL numbers for display - Couple of different bugfixes * 'drm-next-3.15' of git://people.freedesktop.org/~deathsimple/linux: drm/radeon: fix typo in spectre_golden_registers drm/radeon: fix endian swap on hawaii clear state buffer setup drm/radeon: call drm_edid_to_eld when we update the edid drm/radeon: rework finding display PLL numbers v2 drm/radeon: fix resuming mode in pm runtime resume path drm/radeon: fix runtime suspend breaking secondary GPUs drm/radeon: clear needs_reset flag if IB test fails
2014-04-03drm/i915: Provide a bit more info when pipestat bits are wrongVille Syrjälä
Print the enable_mask and status_mask from __i915_{enable,disable}_pipestat() when the caller has messed them up somehow. v2: Use pipe_name() (Damien) Fix a typo in the commit message Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/i915: Move all ring resets before setting the HWS pageChris Wilson
In commit a51435a3137ad8ae75c288c39bd2d8b2696bae8f Author: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com> Date: Wed Mar 12 16:39:40 2014 +0530 drm/i915: disable rings before HW status page setup we reordered stopping the rings to do so before we set the HWS register. However, there is an extra workaround for g45 to reset the rings twice, and for consistency we should apply that workaround before setting the HWS to be sure that the rings are truly stopped. Cc: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/radeon: fix typo in spectre_golden_registersAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2014-04-03drm/radeon: fix endian swap on hawaii clear state buffer setupAlex Deucher
Need to swap on BE. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2014-04-03drm/radeon: call drm_edid_to_eld when we update the edidAlex Deucher
This needs to be done to update some of the fields in the connector structure used by the audio code. Noticed by several users on irc. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2014-04-03drm/radeon: rework finding display PLL numbers v2Christian König
This completely reworks how the PLL parameters are generated and should result in better matching dot clock frequencies. Probably needs quite a bit of testing. bugs: https://bugs.freedesktop.org/show_bug.cgi?id=76564 v2: more cleanup and comments. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-03drm/radeon: fix resuming mode in pm runtime resume pathDave Airlie
For runtime pm we'd never suspend with the modesetting hw turned on, so don't try and resume the modesetting hw, as that path will take locks that the interface that is causing us to wake up might also take. Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-03drm/radeon: fix runtime suspend breaking secondary GPUsDave Airlie
Same fix as for nouveau, when we fail with EINVAL, subsequent gets fail hard, causing the device not to open. Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-03drm/radeon: clear needs_reset flag if IB test failsChristian König
If the IB test fails we don't want to reset the card over and over again, just accept that it isn't working. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=76501 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-03drm/i915: Invariably invalidate before ctx switchBen Widawsky
We have been setting the bit which was originally BIOS dependent since: commit f05bb0c7b624252a5e768287e340e8e45df96e42 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Sun Jan 20 16:33:32 2013 +0000 drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waits Therefore, we do not need to try to figure it out dynamically and we can just always invalidate the TLBs. It's a partial revert of: commit 12b0286f49947a6cdc9285032d918466a8c3f5f9 Author: Ben Widawsky <ben@bwidawsk.net> Date: Mon Jun 4 14:42:50 2012 -0700 drm/i915: possibly invalidate TLB before context switch The original commit attempted to only invalidate when necessary (very much a relic from the old days). Now, we can just always invalidate. I guess the old TODO still exists. Since we seem to have abandoned ILK contexts however, there isn't much point in even remembering. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/i915: Fix framecount offsetRafael Barbalho
The framecount register was still using the old PIPE macro instead of the new PIPE2 macro Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/i915: Warn when DPIO read returns 0xffffffffVille Syrjälä
DPIO reads from groups/broadcast register offsets for PCS and TX return all 1's. If that result gets used for something we'll probably end up doing something wrong. So warn when that happens. FIXME there might be some registers where all 1's is a valid value, so ideally we should check the register offset instead... Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: copypaste the FIXME comment into the code.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/i915: Move DP M/N setup from update_pll to mode_set for gmch platformsVille Syrjälä
There's no point in hiding the DP M/N setup in the update_pll functions. Just move it to the mode_set function. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/i915: Fix debugfs PDP register dumpVille Syrjälä
Iterate over all the PDP registers instead of just printing PDP0 four times in gen8 PPGTT debugfs info. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/i915: dmesg output for VT-d testingDaniel Vetter
Our validation guys want to have a positive proof that the gfx driver is indeed using VT-d, since setting up a gfx stack, especially in early bring-up and by people not versed in linux gfx is a bit tricky. So provide just that. Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/i915: Add debug module option for VTd validationDaniel Vetter
VTd has a few too many "outright disable the damn thing" workarounds accumulated and for validation we want a simple knob to make sure we disable them all. Since this is for bdw+ validation and atm we don't have any workarounds for bdw this option currently does nothing. So currently this is just a placeholder to make sure reality will match with the documented process for our validation people. v2: Fix up param description (Jani). v3: Actually git add ... Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-03drm/vmwgfx: correct fb_fix_screeninfo.line_lengthChristopher Friedt
Previously, the vmwgfx_fb driver would allow users to call FBIOSET_VINFO, but it would not adjust the FINFO properly, resulting in distorted screen rendering. The patch corrects that behaviour. See https://bugs.gentoo.org/show_bug.cgi?id=494794 for examples. Cc: stable@vger.kernel.org Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2014-04-03drm/vmwgfx: Remove authorization requirements around some more ioctlsThomas Hellstrom
These ioctls require a valid handle referenced by the caller to succeed, which implies that the caller has or has had sufficient privileges. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2014-04-03drm/vmwgfx: Fix query buffer locking order violationThomas Hellstrom
The query buffers were reserved while holding the binding mutex, which caused a circular locking dependency. Cc: stable@vger.kernel.org Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2014-04-03Merge tag 'drm-intel-next-2014-03-21' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next - Inherit/reuse firmwar framebuffers (for real this time) from Jesse, less flicker for fastbooting. - More flexible cloning for hdmi (Ville). - Some PPGTT fixes from Ben. - Ring init fixes from Naresh Kumar. - set_cache_level regression fixes for the vma conversion from Ville&Chris. - Conversion to the new dp aux helpers (Jani). - Unification of runtime pm with pc8 support from Paulo, prep work for runtime pm on other platforms than HSW. - Larger cursor sizes (Sagar Kamble). - Piles of improvements and fixes all over, as usual. * tag 'drm-intel-next-2014-03-21' of git://anongit.freedesktop.org/drm-intel: (75 commits) drm/i915: Include a note about the dangers of I915_READ64/I915_WRITE64 drm/i915/sdvo: fix questionable return value check drm/i915: Fix unsafe loop iteration over vma whilst unbinding them drm/i915: Enabling 128x128 and 256x256 ARGB Cursor Support drm/i915: Print how many objects are shared in per-process stats drm/i915: Per-process stats work better when evaluated per-process drm/i915: remove rps local variables drm/i915: Remove extraneous MMIO for RPS drm/i915: Rename and comment all the RPS *stuff* drm/i915: Store the HW min frequency as min_freq drm/i915: Fix coding style for RPS drm/i915: Reorganize the overclock code drm/i915: init pm.suspended earlier drm/i915: update the PC8 and runtime PM documentation drm/i915: rename __hsw_do_{en, dis}able_pc8 drm/i915: kill struct i915_package_c8 drm/i915: move pc8.irqs_disabled to pm.irqs_disabled drm/i915: remove dev_priv->pc8.enabled drm/i915: don't get/put PC8 when getting/putting power wells drm/i915: make intel_aux_display_runtime_get get runtime PM, not PC8 ... Conflicts: drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_dp.c
2014-04-02drm/i915: fix infinite loop at gen6_update_ring_freqPaulo Zanoni
If I boot my Broadwell machine to X on a system with Mesa Gallium llvmpipe instead of i965, then kill X and try to run pm_pc8.c, when we disable PC8 and call gen6_update_ring_freq(), we will get stuck on an infinite loop because the frequencies are zero and the variables are unsigned. This happens because we never ran any batch, so we did not enable RC6, so the variables are zero. If I run gem_exec_nop before running pm_pc8, everything works as expected because gem_exec_nop makes RC6 be enabled. This commit should prevent the infinite loop, which IMHO is already a good reason to be merged, but it is not the proper fix to the "RC6 is not being enabled" problem. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-02drm/i915: only check for irqs_disabled when disabling LCPLLPaulo Zanoni
Because if we keep the current code, we'll get tons of WARNs on Broadwell, since the code is Haswell-specific. We could have also added a Broadwell-specific code there, but it's not really needed since we never disable LCPLL with the hotplug interrupts still enabled. So keep the easy-and-simple-to-maintain solution until we actually need something else. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-02drm/i915: Enabling the TLB invalidate bit in GFX Mode registerAkash Goel
This patch Enables the bit for TLB invalidate in GFX Mode register for Gen7. According to bspec, When enabled this bit limits the invalidation of the TLB only to batch buffer boundaries, to pipe_control commands which have the TLB invalidation bit set and sync flushes. If disabled, the TLB caches are flushed for every full flush of the pipeline. Tested only on vlv platform. Chris has tested on ivb and hsw platforms. v2: Adding the explicit enabling of this bit for all Gen7 platforms instead of only vlv (Chris) Signed-off-by: Akash Goel <akash.goel@intel.com> Signed-off-by: Sourab Gupta <sourab.gupta@intel.com> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> #ivb, hsw -Chris Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Add w/a markers as suggested by Ville.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-02drm/i915: fix command parser debug print format mismatchesJani Nikula
Drop the cast from the pointer diff to fix: drivers/gpu/drm/i915/i915_cmd_parser.c:405:4: warning: format '%td' expects argument of type 'ptrdiff_t', but argument 5 has type 'long unsigned int' [-Wformat] While at it, use %u for u32. Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> [danvet: After conflict resolution only the "While at it, ..." part was left standing ...] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-02drm/i915: Track OACONTROL register enable/disable during parsingBrad Volkin
There is some thought that the data from the performance counters enabled via OACONTROL should only be available to the process that enabled counting. To limit snooping, require that any batch buffer which sets OACONTROL to a non-zero value also sets it back to 0 before the end of the batch. This requires limiting OACONTROL writes to happen via MI_LOAD_REGISTER_IMM so that we can access the value being written. This should be in line with the expected use case for writing OACONTROL. v2: Drop an unnecessary '? true : false' Cc: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-02drm/i915: Refactor cmd parser checks into a functionBrad Volkin
This brings the code a little more in line with kernel coding style. Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-02drm/i915: BUG_ON() when cmd/reg tables are not sortedBrad Volkin
As suggested during review, this makes it much more obvious when the tables are not sorted. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-02drm/i915: Allow i915_pc8_status debug info on BDWZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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