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2021-06-04drm/amd/display: Add DCN3.1 DIONicholas Kazlauskas
Add support for the DIO (Display IO) block of DCN3.1 which controls legacy HDMI/DP stream/link encoding. HW Blocks: +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ Includes some updates to core logic for link encoder assignment and future support for new high bandwidth output. v2: squash in unused variable fix (Alex) Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/display: Add DCN3.1 DCCGNicholas Kazlauskas
Add programming of the DCCG (Display Controller Clock Generator) block: HW Blocks: +--------+ | DCCG | +--------+ Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/display: Add DCN3.1 clock manager supportNicholas Kazlauskas
Adds support for clock requests for the various parts of the DCN3.1 IP and the interfaces and definitions for sending messages to SMU/PMFW. Includes new support for z9/10, detecting SMU timeout and p-state support enablement. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/display: Add DCN3.1 yellow carp asic family IDsNicholas Kazlauskas
[Why & How] To determine whether the chip is yellow carp or not and which revision it is. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: Update atomfirmware for DCN3.1 phy tuning and eDP capsNicholas Kazlauskas
[Why & How] We'll need these in driver for phy tuning in DCN3.1. Multiple eDP support also requires understanding which LCD the backlight curve in atombios is for. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add video_codecs query support for yellow carpJames Zhu
Add video_codecs query support for yellow carp. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: disable manually setting MCLK power level on yellow carpXiaomeng Hou
PMFW provides specific messages for setting fclk freq range thus adjust the power level. There's misusing of these messages when setting dpm mclk. Since actually mclk could adjust automatically complying with fclk, remove standalone support for mclk dpm level setting. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add mode2 reset support for yellow carpAaron Liu
This patch adds mode2 reset support for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add set_performance_level function for yellow carpXiaomeng Hou
This patch enables editing sysfs file power_dpm_force_performance_level for yellow carp. User could thus adjust the dpm forced level. v2: enable fine grain control of GFXCLK only when in manual performance level mode. In other mode, the min/max range of GFXCLK will be reset to corresponding values. Ex: To enable min 300MHz / max 600MHz gfx clocks 1) echo manual > /sys/bus/pci/devices/.../power_dpm_force_performance_level 2) echo s 0 300 > /sys/bus/pci/devices/.../pp_od_clk_voltage 3) echo s 1 600 > /sys/bus/pci/devices/.../pp_od_clk_voltage 4) echo c > /sys/bus/pci/devices/.../pp_od_clk_voltage Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: correct the cu and rb info for yellow carpXiaomeng Hou
Skip disabled sa to correct the cu_info and active_rbs for yellow carp. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Suggested-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add gpu harvest support for yellow carp (v2)Xiaomeng Hou
Register callback in gfxhub functions to program the bypass groups in gc_utcl2 corresponding to harvested SA. v2: update comments (Alex) Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add the interface to dump smu metrics table for yellow carpXiaomeng Hou
This patch is to add the interface to dump smu metrics table for yellow carp. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add callbacks to read/write sysfs file pp_power_profile_modeXiaomeng Hou
Implement the sysfs API for getting/setting pp_power_profile_mode for yellow carp. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add callback get_dpm_ultimate_freq for yellow carpXiaomeng Hou
Add callback function to get the hard frequency range of a clock domain for yellow carp. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add callback to get bootup values for yellow carpXiaomeng Hou
Add get_vbios_bootup_values function to get the bootup values for yellow carp. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: Load TA firmware for yellow carpNicholas Kazlauskas
Add TA firmware to module firmware list for yellow carp and call psp_init_ta_microcode to parse the TA firmware for HDCP support. Cc: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add PrepareMp1ForUnload support for yellow carpAaron Liu
Driver needs to notify the PMFW when the RLC is disabled. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add callback force_clk_levels for yellow carpXiaomeng Hou
Implement the sysfs API to set a range of allowed DPM levels for specific clock domain. v2: return error directly if the specified clock type not supported Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: initialize feature_enabled/feature_support bitmap for yellow carpXiaomeng Hou
Initialize the feature_enabled and feature_supported bitmap for yellow carp. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: implement is_dpm_running() callback for yellow carpXiaomeng Hou
Implement function to check if DPM is running for yellow carp. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add feature map for yellow carpXiaomeng Hou
Add feature map for yellow carp. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add support to get dpm clock value for yellow carpXiaomeng Hou
Implement the sysfs API for getting values of pp dpm clocks(pp_dpm_socclk/mclk/fclk/vclk/dclk) for yellow carp. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add the fine grain tuning function for yellow carpXiaomeng Hou
Use the pp_od_clk_voltage sysfs file to configure the min and max value of gfx clock frequency or to restore the default values. Command guide: echo "s level value" > pp_od_clk_voltage "s" - set the sclk frequency "level" - 0 or 1, "0" represents the min value, "1" represents the max value "value" - the target value of sclk frequency, it should be limited in the safe range echo "r" > pp_od_clk_voltage "r" - reset the sclk frequency, restore the default value echo "c" > pp_od_clk_voltage "c" - commit the min and max value of sclk frequency to the system only after the commit command, the setting target values by "s" command will take effect Example: 1) check the default sclk frequency $ cat pp_od_clk_voltage OD_SCLK: 0: 200Mhz 1: 600Mhz OD_RANGE: SCLK: 200MHz 600MHz 2) use "s" -- set command to configure the min or max sclk frequency $ echo "s 0 300" > pp_od_clk_voltage $ echo "s 1 500" > pp_od_clk_voltage $ echo "c" > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 300Mhz 1: 500Mhz OD_RANGE: SCLK: 200MHz 600MHz 3) use "r" -- reset command to restore the min and max sclk frequency $ echo "r" > pp_od_clk_voltage $ echo "c" > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 200Mhz 1: 600Mhz OD_RANGE: SCLK: 200MHz 600MHz v2: modify the description of reset command usage - need to do "commit" after set the restore command Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add set_watermarks_table function for yellow carpXiaomeng Hou
Add callback function set_watermarks_table for yellow carp. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add read_sensor function for yellow carpXiaomeng Hou
Add callback function read_sensor for yellow carp. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add timestamp counter query support for yellow carpAaron Liu
Allows software to query HW counters to timestamp submissions. This patch can address KFDPerfCountersTest. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: chen gong <curry.gong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add RLC_PG_DELAY_3 for yellow carpAaron Liu
RLC_PG_DELAY_3 is to make RLC in safe mode to prevent any misalignment or conflict in middle of any power feature entry/exit sequence when CGPG feature is enabled. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/pm: support smu_post_init for yellow carpAaron Liu
Add smu_post_init support for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: enable VCN PG and CG for yellow carpAaron Liu
Enable VCN 3.0 PG and CG for Yellow Carp by setting up flags. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: enable vcn dpg mode on yellow carpJames Zhu
Enable vcn dpg mode on yellow carp. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: enable vcn/jpeg on yellow carpJames Zhu
Enable vcn/jpeg IP on yellow carp. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/vcn: add vcn support for yellow carpJames Zhu
Add vcn firmware support for yellow carp Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/jpeg: Remove harvest checking on CHIP_YELLOW_CARPJames Zhu
Register CC_UVD_HARVESTING is obsolete on CHIP_YELLOW_CARP. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amd/pm: add vcn/jepg enable functions for yellow carpHuang Rui
This patch is to add vcn/jepg enable functions to power up/down them with smu messages. VCN/JEPG are poweroff by default. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Tested-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add IH Clock Gating support for yellow carpAaron Liu
IH CG need to be enabled by driver. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add ATHUB Clock Gating support for yellow carpAaron Liu
ATHUB MGCG/MGLS is enabled by default. Adding ATHUB MGCG/MGLS flag to ensure athub mgcg/ls enabled. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add HDP Clock Gating support for yellow carpAaron Liu
HDP MGCG is enabled by default. Adding AMD_CG_SUPPORT_HDP_MGCG to ensure hdp mgcg enabled. HDP MGLS need to be enabled by driver. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add SDMA Clock Gating support for yellow carpAaron Liu
Add AMD_CG_SUPPORT_SDMA_LS support. SDMA MGCG programming is migrated to RLC. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/pm: enable gfx_off in yellow carp smu post initAaron Liu
Enable gfx_off in smu_late_init for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/pm: add gfx_off_control for yellow carpAaron Liu
This patch implements gfx_off_control. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/pm: enable smu_hw_init for yellow carpAaron Liu
This patch is to enable smu_hw_init for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add GFX Power Gating support for yellow carpAaron Liu
Add GFX Power Gating support. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add MMHUB Clock Gating support for yellow carpAaron Liu
Add AMD_CG_SUPPORT_MC_MGCG/AMD_CG_SUPPORT_MC_LS support. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add GFX Clock Gating support for yellow carpAaron Liu
Add below supports: GFX Coarse Grain Clock Gating(CGCG) GFX Coarse grain light sleep/deep sleep(CGLS) GFX Medium Grain Clock Gating(MGCG) GFX Medium Grain light sleep/deep sleep(MGLS) GFX Fine Grain Clock Gating(FGCG) RLC MGLS CP MGLS Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/pm: add set_driver_table_location implementation for yellow carpAaron Liu
This patch adds set_driver_table_location implementation for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu/pm: set_pp_feature is unsupport for yellow carpAaron Liu
For yellow carp, SMU firmware just only supports get_pp_feature. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: enable psp_v13 for yellow carpAaron Liu
This patch enables psp_v13 for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add psp_v13 support for yellow carpAaron Liu
This patch adds psp_v13 support for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: add mmhub client support for yellow carpAlex Deucher
To help debugging GPUVM page faults. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04drm/amdgpu: reserved buffer is not needed with ip discovery enabledAaron Liu
When IP discovery enabled, the reserved buffer has been alloacted. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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