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2022-01-28drm/i915: Clean up M/N register definesVille Syrjälä
Use REG_GENMASK() & co. for the M/N register values. There are also a lot of weird unused defines (eg. *_OFFSET) we can just throw out. Also let's mask out the unused bits during readout for good measure. Previously we only masked out the TU_SIZE from one of the registers, which was a bit too inconsistent for my taste. v2: Mention the readout masking in the commit msg (Jani) Deal wth gvt Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220127120219.20143-1-ville.syrjala@linux.intel.com
2022-01-28drm/i915: Extract intel_{get,set}_m_n()Ville Syrjälä
Make the M/N setup/readout a bit less repitive by extracting a few small helpers. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220127093303.17309-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-27drm/i915/adlp: Fix TypeC PHY-ready status readoutImre Deak
The TCSS_DDI_STATUS register is indexed by tc_port not by the FIA port index, fix this up. This only caused an issue on TC#3/4 ports in legacy mode, as in all other cases the two indices either match (on TC#1/2) or the TCSS_DDI_STATUS_READY flag is set regardless of something being connected or not (on TC#1/2/3/4 in dp-alt and tbt-alt modes). Reported-and-tested-by: Chia-Lin Kao (AceLan) <acelan.kao@canonical.com> Fixes: 55ce306c2aa1 ("drm/i915/adl_p: Implement TC sequences") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4698 Cc: José Roberto de Souza <jose.souza@intel.com> Cc: <stable@vger.kernel.org> # v5.14+ Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220126104356.2022975-1-imre.deak@intel.com
2022-01-26drm/i915: Clean up PIPESRC definesVille Syrjälä
Use REG_GENMASK() & co. when dealing with PIPESRC. Note that i9xx_get_initial_plane_config() will now use the full 16 bit mask whereas previously it used 12 bits only. But intel_get_pipe_src_size() already used the full 16 bits on all platforms anyway, so at least we're consistent now. The high bits beyond the max supported pipe source size should not be set in any case so this seems fine. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up PCH_TRANSCONF/TRANS_DP_CTL bit definesVille Syrjälä
Use REG_BIT & co. for PCH_TRANSCONF/TRANS_DP_CTL bits, and adjust the naming a some bits to be more consistent. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up PIPECONF bit definesVille Syrjälä
Use REG_BIT() & co. for PIPECONF bits, and adjust the naming of various bits to be more consistent. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up SKL_BOTTOM_COLOR definesVille Syrjälä
Use REG_BIT() for SKL_BOTTOM_COLOR. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up PIPEMISC register definesVille Syrjälä
Use REG_BIT() & co. for PIPEMISC* bits, and while at it fill in the missing dithering bits since we already had some of them defined. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Bump DSL linemask to 20 bitsVille Syrjälä
Since tgl PIPE_DSL has 20 bits for the scanline. Let's bump our definition to match. And while at it let's also add the define for the current field readback. We can also get rid of the gen2 vs. gen3+ nonsense since none of the extra bits ever did anything and just always read as zero. And now we extend all platforms to use the tgl+ 20 bits deinition, but again that is fine since all the bits used to be mbz and always read as zero on all the platforms. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Use single_enabled_crtc() in i9xx_update_wm()Ville Syrjälä
Replace the ad-hoc single_enabled_crtc() thing in i9xx_update_wm() with the real thing, just like we do in the other legacy wm functions. We can also nuke the extra 'enabled' variable. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211209144311.3221-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Use the correct plane source width in watermark calculationsVille Syrjälä
Currently we sometimes use the plane destination width, or just the pipe src width as the plane source width in the watermark calculatons. Use the correct thing everywhere. v2: convert ilk cur/fbc cases too Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211209144311.3221-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Fix up pixel_rate vs. clock confusion in wm calculationsVille Syrjälä
Use pixel_rate rather than crtc_clock in the watermark calculations. These are actually identical on gmch platforms for now since we don't adjust the pixel rate based on pfit downscaling. But pixel_rate is the thing we are actually interested here so use the proper name for it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211209144311.3221-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Move dsc/joiner enable into hsw_crtc_enable()Ville Syrjälä
Lift the dsc/joiner enable up from the wonky places where it currently sits (ddi .pre_enable() or icl_ddi_bigjoiner_pre_enable()) into hsw_crtc_enable() where we write the other per-pipe stuff as well. Makes the transcoder vs. pipe split less confusing. For DSI this results in slight reordering between the dsc/joiner enable vs. transcoder timings setup, but I can't really think why that should cause any issues since the transcoder isn't yet enabled at that point. v2: Take care of dsi (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220125063937.7003-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Extract hsw_configure_cpu_transcoder()Ville Syrjälä
Pull the transcoder specific modeset steps into a single place. With bigoiner we need to keep in mind wheher we're dealing with the transcoder or the pipe, and a slightly higher level split makes that easier. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Use per-device debugs for bigjoiner stuffVille Syrjälä
Specify which device we're talking about when spewing bigjoiner debugs. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-3-ville.syrjala@linux.intel.com
2022-01-26drm/i915: Simplify intel_dsc_source_support()Ville Syrjälä
We can simplify the icl check in intel_dsc_source_support() by noting that the only case when DSC is not supported is when using transcoder A. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-2-ville.syrjala@linux.intel.com
2022-01-26drm/i915: Skip dsc readout if the transcoder is disabledVille Syrjälä
Trying to do readout when we don't even have a cpu transcoder is not a great idea. Don't do it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Don't allocate extra ddb during async flip for DG2Stanislav Lisovskiy
In terms of async flip optimization we don't to allocate extra ddb space, so lets skip it. v2: - Extracted min ddb async flip check to separate function (Ville Syrjälä) - Used this function to prevent false positive WARN to be triggered(Ville Syrjälä) v3: - Renamed dg2_need_min_ddb to need_min_ddb thus making it more universal. - Also used DISPLAY_VER instead of IS_DG2(Ville Syrjälä) - Use rate = 0 instead of just setting extra = 0, thus letting other planes to use extra ddb and avoiding WARN (Ville Syrjälä) v4: - Renamed needs_min_ddb as s/needs/use/ to match the wm0 counterpart(Ville Syrjälä) - Added plane->async_flip check to use_min_ddb(now passing plane as a parameter to do that)(Ville Syrjälä) - Account for use_min_ddb also when calculating total data rate (Ville Syrjälä) v5: - Use for_each_intel_plane_on_crtc instead of for_each_intel_plane_id to get plane->async_flip check and account for all planes(Ville Syrjälä) - Fix line wrapping(Ville Syrjälä) - Set plane data rate conditionally, avoiding on redundant assignment (Ville Syrjälä) - Removed redundant whitespace(Ville Syrjälä) - Handle use_min_ddb case in skl_plane_relative_data_rate instead of icl_get_total_relative_data_rate(Ville Syrjälä) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124090653.14547-2-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Use wm0 only during async flips for DG2Stanislav Lisovskiy
This optimization allows to achieve higher perfomance during async flips. For the first async flip we have to still temporarily switch to sync flip, in order to reprogram plane watermarks, so this requires taking into account old plane state's do_async_flip flag. v2: - Removed redundant new_plane_state->do_async_flip check from needs_async_flip_wm_override condition (Ville Syrjälä) - Extract dg2_async_flip_optimization to separate function(Ville Syrjälä) - Check for plane->async_flip instead of plane_id (Ville Syrjälä) v3: - Rename "needs_async_flip_wm_override" to "intel_plane_do_async_flip" and move all the required checks there (Ville Syrjälä) - Rename "dg2_async_flip_optimization" to "use_minimal_wm0_only" (Ville Syrjälä) v4: - Swap new/old_crtc_state in intel_plane_do_async_flip argument list(Ville Syrjälä) - Use plane->base.dev to grab i915 pointer in intel_plane_do_async_flip(Ville Syrjälä) - Remove const modifier from plane parameter in use_minimal_wm0_only(Ville Syrjälä) - Swap also new/old_crtc_state at intel_plane_do_async_flip call site(Ville Syrjälä) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124094929.31722-1-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Introduce do_async_flip flag to intel_plane_stateStanislav Lisovskiy
There might be various logical contructs when we might want to enable async flip, so lets calculate those and set this flag, so that there is no need in long conditions in other places. v2: - Set do_async_flip flag to False, if no async flip needed. Lets not rely that it will be 0-initialized, but set explicitly, so that the logic is clear as well. v3: - Clear do_async_flip in intel_plane_duplicate_state(Ville Syrjälä) - Check with do_async_flip also when calling intel_crtc_{enable,disable}_flip_done(Ville Syrjälä) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124090653.14547-3-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Pass plane to watermark calculation functionsStanislav Lisovskiy
Sometimes we might need to change the way we calculate watermarks, based on which particular plane it is calculated for. Thus it would be convenient to pass plane struct to those functions. v2: Pass plane instead of plane_id v3: Do not pass plane to skl_cursor_allocation(Ville Syrjälä) v4: - Make intel_crtc_get_plane static again(Ville Syrjälä) - s/cursor_plane/plane(Ville Syrjälä) - Pass plane to skl_compute_wm_* instead of plane_id(Ville Syrjälä) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124090653.14547-2-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Introduce ilk_pch_pre_enable()Ville Syrjälä
Complete the ilk pch modeset abstraction by adding ilk_pch_pre_enable(). I did the disable vs. post_disable split already for the disable sequence, but the enable sequence was still left with the naked ilk_fdi_pll_enable() call for some reason. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124193136.2397-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-25drm/i915/overlay: Prevent divide by zero bugs in scalingDan Carpenter
Smatch detected a divide by zero bug in check_overlay_scaling(). drivers/gpu/drm/i915/display/intel_overlay.c:976 check_overlay_scaling() error: potential divide by zero bug '/ rec->dst_height'. drivers/gpu/drm/i915/display/intel_overlay.c:980 check_overlay_scaling() error: potential divide by zero bug '/ rec->dst_width'. Prevent this by ensuring that the dst height and width are non-zero. Fixes: 02e792fbaadb ("drm/i915: implement drmmode overlay support v4") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124122409.GA31673@kili
2022-01-24drm/i915/cdclk: convert to drm device based loggingJani Nikula
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0074a45193873aea0becdf7cc87c0f06754ab706.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/cdclk: update intel_dump_cdclk_config() loggingJani Nikula
Gather some intel_dump_cdclk_config() changes together to avoid extra churn: Rename to intel_cdclk_dump_config() to following naming conventions. Pass in i915. Use i915 for struct drm_device based logging. Switch to KMS drm debug class. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/80469a83a74912ad69c4518d9cc68f07d65e9aaf.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/lspcon: convert to drm device based loggingJani Nikula
Prefer drm device based logging. Do some related dev_priv->i915 and dp->intel_dp renames while at it. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8f83a4de60be1a4a964aa4334204db95d2db3689.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/sprite: convert to drm device based loggingJani Nikula
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f2a3b656c8c63bc9474b5d9cb5b5c018cde28546.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/plane: convert to drm device based logging and WARNJani Nikula
Prefer drm device based logging and WARN. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/9742b56ee0935a6b833f108ca8f72a29935853df.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/dp: convert to drm device based loggingJani Nikula
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b1cffaa70fcc614574f2dce4461e28be7a407e30.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/hotplug: convert to drm device based loggingJani Nikula
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/a8276434c0a899009be05cb987fdbf80d25fd175.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/pps: convert to drm device based loggingJani Nikula
Prefer drm device based logging. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/3caf86f20680478763321e8e3a5fbfa30ab06ec3.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915/snps: convert to drm device based loggingJani Nikula
Prefer drm device based logging. Do some dev_priv->i915 conversions while at it. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ca6908452a63bd74a9c9d75ecd295182c80c7205.1642769982.git.jani.nikula@intel.com
2022-01-24drm/i915: nuke local versions of WARN_ON/WARN_ON_ONCEJani Nikula
In general, we should avoid redefining kernel macros like this. It can get confusing, and what gets used will depend on whether the header is included or not. Moreover, we should prefer drm_WARN_ON() and drm_WARN_ON_ONCE() anyway, which include the stringified error condition in the message. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220121132957.3778555-1-jani.nikula@intel.com
2022-01-24drm/i915: Nuke dg2_ddi_pre_enable_dp()Ville Syrjälä
dg2_ddi_pre_enable_dp() has outlived its usefulness so eliminate it. The one thing that tgl_ddi_pre_enable_dp() is missing that we need is intel_ddi_config_transcoder_dp2(). So we'll bring that over. tgl_ddi_pre_enable_dp() does also have a few things that dg2_ddi_pre_enable_dp() didn't have: - icl_program_mg_dp_mode() -> nop due to intel_phy_is_tc()==false on DG2 - intel_ddi_power_up_lanes() -> nop due to intel_phy_is_combo()==false on DG2 - intel_ddi_mso_configure() -> only matters for MSO panels Another slight difference is that dg2_ddi_pre_enable_dp() was missing a bigjoiner check around intel_dsc_enable(), which tgl_ddi_pre_enable_dp() does have. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220119122150.12941-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-24drm/i915/hdmi: Clean up TMDS clock limit exceeding user mode handlingVille Syrjälä
Currently we just use all the hdmi_deep_color_possible() stuff to compute whether deep color is possible, and leave the 8bpc case to do its own thing. That doesn't mesh super well with 4:2:0 handling because we might end up going for 8bpc RGB without considering that it's essentially illegal and we could instead go for a legal 4:2:0 config. So let's run through all the clock checks even for 8bpc first. If we've fully exhausted all options only then do we re-run the computation for 8bpc while ignoring the downstream TMDS clock limits. This will guarantee that if there's a config that respects all limits we will find it, and if there is not we still allow the user to override the mode manually. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211015133921.4609-7-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-01-24drm/i915: Clean up pre-skl primary plane registersVille Syrjälä
Use REG_BIT() & co. for the pre-skl primary plane registers. Also give everything a consistent namespace. v2: s/DSP/DISP/ to avoid confusion (José) Use DISP_WIDTH rather than DISP_POS_X for DSPSIZE (José) Deal with gvt Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220121113036.23240-2-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-21drm/i915/mst: only ack the ESI we actually handledJani Nikula
Seems odd that we clear all event status indicators if we've only handled some. Only clear the ones we've handled. v2: ack DOWN_REP and UP_REQ only if they were set in esi (Ville) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220120110102.3116218-1-jani.nikula@intel.com
2022-01-21drm/i915/mst: ack sink irq ESI for link status changesJani Nikula
Only specific event status indicators caused the link status to be acked. Be sure to ack the link status change event. Arguably we should track which bits to actually clear in ESI instead of the wholesale approach. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-6-jani.nikula@intel.com
2022-01-21drm/i915/mst: read link status only when requested by sink in ESIJani Nikula
The link service irq vector in DPCD 0x2005 contains the link status changed bit to indicate the status should be checked. Only read and check the link status when requested by the sink. This also reduces the confusion around the buffer size for the combined ESI and link status. Alas, we still need to take into account that all link status helpers expect a buffer of DP_LINK_STATUS_SIZE (6) while the link status in ESI only has 4 bytes. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-5-jani.nikula@intel.com
2022-01-21drm/i915/mst: abstract handling of link status in DP MSTJani Nikula
We'll want to expand on this, so abstract it to a separate function first. Improve debug logging while at it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-4-jani.nikula@intel.com
2022-01-21drm/i915/mst: debug log 4 bytes of ESI right after readingJani Nikula
For whatever reason, the ESI link service irq vector was missing from the debug output. Add the missing byte, clean up the debug message, and do the logging right after reading the data. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-3-jani.nikula@intel.com
2022-01-21drm/i915/mst: abstract intel_dp_ack_sink_irq_esi()Jani Nikula
Smaller functions make the thing easier to read. Debug log failures to ack. Note: Looks like we have the retry loop simply because of hysterical raisins, dating back to the original DP MST enabling. Keep it, though I have no idea why we have it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-2-jani.nikula@intel.com
2022-01-21drm/i915/mst: fix intel_dp_mst_hpd_irq() indentationJani Nikula
Remove extra indentation. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220112110319.1172110-1-jani.nikula@intel.com
2022-01-21drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch]Jani Nikula
Add new files i915_ioctl.[ch] to hold small ioctls that are out of place everywhere else, and not big enough to warrant a file of their own. For starters, it's just for i915_reg_read_ioctl() that's a bit high level for a low level implementation that intel_uncore.[ch] is. Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220120113346.3214745-1-jani.nikula@intel.com
2022-01-20drm/i915/dmc: Eliminate remnant GEN<n> referencesMadhumitha Tolakanahalli Pradeep
Replace GEN<n> with DISPLAY_VER<n>, in line with the naming convention followed in the i915 driver code. Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com> Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211217034141.198033-1-madhumitha.tolakanahalli.pradeep@intel.com
2022-01-20drm/i915: Clean up vlv/chv sprite plane registersVille Syrjälä
Use REG_BIT() & co. to polish the vlv/chv sprite plane registers. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-10-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2022-01-20drm/i915/hdmi: Ignore DP++ TMDS clock limit for native HDMI portsVille Syrjälä
Lots of machines these days seem to have a crappy type1 DP dual mode adaptor chip slapped onto the motherboard. Based on the DP dual mode spec we currently limit those to 165MHz max TMDS clock. Windows OTOH ignores DP dual mode adaptors when the VBT indicates that the port is not actually DP++, so we can perhaps assume that the vendors did intend that the 165MHz clock limit doesn't apply here. Though it would be much nicer if they actually declared an explicit limit through VBT, but that doesn't seem to be happening either. So in order to match Windows behaviour let's ignore the DP dual mode adaptor's TMDS clock limit for ports that don't look like DP++ in VBT. Unfortunately many older VBTs misdelcare their DP++ ports as just HDMI (eg. ILK Dell Latitude E5410) or DP (eg. SNB Lenovo ThinkPad X220). So we can't really do this universally without risking black screens. I suppose a sensible cutoff is HSW+ since that's when 4k became a thing and one might assume that the machines have been tested to work with higher TMDS clock rates. v2: s/IS_BROADWELL/IS_HASWELL/ Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211222161738.12478-1-ville.syrjala@linux.intel.com
2022-01-20drm/i915/bios: Nuke DEVICE_TYPE_DP_DUAL_MODE_BITSVille Syrjälä
Replace the DEVICE_TYPE_DP_DUAL_MODE_BITS stuff with just a DP+HDMI check. The rest of the bits shouldn't really matter anyway. The slight change in behaviour here is that now we do look at the DEVICE_TYPE_NOT_HDMI_OUTPUT bit (via intel_bios_encoder_supports_hdmi()) when we previously ignored it. The one platform we know that has problems with that bit is VLV. But IIRC the problem was always that buggy VBTs basically never set that bit. So that should be OK since all it would do is make all DVI ports look like HDMI ports instead. Also can't imagine there are many VLV machines with actual DVI ports in existence. We still keep the rest of the dvo_port/aux_ch checks as we can't trust that DP+HDMI device type equals DP++ due to buggy VBTs. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-20drm/i915/bios: Throw out the !has_ddi_port_info() codepathsVille Syrjälä
Now that we parse the DDI port info from the VBT on all g4x+ platforms we can throw out all the old codepaths in intel_bios_is_port_present(), intel_bios_is_port_edp() and intel_bios_is_port_dp_dual_mode(). None of these should be called on pre-g4x platforms. For good measure throw in a WARN into intel_bios_is_port_present() should someone get the urge to call it on older platforms. The other two functions are specific to HDMI and DP so should not need any protection as those encoder types don't even exist on older platforms. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-20drm/i915/bios: Use i915->vbt.ports[] for all g4x+Ville Syrjälä
Extend the vbt.ports[] stuff for all g4x+ platforms. We do need to drop the version check as some elk/ctg machines may have VBTs older than that. The oldest I know is an elk with version 142. But the child device stuff has had the correct size since at least version 125 (observed on my sdg), so from that angle this should be totally safe. This does couple of things: - Start using the aux_ch/ddc_pin from VBT instead of just the hardcoded defaults. Hopefully there are no VBTs with entirely bogus information here. - Start using i915->vbt.ports[] for intel_bios_is_port_dp_dual_mode(). Should be fine as the logic doesn't actually change. - Start using i915->vbt.ports[] for intel_bios_is_port_edp(). The old codepath only looks at the DP DVO ports, the new codepath looks at both DP and HDMI DVO ports. In principle that should not matter. We also stop looking at some of the other device type bits (eg. LVDS,MIPI,ANALOG,etc.). Hopefully no VBT is broken enough that it sets up totally conflicting device type bits (eg. LVDS+eDP at the same time). We also lose the "g4x->no eDP ever" hardcoding (shouldn't be hard to re-introduce that into eg. sanitize_device_type() if needed). Lightly smoke tested on a set of machines (one of ctg,ilk,snb,ivb each) with both DP and HDMI (DP++). Everything still worked as it should. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211217155403.31477-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-30 06:32:55 +0000