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2012-11-06ARM: shmobile: r8a7779: add HSPI clock supportKuninori Morimoto
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-06ARM: shmobile: r8a7740: fixup DT machine desc name typoKuninori Morimoto
r8a7740 machine desc name should be R8A7740, not SH7372 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-06ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_modeBastian Hecht
We can remove the extra code of modify_scu_cpu_psr() and use the cleaner generic ARM helper scu_power_mode(). As every CPU only deals with its own power register and scu_power_mode() operates with 8-bit accesses, we save the locking overhead too. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-06ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_modeBastian Hecht
We can remove the extra code of modify_scu_cpu_psr() and use the cleaner generic ARM helper scu_power_mode(). As every CPU only deals with its own power register and scu_power_mode() operates with 8-bit accesses, we save the locking overhead too. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-06ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_modeBastian Hecht
We can remove the extra code of modify_scu_cpu_psr() and use the cleaner generic ARM helper scu_power_mode(). As every CPU only deals with its own power register and scu_power_mode() operates with 8-bit accesses, we save the locking overhead too. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-06ARM: shmobile: Remove SH7377 supportNobuhiro Iwamatsu
This is old CPU of shmobile, and the machine by which this CPU is used cannot be obtained. Therefore, remove SH7377 support. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-06ARM: shmobile: Remove SH7367 supportNobuhiro Iwamatsu
This is old CPU of shmobile, and the machine by which this CPU is used cannot be obtained. Therefore, remove SH7367 support. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-06modules: don't break modules_install on external modules with no key.Rusty Russell
The script still spits out an error ("Can't read private key") but we don't break modules_install. Reported-by: Bruno Wolff III <bruno@wolff.to> Original-patch-by: Josh Boyer <jwboyer@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2012-11-05PCI/portdrv: Don't create hotplug slots unless port supports hotplugTaku Izumi
Commit 2dcfaf85 mistakenly dropped the "flags & PCI_EXP_FLAGS_SLOT" test, so now we create hotplug slots even for PCIe port devices that don't support hotplug. This patch fixes this problem. [bhelgaas: changelog] Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org> Reviewed-by: Jiang Liu <jiang.liu@huawei.com>
2012-11-05Merge branch 'pci/huang-d3cold-fixes' into for-linusBjorn Helgaas
* pci/huang-d3cold-fixes: PCI/PM: Fix proc config reg access for D3cold and bridge suspending PCI/PM: Resume device before shutdown PCI/PM: Fix deadlock when unbinding device if parent in D3cold
2012-11-05hwmon: Fix chip feature table headersJean Delvare
These got broken by recent patches fixing checkpatch warnings in these drivers. The trick is that the patches themselves looked good, but the source files after applying them do not. That's why I am not a big fan of using tabs inside comments. Signed-off-by: Jean Delvare <khali@linux-fr.org> Acked-by: Guenter Roeck <linux@roeck-us.net>
2012-11-05hwmon: (w83627ehf) Force initial bank selectionJean Delvare
Don't assume bank 0 is selected at device probe time. This may not be the case. Force bank selection at first register access to guarantee that we read the right registers upon driver loading. Signed-off-by: Jean Delvare <khali@linux-fr.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Cc: stable@vger.kernel.org
2012-11-05ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dtLaxman Dewangan
Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30 board dt files. Set the parent clock of slink controller to PLLP and configure clock to 100MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: common: using OF api for L2 cache initJoseph Lo
Moving L2 cache init to DT support. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: dt: add L2 cache controllerJoseph Lo
Add L2 cache controller binding into DT for Tegra. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra30: clocks: add AHB and APB clocksJoseph Lo
Adding the AHB and APB bus clock for Tegra30. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: set up wlan clocks for tegra dtWei Ni
Set up the wlan clock tree for Tegra20 and Tegra30. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move irammap.h to mach-tegraStephen Warren
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../irammap.h" becaue of this change. Both these usages will be removed shortly, when Tegra's DEBUG_LL implementation is updated not to pass information through IRAM. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move iomap.h to mach-tegraStephen Warren
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: remove <mach/dma.h>Stephen Warren
Remove includes of <mach/dma.h> from sound/soc; nothing from it is used. Remove include of <mach/dma.h> from mach-tegra/apbio.c; since the DMA transfers made by this file don't need flow-control with any peripheral, there's no need to set any slave ID. Once those changes are made, there are no remaining users of <mach/dma.h> so remove it. Drivers should get this information from device tree. This removal is necessary for single zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-11-05ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/Stephen Warren
We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible to enable single zImage. Move tegra-ahb.h to a more central location (suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c include the header to ensure client and provider agree on the prototype. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: remove unnecessary includes of <mach/*.h>Stephen Warren
This should make it easier to delete or move <mach/*.h>; something that is useful for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05iommu: tegra: remove include of <mach/iomap.h>Stephen Warren
Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joerg Roedel <joerg.roedel@amd.com>
2012-11-05staging: nvec: remove include of <mach/iomap.h>Stephen Warren
Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Marc Dietrich <marvin24@gmx.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-05crypto: tegra: remove include of <mach/clk.h>Stephen Warren
Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-05ARM: tegra: update *.dts for regulator-compatible deprecationStephen Warren
Commit 13511de "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-11-05usb: phy: tegra remove include of <mach/iomap.h>Stephen Warren
Almost nothing from this file is used, and the file will hopefully be deleted soon. Copy the tiny portions that are used directly into tegra_usb_phy.c. I believe that Venu Byravarasu is working on cleaning up our USB driver, and those cleanups will remove the need for these constants. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-05usb: host: tegra remove include of <mach/iomap.h>Stephen Warren
Almost nothing from this file is used, and the file will hopefully be deleted soon. Copy the tiny portions that are used directly into ehci-tegra.c. I believe that Venu Byravarasu is working on cleaning up our USB driver, and those cleanups will remove the need for these constants. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-11-05PCI/PM: Fix proc config reg access for D3cold and bridge suspendingHuang Ying
In https://bugzilla.kernel.org/show_bug.cgi?id=48981 Peter reported that /proc/bus/pci/??/??.? does not work for 3.6. This is because the device configuration space registers are not accessible if the corresponding parent bridge is suspended or the device is put into D3cold state. This is the same as /sys/bus/pci/devices/0000:??:??.?/config access issue. So the function used to solve sysfs issue is used to solve this issue. This patch moves pci_config_pm_runtime_get()/_put() from pci/pci-sysfs.c to pci/pci.c and makes them extern so they can be used by both the sysfs and proc paths. [bhelgaas: changelog, references, reporters] Reference: https://bugzilla.kernel.org/show_bug.cgi?id=48981 Reference: https://bugzilla.kernel.org/show_bug.cgi?id=49031 Reported-by: Forrest Loomis <cybercyst@gmail.com> Reported-by: Peter <lekensteyn@gmail.com> Reported-by: Micael Dias <kam1kaz3@gmail.com> Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> CC: stable@vger.kernel.org # v3.6+
2012-11-05ARM: implement debug_ll_io_init()Rob Herring
When using DEBUG_LL, the UART's (or other HW's) registers are mapped into early page tables based on the results of assembly macro addruart. Later, when the page tables are replaced, the same virtual address must remain valid. Historically, this has been ensured by using defines from <mach/iomap.h> in both the implementation of addruart, and the machine's .map_io() function. However, with the move to single zImage, we wish to remove <mach/iomap.h>. To enable this, the macro addruart may be used when constructing the late page tables too; addruart is exposed as a C function debug_ll_addr(), and used to set up the required mapping in debug_ll_io_init(), which may called on an opt-in basis from a machine's .map_io() function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> [swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-05ARM: vexpress: Remove motherboard dependencies in the DTS filesPawel Moll
The way the VE motherboard Device Trees were constructed enforced naming and structure of daughterboard files. This patch makes it possible to simply include the motherboard description anywhere in the main Device Tree and retires the "arm,v2m-timer" alias - any of the motherboard SP804 timers will be used instead. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-11-05ARM: vexpress: Start using new Versatile Express infrastructurePawel Moll
This patch starts using all the configuration infrastructure. - generic GPIO library is forced now - sysreg GPIOs are used as MMC CD and WP information sources; thanks to this MMCI auxiliary data is not longer necessary - DVI muxer and mode control is removed from non-DT V2P-CA9 code as this is now handled by the vexpress-dvi driver - clock generators control is removed as is being handled by the common clock driver now - the sysreg and sysctl control is now delegated to the appropriate drivers and all related code was removed - NOR Flash set_vpp function has been removed as the control bit used does _not_ control its VPP line, but the #WP signal instead (which is de facto unusable in case of Linux MTD drivers); this also allowed the remove its DT auxiliary data The non-DT code defines only minimal required number of the config devices. Device Trees are updated to make use of all new features. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-11-05ARM: vexpress: Add config bus components and clocks to DTsPawel Moll
Add description of all functions provided by Versatile Express motherboard and daughterboards configuration controllers and clock dependencies between devices. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-11-05mfd: Versatile Express system registers driverPawel Moll
This is a platform driver for Versatile Express' "system register" block. It's a random collection of registers providing the following functionality: - low level platform functions like board ID access; in order to use those, the driver must be initialized early, either statically or based on the DT - config bus bridge via "system control" interface; as the response from the controller does not generate interrupt (yet), the status register is periodically polled using a timer - pseudo GPIO lines providing MMC card status and Flash WP# signal control - LED interface for a set of 8 LEDs on the motherboard, with "heartbeat", "mmc0" and "cpu0" to "cpu5" as default triggers Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-11-05mfd: Versatile Express config infrastructurePawel Moll
Versatile Express platform has an elaborated configuration system, consisting of microcontrollers residing on the mother- and daughterboards known as Motherboard/Daughterboard Configuration Controller (MCC and DCC). The controllers are responsible for the platform initialization (reset generation, flash programming, FPGA bitfiles loading etc.) but also control clock generators, voltage regulators, gather environmental data like temperature, power consumption etc. Even the video output switch (FPGA) is controlled that way. Those devices are _not_ visible in the main address space and the usual communication channel uses some kind of a bridge in the peripheral block sending commands (requests) to the controllers and receiving responses. It can take up to 500 microseconds for a transaction to be completed, therefore it is important to provide a non-blocking interface to it. This patch adds an abstraction of this infrastructure. Bridge drivers can register themselves with the framework. Then, a driver of a device can request an abstract "function" - the request will be redirected to a bridge referred by thedd "arm,vexpress,config-bridge" property of the device tree node. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-11-05Merge tag 'v3.7-rc4' into upstream-masterCatalin Marinas
Linux 3.7-rc4
2012-11-05cifs: Do not lookup hashed negative dentry in cifs_atomic_openSachin Prabhu
We do not need to lookup a hashed negative directory since we have already revalidated it before and have found it to be fine. This also prevents a crash in cifs_lookup() when it attempts to rehash the already hashed negative lookup dentry. The patch has been tested using the reproducer at https://bugzilla.redhat.com/show_bug.cgi?id=867344#c28 Cc: <stable@kernel.org> # 3.6.x Reported-by: Vit Zahradka <vit.zahradka@tiscali.cz> Signed-off-by: Sachin Prabhu <sprabhu@redhat.com>
2012-11-05ALSA: hda - Force to reset IEC958 status bits for AD codecsTakashi Iwai
Several bug reports suggest that the forcibly resetting IEC958 status bits is required for AD codecs to get the SPDIF output working properly after changing streams. Original fix credit to Javeed Shaikh. BugLink: https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/359361 Reported-by: Robin Kreis <r.kreis@uni-bremen.de> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-11-05pinctrl: SPEAr1340: Add clcd sleep mode pin configurationVipul Kumar Samar
CLCD pads must be configured differently for sleep mode. This patch adds support for clcd_sleep_pingroup. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr1340: Make DDR reset & clock pads as gpioDeepak Sikri
Some gpio pins are used to control DDR reset and clock enable while the system is moved into Low power. This patch adds in the corresponding GPIO entries in the pads_as_gpio_pins to ensure the pads are available as gpio's. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr1310: add register entries for enabling pad directionShiraz Hashim
Pad direction must also be updated for SPEAr1310, while setting pads values. This patch adds support for that. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr1310: Separate out pci pins from pcie_sata pin groupVipul Kumar Samar
SPEAr1310 has separate PCI and PCIe implementations which are not muxed with each other. Presently they have been implemented as muxed together with SATA and are represented wrongly in the software. In reality only PCIe and SATA implementations are muxed with each other. This patch separates out pci pins creating a new pingroup and function for pci. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr1310: Fix value of PERIP_CFG reigster and MCIF_SEL_SHIFTVipul Kumar Samar
This patch fixes two macros: PERIP_CFG registers offset and MCIF selection shift. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr1310: fix clcd high resolution pin group nameShiraz Hashim
All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the same for clcd_high_res_grp. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr320: Correct pad mux entries for rmii/smiiDeepak Sikri
pin entries of rmii and smii are interchanged by mistake. Fix it. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr3xx: correct register space to configure pwmShiraz Hashim
To have pwm on pad no. 34 we also need to select between pwm and SD_LED functions. Add this to pwm pin mux register configuration. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05pinctrl: SPEAr: Don't update all non muxreg bits on pinctrl_disableViresh Kumar
Not all bits of a register are used for pinctrl in SPEAr. So only update bits relevant to pinctrl using muxreg->mask. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05ALSA: es1968: Add ESS vendor ID to pm_whitelistOndrej Zary
Add generic ESS vendor ID to pm_whitelist. This should fix suspend on all Maestro-2 and Maestro-2E based PCI cards. Tested on Terratec DMX and SF64-PCE2. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-11-05ALSA: HDA: Mark CS260x immutable structures constDaniel J Blueman
Mark structures that won't change const. Signed-off-by: Daniel J Blueman <daniel@quora.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-11-05ALSA: HDA: Fix digital microphone on CS420xDaniel J Blueman
Correctly enable the digital microphones with the right bits in the right coeffecient registers on Cirrus CS4206/7 codecs. It also prevents misconfiguring ADC1/2. This fixes the digital mic on the Macbook Pro 10,1/Retina. Based-on-patch-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Daniel J Blueman <daniel@quora.org> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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