summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2021-01-11drm/amd/pm/powerplay/hwmgr/vega20_hwmgr: Fix legacy function header formattingLee Jones
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_hwmgr.c:781: warning: Function parameter or member 'hwmgr' not described in 'vega20_init_smc_table' Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/pm/powerplay/hwmgr/vega12_hwmgr: Fix legacy function header formattingLee Jones
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_hwmgr.c:728: warning: Function parameter or member 'hwmgr' not described in 'vega12_init_smc_table' Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/pm/powerplay/hwmgr/ppatomctrl: Fix documentation for 'mpll_param'Lee Jones
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:290: warning: Function parameter or member 'mpll_param' not described in 'atomctrl_get_memory_pll_dividers_si' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:290: warning: Excess function parameter 'dividers' description in 'atomctrl_get_memory_pll_dividers_si' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:339: warning: Function parameter or member 'mpll_param' not described in 'atomctrl_get_memory_pll_dividers_vi' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:339: warning: Excess function parameter 'dividers' description in 'atomctrl_get_memory_pll_dividers_vi' Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0: Provide description of ↵Lee Jones
'call_back_func' Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/process_pptables_v1_0.c:1371: warning: Function parameter or member 'call_back_func' not described in 'get_powerplay_table_entry_v1_0' Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/amdgpu/vega20_ih: Add missing descriptions for 'ih' and fix spelling ↵Lee Jones
error Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/vega20_ih.c:378: warning: Function parameter or member 'ih' not described in 'vega20_ih_get_wptr' drivers/gpu/drm/amd/amdgpu/vega20_ih.c:421: warning: Function parameter or member 'ih' not described in 'vega20_ih_irq_rearm' drivers/gpu/drm/amd/amdgpu/vega20_ih.c:447: warning: Function parameter or member 'ih' not described in 'vega20_ih_set_rptr' Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Cc: Feifei Xu <Feifei.Xu@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/amdgpu/amdgpu_ih: Update 'amdgpu_ih_decode_iv_helper()'s function headerLee Jones
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c:220: warning: Function parameter or member 'ih' not described in 'amdgpu_ih_decode_iv_helper' drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c:220: warning: Function parameter or member 'entry' not described in 'amdgpu_ih_decode_iv_helper' Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Felix Kuehling <Felix.Kuehling@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amdgpu: Add missing BOOTUP_DEFAULT to profile_name[]Colin Ian King
A recent change added a new BOOTUP_DEFAULT power profile mode to the PP_SMC_POWER_PROFILE enum but omitted updating the corresponding profile_name array. Fix this by adding in the missing BOOTUP_DEFAULT to profile_name[]. Addresses-Coverity: ("Out-of-bounds read") Fixes: c27c9778a19e ("drm/amd/powerplay: support BOOTUP_DEFAULT power profile mode") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11MAINTAINERS: update radeon/amdgpu/amdkfd git treesAlex Deucher
FDO is out of space, so move to gitlab. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amd/display: tweak the kerneldoc for active_vblank_irq_countLukas Bulwahn
Commit 71338cb4a7c2 ("drm/amd/display: enable idle optimizations for linux (MALL stutter)") adds active_vblank_irq_count to amdgpu_display_manager in ./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h. The kerneldoc is incorrectly formatted, and make htmldocs warns: ./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h: 340: warning: Incorrect use of kernel-doc format: * @active_vblank_irq_count 379: warning: Function parameter or member 'active_vblank_irq_count' not described in 'amdgpu_display_manager' Tweak the kerneldoc for active_vblank_irq_count. Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11drm/amdgpu: enable gpu recovery for navy_flounderJiansong Chen
Enable gpu recovery for navy_flounder by default to trigger reset once needed. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08drm/amdgpu: fix DRM_INFO flood if display core is not supported (bug 210921)Alexandre Demers
This fix bug 210921 where DRM_INFO floods log when hitting an unsupported ASIC in amdgpu_device_asic_has_dc_support(). This info should be only called once. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=210921 Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-01-08drm/amdgpu/display: fix build with CONFIG_DRM_AMD_DC_DCN disabledAlex Deucher
dc_allow_idle_optimizations() needs to be protected by CONFIG_DRM_AMD_DC_DCN. Fixes: 71338cb4a7c2 ("drm/amd/display: enable idle optimizations for linux (MALL stutter)") Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08drm/amd/pm: modify the fine grain tuning function for RenoirXiaojian Du
This patch is to improve the fine grain tuning function for Renoir. The fine grain tuning function uses the sysfs node -- pp_od_clk_voltage to config gfxclk. Meanwhile, another sysfs node -- power_dpm_force_perfomance_level also affects the gfx clk. It will cause confusion when these two sysfs nodes works together. And the flag "od_enabled" is used to control the overdrive function for dGPU, like navi10, navi14 and navi21. APU like Renior or Vangogh uses this "od_enabled" to configure the frequency range of gfx clock, but the max value of frequency range will not be higher than the safe limit, it is not "overdrive". So this patch adds two new flags -- "fine_grain_enabled" and "fine_grain_started" to avoid this confusion, the flag will make these two sysfs nodes work separately. The flag "fine_grain_enabled" is set as "enabled" by default, so the fine grain tuning function will be enabled by default. But the flag "fine_grain_started" is set as "false" by default, so the fine grain function will not take effect until it is set as "true". Only when power_dpm_force_perfomance_level is changed to "manual" mode, the flag "fine_grain_started" will be set as "true", and the fine grain tuning function will be started. In other profile modes, including "auto", "high", "low", "profile_peak", "profile_standard", "profile_min_sclk", "profile_min_mclk", the flag "fine_grain_started" will be set as "false", and the od range of fine grain tuning function will be restored default value. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08drm/amd/pm: add the parameters of power profiles for vangoghXiaojian Du
This pacth is to add the parameters of power profiles for vangogh, includeing "profile_peak", "profile_standard", "profile_min_sclk", "profile_min_mclk". Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08drm/amdgpu/psp: fix psp gfx ctrl cmdsVictor Zhao
psp GFX_CTRL_CMD_ID_CONSUME_CMD different for windows and linux, according to psp, linux cmds are not correct. v2: only correct GFX_CTRL_CMD_ID_CONSUME_CMD. Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Reviewed-by: Emily.Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08drm/amdkfd: check more client ids in interrupt handlerTao Zhou
Add check for SExSH clients in kfd interrupt handler. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08drm/amdgpu: Correct the read sclk for navi10Emily.Deng
According to hw, after navi10,it runs in dfll mode, and should read sclk from AverageGfxclkFrequency. Signed-off-by: Emily.Deng <Emily.Deng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08drm/amdgpu: Add new mode 2560x1440Emily.Deng
Add one more 2k resolution which appears frequently in market. Signed-off-by: Emily.Deng <Emily.Deng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-06Revert "drm/amd/display: Fix memory leaks in S3 resume"Alex Deucher
This reverts commit a135a1b4c4db1f3b8cbed9676a40ede39feb3362. This leads to blank screens on some boards after replugging a display. Revert until we understand the root cause and can fix both the leak and the blank screen after replug. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=211033 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1427 Cc: Stylon Wang <stylon.wang@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Andre Tomt <andre@tomt.net> Cc: Oleksandr Natalenko <oleksandr@natalenko.name> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-01-05drm/amdgpu: Add check to prevent IH overflowDefang Bo
Similar to commit <b82175750131>("drm/amdgpu: fix IH overflow on Vega10 v2"). When an ring buffer overflow happens the appropriate bit is set in the WPTR register which is also written back to memory. But clearing the bit in the WPTR doesn't trigger another memory writeback. So what can happen is that we end up processing the buffer overflow over and over again because the bit is never cleared. Resulting in a random system lockup because of an infinite loop in an interrupt handler. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Defang Bo <bodefang@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu/display: drop DCN support for aarch64Alex Deucher
From Ard: "Simply disabling -mgeneral-regs-only left and right is risky, given that the standard AArch64 ABI permits the use of FP/SIMD registers anywhere, and GCC is known to use SIMD registers for spilling, and may invent other uses of the FP/SIMD register file that have nothing to do with the floating point code in question. Note that putting kernel_neon_begin() and kernel_neon_end() around the code that does use FP is not sufficient here, the problem is in all the other code that may be emitted with references to SIMD registers in it. So the only way to do this properly is to put all floating point code in a separate compilation unit, and only compile that unit with -mgeneral-regs-only." Disable support until the code can be properly refactored to support this properly on aarch64. Acked-by: Will Deacon <will@kernel.org> Reported-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: enable ras eeprom support for sienna cichlidJohn Clements
added I2C address and asic support flag Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: fix no bad_pages issue after umc ue injectionDennis Li
old code wrongly used the bad page status as the function return value, which cause amdgpu_ras_badpages_read always return failed. Signed-off-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: fix potential memory leak during navi12 deinitializationJiawei Gu
Navi12 HDCP & DTM deinitialization needs continue to free bo if already created though initialized flag is not set. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Jiawei Gu <Jiawei.Gu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Enable fp16 also on DCE-8/10/11.Mario Kleiner
The hw supports fp16, this is not only useful for HDR, but also for standard dynamic range displays, because it allows to get more precise color reproduction with about 11 - 12 bpc linear precision in the unorm range 0.0 - 1.0. Working fp16 scanout+display (and HDR over HDMI) was verified on a DCE-8 asic, so i assume that the more recent DCE-10/11 will work equally well, now that format-specific plane scaling constraints are properly enforced, e.g., the inability of fp16 to scale on older hw like DCE-8 to DCE-11. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Check plane scaling against format specific hw plane caps.Mario Kleiner
This takes hw constraints specific to pixel formats into account, e.g., the inability of older hw to scale fp16 format framebuffers. It should now allow safely to enable fp16 formats also on DCE-8, DCE-10, DCE-11.0 Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: take runtime pm reference when we attach a bufferAlex Deucher
And drop it when we detach. If the shared buffer is in vram, we need to make sure we don't put the device into runtime suspend. Acked-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Create and Destroy PSR resources for DCN302Joshua Aberback
We need these to support PSR on DCN302 Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: enable idle optimizations for linux (MALL stutter)Bhawanpreet Lakha
[Why] We can only use this feature when the display is idle. When active vblank irq count is 0 we know all the displays are idle. [How] -Add a active vblank irq counter -Update the counter when we enable/disable vblank irq -if vblank irq count is 0 we can consider mall stutter Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nick Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Update idle optimization handlingJoshua Aberback
[How] - use dc interface instead of hwss interface in cursor functions, to keep dc->idle_optimizations_allowed updated - add dc interface to check if idle optimizations might apply to a plane Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: Fix unused variable warningArnd Bergmann
Some of the newly added code is hidden inside of #ifdef blocks, but one variable is unused when debugfs is disabled: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:8370:8: error: unused variable 'configure_crc' [-Werror,-Wunused-variable] Change the #ifdef to an if(IS_ENABLED()) check to fix the warning and avoid adding more #ifdefs. Fixes: c920888c604d ("drm/amd/display: Expose new CRC window property") Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: fix comparison pointer to bool warning in dc.cTian Tao
Fixes coccicheck warning: drivers/gpu/drm/amd/display/dc/core/dc.c:1543:12-19: WARNING: Comparison to bool drivers/gpu/drm/amd/display/dc/core/dc.c:1496:14-42: WARNING: Comparison to bool drivers/gpu/drm/amd/display/dc/core/dc.c:971:15-48: WARNING: Comparison to bool drivers/gpu/drm/amd/display/dc/core/dc.c:976:15-44: WARNING: Comparison to bool Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: Fix macro name _AMDGPU_TRACE_H_ in preprocessor if conditionChenyang Li
Add an underscore in amdgpu_trace.h line 24 "_AMDGPU_TRACE_H". Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Chenyang Li <lichenyang@loongson.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05gpu/drm/radeon: use DIV_ROUND_UP macro to do calculationZheng Yongjun
Don't open-code DIV_ROUND_UP() kernel macro. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: remove useless else ifTian Tao
Fix the following coccinelle report: drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c:1357:6-8: WARNING: possible condition with no effect (if == else) Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/display: remove unused including <linux/version.h>Tian Tao
Remove including <linux/version.h> that don't need it. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/pm: improve the fine grain tuning function for RV/RV2/PCOXiaojian Du
This patch is to improve the fine grain tuning function for RV/RV2/PCO. The fine grain tuning function uses the sysfs node -- pp_od_clk_voltage to config gfxclk. Meanwhile, another sysfs node -- power_dpm_force_perfomance_level also affects the gfx clk. It will cause confusion when these two sysfs nodes works together. So this patch adds one flag to avoid this confusion, the flag will make these two sysfs nodes work separately. The flag is set as "disabled" by default, so the fine grain tuning function will be disabled by default. Only when power_dpm_force_perfomance_level is changed to "manual" mode, the flag will be set as "enabled", and the fine grain tuning function will be enabled. In other profile modes, including "auto", "high", "low", "profile_peak", "profile_standard", "profile_min_sclk", "profile_min_mclk", the flag will be set as "disabled", and the od range of fine grain tuning function will be restored default value. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/pm: enable dclk/vclk dpm function in "auto" power profile for vangoghXiaojian Du
This patch is to enable dclk/vclk dpm function in "auto" power profile for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: do optimization for psp command submitpengzhou
In the psp command submit logic, the function msleep(1) delayed too long, Changing it to usleep_range(10, 100) to have a better performance. Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: Emily.Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/pm: fix the failure when change power profile for renoirXiaojian Du
This patch is to fix the failure when change power profile to "profile_peak" for renoir. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: remove redundant include of navi10_enumLikun Gao
Remove unnecessary include of navi10_enum header file. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: remove redundant logic related HDPLikun Gao
Remove hdp_flush function from amdgpu_nbio struct as it have been unified into hdp struct. Remove the include about hdp register which was not used. V2: Remove hdp golden setting which is unnecessary. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: switch hdp callback functions for hdp v5Likun Gao
Switch to use the HDP functions which unified on hdp structure instead of the scattered hdp callback functions. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: switch hdp callback functions for hdp v4Likun Gao
Switch to use the HDP functions which unified on hdp structure instead of the scattered hdp callback functions. V2: clean up hdp reset ras error count function. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: add hdp version 5 functionsLikun Gao
Unify hdp related function into hdp structure for hdp version 5. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: add hdp version 4 functionsLikun Gao
Unify hdp related function into hdp structure for hdp version 4. V2: Add function to remap hdp registers for nbio version 6.1 Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: add amdgpu_hdp structureHawking Zhang
amdgpu_hdp hold all the callbacks for hdp Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: fix potential NULL pointer when check_atom_bios() failsJiawei Gu
Asic funcs pointer needs being checked whether is NULL. Because when check_atom_bios() fails in req_init_data handshake, asic funcs pointer is not initialized yet. Signed-off-by: Jiawei Gu <Jiawei.Gu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amdgpu: use GTT for uvd_get_create/destory_msgChen Li
On modern gpus, GTT (system memory) works as well here, and this may also be a workaround for platforms which cannot map vram correctly. Signed-off-by: chenli <chenli@uniontech.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/radeon: use writel to avoid gcc optimization v3Chen Li
When using e8860(gcn1) on arm64, the kernel crashed on drm/radeon: [ 11.240414] pc : __memset+0x4c/0x188 [ 11.244101] lr : radeon_uvd_get_create_msg+0x114/0x1d0 [radeon] [ 11.249995] sp : ffff00000d7eb700 [ 11.253295] x29: ffff00000d7eb700 x28: ffff8001f632a868 [ 11.258585] x27: 0000000000040000 x26: ffff00000de00000 [ 11.263875] x25: 0000000000000125 x24: 0000000000000001 [ 11.269168] x23: 0000000000000000 x22: 0000000000000005 [ 11.274459] x21: ffff00000df24000 x20: ffff8001f74b4000 [ 11.279753] x19: 0000000000124000 x18: 0000000000000020 [ 11.285043] x17: 0000000000000000 x16: 0000000000000000 [ 11.290336] x15: ffff000009309000 x14: ffffffffffffffff [ 11.290340] x13: ffff0000094b6f88 x12: ffff0000094b6bd2 [ 11.290343] x11: ffff00000d7eb700 x10: ffff00000d7eb700 [ 11.306246] x9 : ffff00000d7eb700 x8 : ffff00000df2402c [ 11.306254] x7 : 0000000000000000 x6 : ffff0000094b626a [ 11.306257] x5 : 0000000000000000 x4 : 0000000000000004 [ 11.306262] x3 : ffffffffffffffff x2 : 0000000000000fd4 [ 11.306265] x1 : 0000000000000000 x0 : ffff00000df2402c [ 11.306272] Call trace: [ 11.306316] __memset+0x4c/0x188 [ 11.306638] uvd_v1_0_ib_test+0x70/0x1c0 [radeon] [ 11.306758] radeon_ib_ring_tests+0x54/0xe0 [radeon] ... Obviously, the __memset call is generated by gcc(8.3.1). It optimizes this for loop into memset. But this may break on some platforms which cannot map device memory correctly. So, just invoke `writel` to handle this. v3 (chk): minor cleanups in code and commit message Signed-off-by: Chen Li <chenli@uniontech.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 16:38:27 +0000