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2025-02-03accel/ivpu: Update last_busy in IRQ handlerJacek Lawrynowicz
Call pm_runtime_mark_last_busy() in top half of IRQ handler to prevent device from being runtime suspended before bottom half is executed on a workqueue. Reviewed-by: Karol Wachowski <karol.wachowski@intel.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250129125636.1047413-3-jacek.lawrynowicz@linux.intel.com
2025-02-03accel/ivpu: Add support for hardware fault injectionJacek Lawrynowicz
Introduces the capability to simulate hardware faults for testing purposes. The new `fail_hw` fault can be injected in `ivpu_hw_reg_poll_fld()`, which is used in various parts of the driver to wait for the hardware to reach a specific state. This allows to test failures during NPU boot and shutdown, IPC message handling and more. Fault injection can be enabled using debugfs or a module parameter. Reviewed-by: Maciej Falkowski <maciej.falkowski@linux.intel.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250129125636.1047413-2-jacek.lawrynowicz@linux.intel.com
2025-01-31accel/qaic: Add AIC200 supportJeffrey Hugo
Add basic support for the new AIC200 product. The PCIe Device ID is 0xa110. With this, we can turn on the lights for AIC200 by leveraging much of the existing driver. Co-developed-by: Youssef Samir <quic_yabdulra@quicinc.com> Signed-off-by: Youssef Samir <quic_yabdulra@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250117170943.2643280-8-quic_jhugo@quicinc.com
2025-01-31accel/qaic: Add config structs for supported cardsJeffrey Hugo
As the number of cards supported by the driver grows, their configurations will differ. The driver needs to become more dynamic to support these configurations. Currently, each card may differ in the exposed BARs, the regions they map to, and the family. Create config structs for each card, and let the driver configure the qaic_device struct based on the configurations passed to the driver. Co-developed-by: Youssef Samir <quic_yabdulra@quicinc.com> Signed-off-by: Youssef Samir <quic_yabdulra@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117170943.2643280-7-quic_jhugo@quicinc.com
2025-01-31accel/qaic: Mask out SR-IOV PCI resourcesYoussef Samir
During the initialization of the qaic device, pci_select_bars() is used to fetch a bitmask of the BARs exposed by the device. On devices that have Virtual Functions capabilities, the bitmask includes SR-IOV BARs. Use a mask to filter out SR-IOV BARs if they exist. Signed-off-by: Youssef Samir <quic_yabdulra@quicinc.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117170943.2643280-6-quic_jhugo@quicinc.com
2025-01-31accel/qaic: Add support for MSI-XYoussef Samir
AIC200 device will support MSI-X while AIC100 devices will keep using MSI. pci_alloc_irq_vectors() will try to allocate MSI-X vectors if it is supported by the target device, otherwise, it will fallback to MSI. Add support for MSI-X vectors allocation for AIC200 devices. Signed-off-by: Youssef Samir <quic_yabdulra@quicinc.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117170943.2643280-5-quic_jhugo@quicinc.com
2025-01-31accel/qaic: Allocate an exact number of MSIsYoussef Samir
Devices use 1 MSI vector for the MHI controller and as many vectors as the DMA bridge channels on the device. During the probing of the device, the driver allocates 32 MSI vectors, which is usually more than what is needed for AIC100 devices, which is wasting resources. Allocate only the needed number of MSI vectors per device. Signed-off-by: Youssef Samir <quic_yabdulra@quicinc.com> Reviewed-by: Troy Hanson <quic_thanson@quicinc.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117170943.2643280-4-quic_jhugo@quicinc.com
2025-01-31bus: mhi: host: Add a policy to enable image transfer via BHIe in PBLMatthew Leung
Currently, MHI host only performs firmware transfer via BHI in PBL and BHIe from SBL. To support BHIe transfer directly from PBL, a policy needs to be added. With this policy, BHIe will be used to transfer firmware in PBL if the MHI controller has BHIe regs, sets seg_len, and does not set fbc_download. The intention is to transfer firmware using BHIe in PBL without further BHIe transfers in SBL. Signed-off-by: Matthew Leung <quic_mattleun@quicinc.com> Reviewed-by: Youssef Samir <quic_yabdulra@quicinc.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250117170943.2643280-3-quic_jhugo@quicinc.com
2025-01-31bus: mhi: host: Refactor BHI/BHIe based firmware loadingMatthew Leung
Refactor the firmware loading code to have distinct helper functions for BHI and BHIe operations. This lays the foundation for separating the firmware loading protocol from the firmware being loaded and the EE it is loaded in. Signed-off-by: Matthew Leung <quic_mattleun@quicinc.com> Reviewed-by: Youssef Samir <quic_yabdulra@quicinc.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250117170943.2643280-2-quic_jhugo@quicinc.com
2025-01-29drm/ast: Fix ast_dp connection statusJocelyn Falempe
ast_dp_is_connected() used to also check for link training success to report the DP connector as connected. Without this check, the physical_status is always connected. So if no monitor is present, it will fail to read the EDID and set the default resolution to 640x480 instead of 1024x768. Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> Fixes: 2281475168d2 ("drm/ast: astdp: Perform link training during atomic_enable") Reported-by: Jerry Hoemann <jerry.hoemann@hpe.com> Tested-by: Jose Lopez <jose.lopez@hpe.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Dave Airlie <airlied@redhat.com> Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v6.12+ Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20250124141142.2434138-1-jfalempe@redhat.com
2025-01-28dt-bindings: display: renesas,du: add top-level constraintsKrzysztof Kozlowski
Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks, clock-names, interrupts, resets, reset-names, renesas,cmms and renesas,vsps. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250128094719.63776-2-krzysztof.kozlowski@linaro.org
2025-01-28dt-bindings: display: renesas,du: narrow interrupts and resets per variantsKrzysztof Kozlowski
Each variable-length property like interrupts or resets must have fixed constraints on number of items for given variant in binding. The clauses in "if:then:" block should define both limits: upper and lower. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250128094719.63776-1-krzysztof.kozlowski@linaro.org
2025-01-28MAINTAINERS: Update drm/rcar-du maintainersTomi Valkeinen
Update drm/rcar-du maintainer entries: * Add myself as drm/rcar-du maintainer. * Update Laurent's email to include +renesas. * Switch Kieran from a maintainer to reviewer. * Change rcar-du to be under drm-misc umbrella. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250128-rcar-du-maintainers-v2-1-4a3860a3e1ef@ideasonboard.com
2025-01-27MAINTAINERS: Remove Noralf Trønnes as driver maintainerNoralf Trønnes
Remove myself as maintainer for gud, mi0283qt, panel-mipi-dbi and repaper. My fatigue illness has finally closed the door on doing development of even moderate complexity so it's sad to let this go. Acked-by: Thomas Zimmremann <tzimmermann@suse.de> Acked-by: Simona Vetter <simona.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20250123-remove-myself-as-maintainer-v1-1-cc3ab7cd98ae@tronnes.org Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2025-01-26drm: bridge: adv7511: remove s32 format from i2s capabilitiesOlivier Moysan
The ADV7511 chip allows 24 bits samples max in I2S mode, excepted for direct AES3 mode (SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE format). However the HDMI codec exposes S32_LE format as supported. Adapt ADV7511 HDMI I2S format list to expose formats actually supported. Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250108170356.413063-4-olivier.moysan@foss.st.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-01-26ASoC: hdmi-codec: allow to refine formats actually supportedOlivier Moysan
Currently the hdmi-codec driver registers all the formats that are allowed on the I2S bus. Add i2s_formats field to codec data, to allow the hdmi codec client to refine the list of the audio I2S formats actually supported. Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250108170356.413063-3-olivier.moysan@foss.st.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-01-26drm: bridge: adv7511: fill stream capabilitiesOlivier Moysan
Set no_i2s_capture and no_spdif_capture flags in hdmi_codec_pdata structure to report that the ADV7511 HDMI bridge does not support i2s or spdif audio capture. Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250108170356.413063-2-olivier.moysan@foss.st.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-01-25drm/nouveau: consume the return of large GSP messageZhi Wang
As the GSP message recv path is able to handle the return of large GSP message, consume the return of large GSP message in the sending path. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-16-zhiw@nvidia.com
2025-01-25drm/nouveau: support handling the return of large GSP messageZhi Wang
The max GSP message element size is 16 pages (including the headers). To send a message larger than 16 pages, nvkm should split it into multiple and send them accordingly. The first element has the expected function number, while the rest are sent with function number as NV_VGPU_MSG_FUNCTION_CONTINUATION_RECORD. GSP consumes the elements from the cmdq and always writes the result back to the msgq. The result is also formed as split elements. However, nvkm is able to split the large GSP message and send them, but totally not aware of handling the return of the large GSP message, which are the split elements in the msgq. Thus, it keeps dumping the unknown RPC messages from msgq, which is actually CONTINUATION_RECORD message, discard them unexpectedly. Thus, the caller will not be able to consume the result from GSP. Introduce the handling of the return of large GSP message on the msgq path. Slightly re-factor the low-level part of msg receiving routines. Merge the split elements back into a large element before handling it to the upper level. Thus, the upper-level of GSP RPC APIs don't need to be heavily changed. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-15-zhiw@nvidia.com
2025-01-25drm/nouveau: factor out r535_gsp_msgq_recv_one_elem()Zhi Wang
Prepare for supporting receive the large GSP RPC message. Factor out r535_gsp_msgq_recv_one_elem(). Fold its params into a data structure of params. Move the allocation of the GSP RPC message to its caller. Refine the variable names in the re-factor. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-14-zhiw@nvidia.com
2025-01-25drm/nouveau: factor out r535_gsp_msgq_peek()Zhi Wang
To receive a GSP message queue element from the GSP status queue, the driver needs to make sure there are available elements in the queue. The previous r535_gsp_msgq_wait() consists of three functions, which is a little too complicated for a single function: - wait for an available element. - peek the message element header in the queue. - recevice the element from the queue. Factor out r535_gsp_msgq_peek() and divide the functions in r535_gsp_msgq_wait() into three functions. No functional change is intended. Cc: Danilo Krummrich <dakr@kernel.org> Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-13-zhiw@nvidia.com
2025-01-25drm/nouveau: rename the variable "cmd" to "msg" in r535_gsp_cmdq_{get, push}()Zhi Wang
Refine the name to align with the terms in the kernel doc. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-12-zhiw@nvidia.com
2025-01-25drm/nouveau: refine the variable names in r535_gsp_msg_recv()Zhi Wang
The variable "msg" in r535_gsp_msg_recv() actually means the GSP RPC. Refine the names to align with the terms in the kernel doc. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-11-zhiw@nvidia.com
2025-01-25drm/nouveau: refine the variable names in r535_gsp_rpc_push()Zhi Wang
The variable names in r535_gsp_rpc_push() are quite confusing and some of them are not representing what they really are. Update the names and explanations in the decoder section of the kernel doc. Refine the names to align with the terms in the kernel doc. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-10-zhiw@nvidia.com
2025-01-25drm/nouveau: remove the magic number in r535_gsp_rpc_push()Zhi Wang
There has been a GSP_MSG_MAX_SIZE which represents the max size of a GSP message element header. Use it instead of a magic number. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-9-zhiw@nvidia.com
2025-01-25drm/nouveau: fix the broken marco GSP_MSG_MAX_SIZEZhi Wang
The macro GSP_MSG_MAX_SIZE refers to another macro that doesn't exist. It represents the max GSP message element size. Fix the broken marco so it can be used to replace some magic numbers in the code. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-8-zhiw@nvidia.com
2025-01-25drm/nouveau: rename "argc" to what it represents in GSP RPC routinesZhi Wang
The name "argc" has different meanings in different functions. To improve the readability, it's better to refine it to a name that reflects what it represents. Rename "argc" to what it represents. Add terms in the decoder section to explain their meaning. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> [ Fix indentation. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-7-zhiw@nvidia.com
2025-01-25drm/nouveau: rename "argv" to what it represents in *rm_{alloc, ctrl}_*()Zhi Wang
The name "argv" has different meanings in different functions. To improve the readability, it's better to refine it to a name that reflects what it represents. Rename "argv" to what it represents. Wrap the long container_of() into to_payload_header() to denote a clear meaning and make checkpatch.pl happy. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-6-zhiw@nvidia.com
2025-01-25drm/nouveau: remove unused param repc in *rm_alloc_push()Zhi Wang
The user of *rm_alloc_push() always pass 0 in repc. Remove unused param repc since no user actually uses it. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-5-zhiw@nvidia.com
2025-01-25drm/nouveau: rename "argv" to what it represents on the GSP message send pathZhi Wang
The name "argv" has different meanings in different functions. To improve the readability, it's better to refine it to a name that reflects what it represents. Rename "repc" to what it represents in the GSP message send path. Wrap the long container_of() into to_gsp_hdr() to make checkpatch.pl happy. No functional change is intended. Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-4-zhiw@nvidia.com
2025-01-25drm/nouveau: rename "repc" to "gsp_rpc_len" on the GSP message recv pathZhi Wang
The name "repc" has different meanings in different contexts. To improve the readability, it's better to refine it to a name that reflects what it actually represents. Rename "repc" to "gsp_rpc_len" in the GSP message recv path. Add an section in the doc to explain the terms. No functional change is intended. Cc: Danilo Krummrich <dakr@kernel.org> Signed-off-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-3-zhiw@nvidia.com
2025-01-25drm/nouveau: add a kernel doc to introduce the GSP RPCZhi Wang
In order to explain the name clean-ups in GSP RPC routines, a kernel doc to explain the memory layout and terms is required. Add a kernel doc to introduce the GSP RPC. Cc: Danilo Krummrich <dakr@kernel.org> Signed-off-by: Zhi Wang <zhiw@nvidia.com> [ Fix bullet list indentation; add SPDX-License-Identifier. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250124182958.2040494-2-zhiw@nvidia.com
2025-01-24drm/dp_mst: Add helper to get port number at specific LCT from RADWayne Lin
Add a helper drm_dp_mst_get_ufp_num_at_lct_from_rad() to extract the up facing port number at specific link count from the RAD. Use the added helper in drm_dp_mst_rad_to_str() & drm_dp_get_mst_branch_device() to unify the implementation. V2: - Adjust the code format (Lyude) V3: - Adjust parameter "rad" of drm_dp_mst_get_ufp_num_at_lct_from_rad() to be constant (Kernel test robot) Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Lyude Paul <lyude@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> [fixed commit message typo] Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250113091100.3314533-3-Wayne.Lin@amd.com
2025-01-24drm/dp_mst: Fix drm RAD printWayne Lin
[Why] The RAD of sideband message printed today is incorrect. For RAD stored within MST branch - If MST branch LCT is 1, it's RAD array is untouched and remained as 0. - If MST branch LCT is larger than 1, use nibble to store the up facing port number in cascaded sequence as illustrated below: u8 RAD[0] = (LCT_2_UFP << 4) | LCT_3_UFP RAD[1] = (LCT_4_UFP << 4) | LCT_5_UFP ... In drm_dp_mst_rad_to_str(), it wrongly to use BIT_MASK(4) to fetch the port number of one nibble. [How] Adjust the code by: - RAD array items are valuable only for LCT >= 1. - Use 0xF as the mask to replace BIT_MASK(4) V2: - Document how RAD is constructed (Imre) V3: - Adjust the comment for rad[] so kdoc formats it properly (Lyude) Fixes: 2f015ec6eab6 ("drm/dp_mst: Add sideband down request tracing + selftests") Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Lyude Paul <lyude@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250113091100.3314533-2-Wayne.Lin@amd.com
2025-01-24drm/panel: samsung-s6e88a0-ams452ef01: transition to mipi_dsi wrapped functionsTejas Vipin
Changes the samsung-s6e88a0-ams452ef01 panel to use multi style functions for improved error handling. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Tejas Vipin <tejasvipin76@gmail.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250122031110.286079-1-tejasvipin76@gmail.com
2025-01-25drm/virtio: Support partial maps of GEM objectsSasha Finkelstein
Those are useful to implement coherent cross-vm mmap. Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com> Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250109-virtgpu-gem-partial-map-v1-1-a914b48776bd@gmail.com Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> [dmitry.osipenko@collabora.com: Corrected vm_size check to account vm_pgoff]
2025-01-24drm: add modifiers for MediaTek tiled formatsEric R. Smith
MediaTek (MTK) uses some unique tiled memory formats for video decoding. Add these to the uapi drm_fourcc.h so that we can use them in Mesa, GStreamer, and other tools/libraries. v2: - Classify the modifier bits into categories and provide room for expansion (Daniel S.) Signed-off-by: Eric R. Smith <eric.smith@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241219174929.126205-1-eric.smith@collabora.com Signed-off-by: Daniel Stone <daniels@collabora.com>
2025-01-24drm/tidss: Fix typosAndrew Kreimer
Fix typos in comments. Reported-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Andrew Kreimer <algonell@gmail.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240912125735.45114-1-algonell@gmail.com
2025-01-24drm/omap: Remove hdmi5_core_handle_irqs()Dr. David Alan Gilbert
hdmi5_core_handle_irqs() is a function that was copied from omapdss by commit f76ee892a99e ("omapfb: copy omapdss & displays for omapfb") but it wasn't used in the original anyway. Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241218020124.278925-1-linux@treblig.org
2025-01-24drm/omap/dss: Use syscon_regmap_lookup_by_phandle_argsKrzysztof Kozlowski
Use syscon_regmap_lookup_by_phandle_args() which is a wrapper over syscon_regmap_lookup_by_phandle() combined with getting the syscon argument. Except simpler code this annotates within one line that given phandle has arguments, so grepping for code would be easier. There is also no real benefit in printing errors on missing syscon argument, because this is done just too late: runtime check on static/build-time data. Dtschema and Devicetree bindings offer the static/build-time check for this already. Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250114145840.505459-2-krzysztof.kozlowski@linaro.org
2025-01-24drm/omap/dss: Use of_property_present() to test existence of DT propertyKrzysztof Kozlowski
of_property_read_bool() should be used only on boolean properties. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250114145840.505459-1-krzysztof.kozlowski@linaro.org
2025-01-23drm/panel-edp: Add STA 116QHD024002Langyan Ye
Add support for the STA 116QHD024002, pleace the EDID here for subsequent reference. 00 ff ff ff ff ff ff 00 4e 81 09 00 00 00 00 00 26 21 01 04 a5 1a 0e 78 02 1e b5 9a 5f 57 94 26 0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 8e 1c 56 a0 50 00 1e 30 28 20 55 00 00 90 10 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 20 20 20 20 20 20 0a 20 20 20 20 20 20 00 00 00 fe 00 31 31 36 51 48 44 30 32 34 30 30 32 0a 00 3b Signed-off-by: Langyan Ye <yelangyan@huaqin.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250123112055.1521471-1-yelangyan@huaqin.corp-partner.google.com
2025-01-23drm/atomic-helper: document drm_atomic_helper_check() restrictionsDmitry Baryshkov
The drm_atomic_helper_check() calls drm_atomic_helper_check_modeset() insternally. Document that corresponding restrictions also apply to the drivers that call the former function (as it's easy to miss the documentation for the latter function). Reviewed-by: Simona Vetter <simona.vetter@ffwll.ch> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241222-drm-dirty-modeset-v1-1-0e76a53eceb9@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-01-23drm/bridge: adv7511: Switch to atomic operationsJesse Van Gavere
Use the atomic version of enable/disable. To support bridges where bus format negotiation is needed such as TIDSS we need to implement atomic_get_input_bus_fmts, prepare the driver for this by switching the existing operations to it's atomic variants. Signed-off-by: Jesse Van Gavere <jesseevg@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250106121054.96739-1-jesseevg@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-01-22drm/ast: Only warn about unsupported TX chips on Gen4 and laterThomas Zimmermann
Only Gen4 and later read the installed TX chip from the SoC. So only warn on those generations about unsupported chips. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-9-tzimmermann@suse.de
2025-01-22drm/ast: Merge TX-chip detection code for Gen4 and laterThomas Zimmermann
Gens 4 to 6 and Gen7 use the same pattern for detecting the installed TX chips. Merge the code into a single branch. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-8-tzimmermann@suse.de
2025-01-22drm/ast: Align Gen1 DVO detection to register manualThomas Zimmermann
Align variable names and register constants for TX-chip detection to the names in the register manual. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-7-tzimmermann@suse.de
2025-01-22drm/ast: Hide Gens 1 to 3 TX detection in branchThomas Zimmermann
Gen7 only supports ASTDP. Gens 4 to 6 support various TX chips, except ASTDP. These boards detect the TX chips by reading the SoC scratch register as VGACRD1. Gens 1 to 3 only support SIL164. These boards read the DVO bit from VGACRA3. Hence move this test behind a branch, so that it does not run on later generations. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-6-tzimmermann@suse.de
2025-01-22drm/ast: Initialize ASTDP in ast_post_gpu()Thomas Zimmermann
Remove the call to ast_dp_launch() from ast_detect_tx_chip() and perform it unconditionally in ast_post_gpu(). Also add error handling: the detection code apparently used ast_dp_launch() to test for a working ASTDP, falling back to VGA on errors. As the VBIOS reports ASTDP, silently ignoring errors is questionable behavior. With the refactoring, failing to initialize the ASTDP will also fail probing the driver. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-5-tzimmermann@suse.de
2025-01-22drm/ast: Refactor ast_post_gpu() by GenThomas Zimmermann
Reorganize ast_post_gpu() so that it first branches by Gen and then by config mode and TX chip. This will later make it possible to split up the function by Gen. The helper ast_init_3rdtx() only handles Gen4 and Gen5, so leave it out from the other Gens. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-4-tzimmermann@suse.de
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-31 23:22:27 +0000