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2022-11-07arm64: dts: qcom: msm8994: Align TLMM pin configuration with DT schemaKrzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Order the "function" and "pins" property to match other DTS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221018155450.39816-2-krzysztof.kozlowski@linaro.org
2022-11-07arm64: dts: qcom: msm8994: Correct SPI10 CS pinKrzysztof Kozlowski
The GPIO55 is part of SPI10 pins, not its chip-select. Probably the intention was to use one of dedicated chip-select GPIOs: 47 or 67. GPIO47 is used for UART2, so choose GPIO67. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221018155450.39816-1-krzysztof.kozlowski@linaro.org
2022-11-07arm64: dts: qcom: sc7280: Add nodes to support WoW on WCN6750Manikanta Pubbisetty
Add DT nodes to support WoW (Wake on Wireless) feature on WCN6750 WiFi hardware on SC7280 SoC. Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221017125346.3691-3-quic_mpubbise@quicinc.com
2022-11-06arm64: dts: qcom: sm6350: drop bogus DP PHY clockJohan Hovold
The QMP pipe clock is used by the USB part of the PHY so drop the corresponding properties from the DP child node. Fixes: 23737b9557fe ("arm64: dts: qcom: sm6350: Add USB1 nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026152511.9661-3-johan+linaro@kernel.org
2022-11-06arm64: dts: qcom: sm8250: drop bogus DP PHY clockJohan Hovold
The QMP pipe clock is used by the USB part of the PHY so drop the corresponding properties from the DP child node. Fixes: 5aa0d1becd5b ("arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026152511.9661-2-johan+linaro@kernel.org
2022-11-06arm64: dts: qcom: sc8280xp-x13s: Add thermal zone supportManivannan Sadhasivam
Add thermal zone support by making use of the thermistor SYS_THERM6. Based on experiments, this thermistor seems to reflect the actual surface temperature of the laptop. For the cooling device, all BIG CPU cores are throttled down to keep the temperature at a sane level. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-13-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channelsManivannan Sadhasivam
Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from external thermistors connected to AMUX pins. The temperature measurements are collected from the PMK8280's VADC channels that expose the measurements from secondary PMICs PM8280_{1/2}. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-12-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channelManivannan Sadhasivam
Add VADC channel of PMR735A for measuring the on-chip die temperature. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-11-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channelsManivannan Sadhasivam
Add VADC channels of PM8280_{1/2} PMICs for measuring the on-chip die temperature and external thermistors connected to the AMUX pins. The measurements are collected by the primary PMIC PMK8280 from the secondary PMICs PM8280_{1/2} and exposed over the PMK8280's VADC channels. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-10-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channelsManivannan Sadhasivam
Add VADC channels for measuring the on-chip die temperature and external crystal osciallator temperature of PMK8280. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-9-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN inputManivannan Sadhasivam
Enable resetting the PMK8280 through RESIN block in SC8280XP X13s. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-8-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280Manivannan Sadhasivam
Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the temperature from secondary PMICs like PM8280. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-7-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 blockManivannan Sadhasivam
Add support for ADC7 block available in PMK8280 for reading the temperature via the AMUX pins. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-6-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN inputManivannan Sadhasivam
The RESIN input can be used to reset the PMK8280 PMIC. Enabling the RESIN block allows the PMK8280 to detect reset input via RESIN_N pin. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-5-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-pmics: Add thermal zones for PM8280_{1/2} PMICsManivannan Sadhasivam
Add thermal zones for the PM8280_{1/2} PMICs by using the temperature alarm blocks as the thermal sensors. Temperature trip points are inherited from PM8350 PMIC. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-4-manivannan.sadhasivam@linaro.org
2022-11-06arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2} PMICsManivannan Sadhasivam
Add support for temperature alarm feature in the PM8280_{1/2} PMICs. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-3-manivannan.sadhasivam@linaro.org
2022-11-06dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channelsManivannan Sadhasivam
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC has the static Slave ID (SID) assigned by default. The primary PMIC PMK8350 is responsible for collecting the temperature/voltage data from the slave PMICs and exposing them via it's registers. For getting the measurements from the slave PMICs, PMK8350 uses the channel ID encoded with the SID of the relevant PMIC. So far, the dt-binding for the slave PMIC PM8350 assumed that there will be only one PM8350 in a system. So it harcoded SID 1 with channel IDs. But this got changed in platforms such as Lenovo X13s where there are a couple of PM8350 PMICs available. So to address multiple PM8350s, change the binding to accept the SID specified by the user and use it for encoding the channel ID. It should be noted that, even though the SID is static it is not globally unique. Only the primary PMIC has the unique SID id 0. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221103095810.64606-2-manivannan.sadhasivam@linaro.org
2022-11-06dt-bindings: qcom: add another exception to the device naming ruleDmitry Baryshkov
The 'qcom,dsi-ctrl-6g-qcm2290' compatibility string was added in the commit ee1f09678f14 ("drm/msm/dsi: Add support for qcm2290 dsi controller") in February 2022, but was not properly documented in the bindings. Adding this compatibility string to display/msm/dsi-controller-main.yaml caused a warning from qcom-soc.yaml. Fix the warning by adding an exception to the mentioned file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221104132316.1028137-1-dmitry.baryshkov@linaro.org
2022-11-06arm64: dts: qcom: msm8916-alcatel-idol347: add LED indicatorVincent Knecht
Add si-en,sn3190 LED controller to enable white LED indicator. This requires adding the additional "enable" gpio that the OEM choose to use, despite it not being mentioned in si-en,sn3190 datasheet nor supported by the driver. Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221104132400.1763218-4-vincent.knecht@mailoo.org
2022-11-06arm64: dts: qcom: msm8916-alcatel-idol347: add GPIO torch LEDVincent Knecht
Add support for torch LED on GPIO 32. Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221104132400.1763218-3-vincent.knecht@mailoo.org
2022-11-06arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 1.0/2.0Dmitry Torokhov
The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: f8b4eb64f200 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards") Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221027074652.1044235-5-dmitry.torokhov@gmail.com
2022-11-06arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 3.0/3.1Dmitry Torokhov
The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: 0a3a56a93fd9 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1") Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221027074652.1044235-4-dmitry.torokhov@gmail.com
2022-11-06arm64: dts: qcom: sm8250-mtp: fix reset line polarityDmitry Torokhov
The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: 36c9d012f193 ("arm64: dts: qcom: use GPIO flags for tlmm") Fixes: 5a263cf629a8 ("arm64: dts: qcom: sm8250-mtp: Add wcd9380 audio codec node") Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221027074652.1044235-3-dmitry.torokhov@gmail.com
2022-11-06arm64: dts: qcom: msm8996: fix sound card reset line polarityDmitry Torokhov
When resetting the block, the reset line is being driven low and then high, which means that the line in DTS should be annotated as "active low". It will become important when wcd9335 driver will be converted to gpiod API that respects declared line polarities. Fixes: f3eb39a55a1f ("arm64: dts: db820c: Add sound card support") Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221027074652.1044235-1-dmitry.torokhov@gmail.com
2022-11-06arm64: dts: qcom: sm8450-qrd: add SDHCI for microSDKrzysztof Kozlowski
Based on downstream DTS, it seems that SM8450 QRD has microSD card slot. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026200357.391635-5-krzysztof.kozlowski@linaro.org
2022-11-06arm64: dts: qcom: sm8450-hdk: add SDHCI for microSDKrzysztof Kozlowski
The HDK8450 has microSD card slot. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026200357.391635-4-krzysztof.kozlowski@linaro.org
2022-11-06arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boardsKrzysztof Kozlowski
SDHCI on SM8450 HDK also has problems with SDR104/SDR50: mmc0: card never left busy state mmc0: error -110 whilst initialising SD card so I think it is safe to assume this issue affects all SM8450 boards. Move the quirk disallowing these modes to the SoC DTSI, to spare people working on other boards the misery of debugging this issue. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026200357.391635-3-krzysztof.kozlowski@linaro.org
2022-11-06arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSIKrzysztof Kozlowski
The SDHCI pin configuration/mux nodes are actually common to all upstreamed boards, so define them in SoC DTSI to reduce code duplication. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026200357.391635-2-krzysztof.kozlowski@linaro.org
2022-11-06arm64: dts: qcom: sm8450: fix UFS PHY registersJohan Hovold
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221024091507.20342-5-johan+linaro@kernel.org
2022-11-06arm64: dts: qcom: sm8350: fix UFS PHY registersJohan Hovold
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221024091507.20342-4-johan+linaro@kernel.org
2022-11-06arm64: dts: qcom: sm8250: fix UFS PHY registersJohan Hovold
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221024091507.20342-3-johan+linaro@kernel.org
2022-11-06arm64: dts: qcom: sm8150: fix UFS PHY registersJohan Hovold
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: 3834a2e92229 ("arm64: dts: qcom: sm8150: Add ufs nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221024091507.20342-2-johan+linaro@kernel.org
2022-11-06arm64: dts: qcom: msm8916: align TLMM pin configuration with DT schemaKrzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221024002356.28261-2-krzysztof.kozlowski@linaro.org
2022-11-06arm64: dts: qcom: msm8996: add support for oneplus3(t)Harry Austen
Add initial support for OnePlus 3 and 3T mobile phones. They are based on the MSM8996 SoC. Co-developed-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Harry Austen <hpausten@protonmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221023204505.115141-5-hpausten@protonmail.com
2022-11-06dt-bindings: arm: qcom: add oneplus3(t) devicesHarry Austen
Add compatible strings for the OnePlus 3 and 3T phones which utilise the Qualcomm MSM8996 SoC. Signed-off-by: Harry Austen <hpausten@protonmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221023204505.115141-4-hpausten@protonmail.com
2022-11-06arm64: dts: qcom: msm8996: add blsp1_i2c6 nodeHarry Austen
Add support for the sixth I2C interface on the MSM8996 SoC. Signed-off-by: Harry Austen <hpausten@protonmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221023204505.115141-3-hpausten@protonmail.com
2022-11-05arm64: dts: qcom: msm8996: standardize blsp indexingHarry Austen
Use one-based indexing throughout the file for BLSP devices to avoid confusion. Most of the node names and labels are consistent already. This patch just fixes a few pinconf node names to match the one-based indexing used in the label names. Signed-off-by: Harry Austen <hpausten@protonmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221023204505.115141-2-hpausten@protonmail.com
2022-11-05arm64: dts: qcom: msm8996: align TLMM pin configuration with DT schemaKrzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221020225309.32116-2-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: msm8996-sony-xperia-tone: drop incorrect wlan pin inputKrzysztof Kozlowski
Pin configuration has no "input-high" property, so drop it from node described as Wifi host wake up pin. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221020225309.32116-1-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: sc7180: align TLMM pin configuration with DT schemaKrzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Merge subnodes named 'pinconf' and 'pinmux' into one entry, add function where missing (required by bindings for GPIOs) and reorganize overriding pins by boards. Split the SPI and UART configuration into separate nodes 1. SPI (MOSI, MISO, SCLK), SPI chip-select, SPI chip-select via GPIO, 2. UART per each pin: TX, RX and optional CTS/RTS. This allows each board to customize them easily without adding any new nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221020225135.31750-4-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: sc7180: revert "arm64: dts: qcom: sc7180: Avoid glitching ↵Krzysztof Kozlowski
SPI CS at bootup on trogdor" This reverts commit e440e30e26dd6b0424002ad0ddcbbcea783efd85 because it is not a reliable way of fixing SPI CS glitch and it depends on specific Linux kernel pin controller driver behavior. This behavior of kernel driver was changed in commit b991f8c3622c ("pinctrl: core: Handling pinmux and pinconf separately") thus effectively the DTS fix stopped being effective. Proper solution for the glitching SPI chip select must be implemented in the drivers, not via ordering of entries in DTS, and is already introduced in commit d21f4b7ffc22 ("pinctrl: qcom: Avoid glitching lines when we first mux to output"). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221020225135.31750-3-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: sc7180-trogdor-homestar: fully configure secondary I2S pinsKrzysztof Kozlowski
The Trogdor Homestar DTSI adds additional GPIO52 pin to secondary I2S pins ("sec_mi2s_active") and configures it to "mi2s_1" function. The Trogdor DTSI (which is included by Homestar) configures drive strength and bias for all "sec_mi2s_active" pins, thus the intention was to apply this configuration also to GPIO52 on Homestar. Reported-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Fixes: be0416a3f917 ("arm64: dts: qcom: Add sc7180-trogdor-homestar") Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221020225135.31750-2-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: sm8450: Add GPI DMA compatible fallbackKrzysztof Kozlowski
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible and that drivers can bind with only one compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221018230352.1238479-6-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: sm8350: Add GPI DMA compatible fallbackKrzysztof Kozlowski
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible and that drivers can bind with only one compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221018230352.1238479-5-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: sc7280: Add GPI DMA compatible fallbackKrzysztof Kozlowski
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible and that drivers can bind with only one compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221018230352.1238479-4-krzysztof.kozlowski@linaro.org
2022-11-05arm64: dts: qcom: msm8998-oneplus-common: enable RRADCJami Kettunen
Enable the Round Robin ADC for the OnePlus 5/5T. Signed-off-by: Jami Kettunen <jami.kettunen@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016180330.1912214-6-caleb.connolly@linaro.org
2022-11-05arm64: dts: qcom: sdm845-xiaomi-beryllium: enable rradcCaleb Connolly
Enable the PMI8998 RRADC. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016180330.1912214-5-caleb.connolly@linaro.org
2022-11-05arm64: dts: qcom: sdm845-db845c: enable rradcCaleb Connolly
Enable the Round Robin ADC for the db845c. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016180330.1912214-4-caleb.connolly@linaro.org
2022-11-05arm64: dts: qcom: sdm845-oneplus: enable rradcCaleb Connolly
Enable the RRADC for the OnePlus 6. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016180330.1912214-3-caleb.connolly@linaro.org
2022-11-05arm64: dts: qcom: pmi8998: add rradc nodeCaleb Connolly
Add a DT node for the Round Robin ADC found in the PMI8998 PMIC. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016180330.1912214-2-caleb.connolly@linaro.org
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 16:38:41 +0000