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2017-10-16ARM: dts: stm32: fix hse clock frequency on STM32H743 Eval boardGabriel Fernandez
Fix HSE frequency to 25Mhz for STM32H743 Eval Board Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16ARM: dts: stm32: add Timers driver for stm32f746 MCUBenjamin Gaignard
Add Timers and it sub-nodes into DT for stm32f746 family. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16ARM: dts: stm32: Add DMAMUX support for STM32H743 SoCPierre-Yves MORDRET
This patch adds DMAMUX support for STM32H743 SoC. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16ARM: dts: stm32: Add lptimer definitions to stm32h743Fabrice Gasnier
Add lptimer definitions, depending on features they provide: - lptimer1 & 2 can act as PWM, trigger and encoder/counter - lptimer3 can act as PWM and trigger - lptimer4 & 5 can act as PWM Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16ARM: dts: stm32: add vrefbuf to stm32h743Fabrice Gasnier
Add STM32H743 VREFBUF (Voltage Reference Buffer) definition. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16ARM: dts: stm32: Add I2C1 support for STM32F746 eval boardPierre-Yves MORDRET
This patch adds I2C1 support for STM32F746 eval board Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-10-16ARM: dts: r7s72100: Add clock for CA9 CPU coreGeert Uytterhoeven
Improve hardware description by adding a clock property to the device node corresponding to the CA9 CPU core. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16dt-bindings: clk: r7s72100: Add missing I and G clocksGeert Uytterhoeven
Add the missing definitions for the I (CPU) and G (Image Processing) clocks, so these clocks can be referred to from device nodes in DT. Note that these clocks are already fully supported otherwise (DT bindings, Linux driver, r7s72100.dtsi), they were just omitted from the header file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: sh73a0: Add clocks for CA9 CPU coresGeert Uytterhoeven
Improve hardware description by adding clocks properties to the device nodes corresponding to the CA9 CPU cores. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7794: Add missing clock for secondary CA7 CPU coreGeert Uytterhoeven
Currently only the primary CPU in the CA7 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU coreGeert Uytterhoeven
Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7792: Add missing clock for secondary CA15 CPU coreGeert Uytterhoeven
Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU coreGeert Uytterhoeven
Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7790: Add clocks for CA7 CPU coresGeert Uytterhoeven
Currently only the CPU cores in the CA15 cluster have clocks properties. Add the missing clocks properties for the CPU cores in the CA7 cluster to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7790: Add missing clocks for secondary CA15 CPU coresGeert Uytterhoeven
Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU cores are driven by the same clock. Add the missing clocks properties to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7779: Add clocks for CA9 CPU coresGeert Uytterhoeven
Improve hardware description by adding clocks properties to the device nodes corresponding to the CA9 CPU cores. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7778: Add clock for CA9 CPU coreGeert Uytterhoeven
Improve hardware description by adding a clock property to the device node corresponding to the CA9 CPU core. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU coreGeert Uytterhoeven
Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a73a4: Add clock for CA15 CPU0 coreGeert Uytterhoeven
Improve hardware description by adding a clocks property to the device node corresponding to the primary CA15 CPU core, which is for now the only one described. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen2 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of the r8a7794 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16ARM: dts: r8a7793: Use R-Car GPIO Gen2 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen2 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of the r8a7793 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16ARM: dts: r8a7792: Use R-Car GPIO Gen2 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen2 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of the r8a7792 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen2 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16ARM: dts: r8a7790: Use R-Car GPIO Gen2 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen2 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of the r8a7790 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16ARM: dts: r8a7743: Use R-Car GPIO Gen2 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen2 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of the r8a7743 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16ARM: dts: r8a7779: Use R-Car GPIO Gen1 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen1 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in DT of r8a7779 SoC. As the driver does not match on "renesas,gpio-r8a7779" there are some run-time considerations for this patch: * When a resulting DTB is used with kernels newer than v4.14 this should not have any run-time effect as renesas,rcar-gen1-gpio is matched by the driver since commit dbd1dad2ab8f ("gpio: rcar: add gen[123] fallback compatibility strings") * However, when used with older kernels GPIO will be disabled as no compat string match will be made by the driver. The regression documented above for the new DTB with old kernel case is acceptable in my opinion. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16ARM: dts: r8a7778: Use R-Car GPIO Gen1 fallback compat stringSimon Horman
Use newly added R-Car GPIO Gen1 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in DT of r8a7778 SoC. As the driver does not match on "renesas,gpio-r8a7778" there are some run-time considerations for this patch: * When a resulting DTB is used with kernels newer than v4.14 this should not have any run-time effect as renesas,rcar-gen1-gpio is matched by the driver since commit dbd1dad2ab8f ("gpio: rcar: add gen[123] fallback compatibility strings") * However, when used with older kernels GPIO will be disabled as no compat string match will be made by the driver. The regression documented above for the new DTB with old kernel case is acceptable in my opinion. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-15arm64: dts: rockchip: enable cec pin for rk3399 fireflyPierre-Hugues Husson
Add a pinctrl setting to configure the cec pin to the correct function. Signed-off-by: Pierre-Hugues Husson <phh@phh.me> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-15arm64: dts: rockchip: add the cec clk for dw-mipi-hdmi on rk3399Pierre-Hugues Husson
Add the HDMI CEC controller main clock coming from the CRU. Signed-off-by: Pierre-Hugues Husson <phh@phh.me> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-15dt-bindings: samsung: Document binding for new Odroid HC1 boardKrzysztof Kozlowski
Document the binding for new Hardkernel Odroid HC1 board. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org>
2017-10-14arm64: dts: rockchip: default serial for Firefly-RK3399Heinrich Schuchardt
The Firefly-RK3399 uses serial2 with 1,500,000 baud by default for communication in U-Boot and in the vendor provided distros. So let us set the same default in the Linux kernel. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-14arm64: dts: rockchip: enable touchpad button for rk3399-gru-kevinEmil Renner Berthing
Adding the linux,gpio-keymap entry also has the side-effect of making the driver register the touchpad as a touchpad rather than another touchscreen. The index for BTN_LEFT was found by trial and error. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-14ARM: dts: rockchip: Enable thermal on rk3288-vyasa boardMichael Trimarchi
Enable thermal on rk3288-vyasa board, TSHUT is high active. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-13ARM: dts: Fix typo for omap4 mcasp rx pathTony Lindgren
As reported by Peter Ujfalusi <peter.ujfalusi@ti.com>, the rx path on macsp is disabled and only tx is usable if the davinci-mcasp driver is updated for it. Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-13ARM: dts: sun5i: reference-design-tablet: Enable AXP209 AC and batteryChen-Yu Tsai
The reference design tablet has the DC jack wired to AXP209's ACIN. As a tablet, it also has an internal LiPo battery, wired to the PMIC's battery charger. Enable both. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13ARM: dts: sun9i: Change node names to remove underscoresMaxime Ripard
Some boards have had node names with underscores. Remove them in favour of hyphens in order to reduce the DTC warnings. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13ARM: dts: sun9i: Change node names to remove underscoresMaxime Ripard
Some node names in the A80 DTSI still have underscores in them. Remove them in favour of hyphens to remove DTC warnings. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13ARM: dts: sun4i: Remove underscores from nodes namesMaxime Ripard
Some GPIO pinctrl nodes cannot be easily removed, because they would also change the pin configuration, for example to add a pull resistor or change the current delivered by the pin. Those nodes still have underscores and unit-addresses in their node names in our DTs, so adjust their name to remove the warnings. Use that occasion to also fix some poorly chosen node-names. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13ARM: dts: sun4i: Provide default muxing for relevant controllersMaxime Ripard
The I2C's, MMC0 and EMAC controllers have only one muxing option in the SoC. In such a case, we can just move the muxing into the DTSI, and remove it from the DTS. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-13ARM: dts: sun4i: Change pinctrl nodes to avoid warningMaxime Ripard
All our pinctrl nodes were using a node name convention with a unit-address to differentiate the different muxing options. However, since those nodes didn't have a reg property, they were generating warnings in DTC. In order to accomodate for this, convert the old nodes to the syntax we've been using for the new SoCs, including removing the letter suffix of the node labels to the bank of those pins to make things more readable. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-12ARM: dts: Hurricane 2: Add basic support for Ubiquiti UniFi Switch 8Florian Fainelli
Add basic board support for the Ubiquiti UniFi Switch 8 port model. This is a small home and office use managed switch based on the BCM53342 switching control SoC. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-12dt-bindings: Add Ubiquiti Networks vendor prefixFlorian Fainelli
Use the stock ticker: UBNT as the vendor prefix for Ubiquiti Networks. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-12ARM: dts: Add Broadcom Hurricane 2 DTS include fileFlorian Fainelli
Describe the Broadcom Hurricane 2 SoC comprised of a Cortex-A9 CPU complex along with standard iProc peripherals: * timers * SPI controller * NAND controller * a single AMAC (Ethernet MAC controller) * dual PCIe controllers The design is largely similar to existing iProc-based SoCs such as Northstar Plus. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-12dt-bindings: Document Broadcom Hurricane 2 clocksFlorian Fainelli
Add a Device Tree binding document for the Broadcom Hurricane 2 SoC which is an iProc based system. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-12dt-bindings: Add documentation for Broadcom Hurricane 2 SoCsFlorian Fainelli
Add binding documentation for the Broadcom Hurricane 2 SoCs used in switching control planes. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-12ARM: dts: gr-peach: Enable ostm0 and ostm1 timersJacopo Mondi
Enable ostm0 and ostm1 timers to be used as clock source and clockevent source. The timers provides greater accuracy than the already enabled mtu2 one. With these enabled: clocksource: ostm: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 57352151442 ns sched_clock: 32 bits at 33MHz, resolution 30ns, wraps every 64440619504ns ostm: used for clocksource ostm: used for clock events Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Suggested-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12ARM: dts: gr-peach: Add ETHER pin groupJacopo Mondi
Add pin configuration subnode for ETHER pin group. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12ARM: dts: r8a7743: Enable DMA for HSUSBBiju Das
This patch adds DMA properties to the HSUSB node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12ARM: dts: r8a7743: Add USB-DMAC device nodesBiju Das
Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12ARM: dts: iwg20d-q7: Enable HS-USBBiju Das
Enable HS-USB device for the iWave G20D-Q7 carrier board based on RZ/G1M. Also disable the host mode support on usb otg port by default to avoid pin conflicts. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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