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AgeCommit message (Expand)Author
2025-04-01riscv: print hartid on bringupYunhui Cui
2025-03-20Merge patch series "riscv: Add runtime constant support"Alexandre Ghiti
2025-03-20riscv: Add runtime constant supportCharlie Jenkins
2025-03-20riscv: Move nop definition to insn-def.hCharlie Jenkins
2025-03-20Merge patch series "riscv: Unaligned access speed probing fixes and skipping"Alexandre Ghiti
2025-03-19Documentation/kernel-parameters: Add riscv unaligned speed parametersAndrew Jones
2025-03-19riscv: Add parameter for skipping access speed testsAndrew Jones
2025-03-19riscv: Fix set up of vector cpu hotplug callbackAndrew Jones
2025-03-19riscv: Fix set up of cpu hotplug callbacksAndrew Jones
2025-03-19riscv: Change check_unaligned_access_speed_all_cpus to voidAndrew Jones
2025-03-19riscv: Fix check_unaligned_access_all_cpusAndrew Jones
2025-03-19riscv: Fix riscv_online_cpu_vecAndrew Jones
2025-03-19riscv: Annotate unaligned access init functionsAndrew Jones
2025-03-19Merge patch series "riscv: add support for Zaamo and Zalrsc extensions"Alexandre Ghiti
2025-03-19KVM: riscv: selftests: Add Zaamo/Zalrsc extensions to get-reg-list testClément Léger
2025-03-19RISC-V: KVM: Allow Zaamo/Zalrsc extensions for Guest/VMClément Léger
2025-03-19riscv: hwprobe: export Zaamo and Zalrsc extensionsClément Léger
2025-03-19riscv: add parsing for Zaamo and Zalrsc extensionsClément Léger
2025-03-19dt-bindings: riscv: add Zaamo and Zalrsc ISA extension descriptionClément Léger
2025-03-19riscv: fgraph: Fix stack layout to match __arch_ftrace_regs argument of ftrac...Pu Lehui
2025-03-18riscv: fgraph: Select HAVE_FUNCTION_GRAPH_TRACER depends on HAVE_DYNAMIC_FTRA...Pu Lehui
2025-03-18riscv: Fix missing __free_pages() in check_vector_unaligned_access()Alexandre Ghiti
2025-03-18riscv: Fix the __riscv_copy_vec_words_unaligned implementationTingbo Liao
2025-03-18riscv: mm: Don't use %pK through printkThomas Weißschuh
2025-03-18riscv: remove redundant CMDLINE_FORCE checkZixian Zeng
2025-03-18riscv: ftrace: Add parentheses in macro definitions of make_call_t0 and make_...Juhan Jin
2025-03-18riscv: migrate to the generic rule for built-in DTBMasahiro Yamada
2025-03-18riscv: tracing: Fix __write_overflow_field in ftrace_partial_regs()Charlie Jenkins
2025-03-18riscv: Remove duplicate CLINT_TIMER selectionsGeert Uytterhoeven
2025-03-18riscv: defconfig: Disable Renesas SoC supportGeert Uytterhoeven
2025-03-18riscv: Fix a comment typo in set_mm_asid()Chin Yik Ming
2025-03-18Merge patch series "Support SSTC while PM operations"Alexandre Ghiti
2025-03-18clocksource/drivers/timer-riscv: Stop stimecmp when cpu hotplugNick Hu
2025-03-18riscv: Add stimecmp save and restoreNick Hu
2025-03-18riscv: Simplify base extension checks and direct boolean returnChin Yik Ming
2025-03-18riscv: Remove unused TASK_TI_FLAGSJinjie Ruan
2025-03-18RISC-V: selftests: Add TEST_ZICBOM into CBO testsYunhui Cui
2025-03-18RISC-V: hwprobe: Expose Zicbom extension and its block sizeYunhui Cui
2025-03-18RISC-V: Enable cbo.clean/flush in usermodeYunhui Cui
2025-03-18Merge patch series "riscv: Add bfloat16 instruction support"Alexandre Ghiti
2025-03-18riscv: hwprobe: export bfloat16 ISA extensionInochi Amaoto
2025-03-18riscv: add ISA extension parsing for bfloat16 ISA extensionInochi Amaoto
2025-03-18dt-bindings: riscv: add bfloat16 ISA extension descriptionInochi Amaoto
2025-03-18riscv: Implement smp_cond_load8/16() with ZawrsGuo Ren
2025-03-18riscv: Call secondary mmu notifier when flushing the tlbAlexandre Ghiti
2025-03-18riscv: hwprobe: export Zicntr and Zihpm extensionsMiquel Sabaté Solà
2025-03-18riscv: remove useless pc check in stacktrace handlingClément Léger
2025-03-18riscv: Support huge pfnmapsAndrew Bresticker
2025-03-18Merge patch series "RISC-V: clarify what some RISCV_ISA* config options do & ...Alexandre Ghiti
2025-03-18RISC-V: separate Zbb optimisations requiring and not requiring toolchain supportConor Dooley