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2022-05-10drm/amdgpu: add lsdma blockLikun Gao
Add Light SDMA (LSDMA) block and related function. LSDMA is a small instance of SDMA mainly for kernel driver use. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu: add lsdma v6_0_0 ip headersHawking Zhang
Add lsdma v6_0_0 register offset and shift masks header files v2: squash in updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu/gfx11: unlock on error in gfx_v11_0_kiq_resume()Dan Carpenter
Add a missing amdgpu_bo_unreserve(ring->mqd_obj) to an error path in gfx_v11_0_kiq_resume(). Fixes: 3d879e81f0f9 ("drm/amdgpu: add init support for GFX11 (v2)") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu/mes: fix format specifier for size_tAlex Deucher
To avoid a warning on 32 bit. Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu: make smu_v13_0_7_check_fw_status() staticAlex Deucher
It's not used outside of the this file. Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu/psp: Return failure when firmware failed to load in SRIOVAlice Wong
In SRIOV, PSP will block incompatible firmware from loading. When this happens, driver should be prevented from continue initialization and start cleanup. Return failure in psp_cmd_submit_buf when firmware load failed in SRIOV. Signed-off-by: Alice Wong <shiwei.wong@amd.com> Reviewed-by: Sashank Saye <sashank.saye@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu: Implement get_vmid_pasid_mapping for gfx11Graham Sider
Implement gmc_v11_0_get_vmid_pasid_mapping_info to fix gmc_v11_0_flush_gpu_tlb_pasid logic. Change from gfx10 to use IH_VMID_*_LUT registers for VMID -> PASID mapping. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdkfd: Update event_interrupt_isr_v11 returnGraham Sider
Add amdgpu_no_queue_eviction_on_vm_fault condition to event_interrupt_isr_v11 return. If no queue eviction on vm fault specified, function should return false for client/source ids specifying vm fault. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Mukul Joshi <mukul.joshi@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu: Disable SDMA WPTR_POLL_ENABLE for sdma_v6_0Graham Sider
WPTR_POLL_ENABLE = 1 was kept to support legacy doorbell programming in SimNow environment. Disable for real hardware. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: enable gfxoff control on smu_v13_0_7Kenneth Feng
enable gfxoff control interface on smu_v13_0_7 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: disable ac/dc on smu_v13_0_7Kenneth Feng
temporarily disable ac/dc on smu_v13_0_7 due to the force clock issue. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: disable the gfxoff feature temporarily for SMU 13.0.0Evan Quan
There is a known "sdma busy" issue with gfxoff enabled. Let's disable the gfxoff feature temporarily until that issue is fixed. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: enable FCLK DPM support for SMU 13.0.0Evan Quan
With PMFW 78.35.0, the FCLK DPM is ready to go on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: correct the way for retrieving current fclk frequencyEvan Quan
Instead of using AverageFclkFrequencyPostDs/AverageFclkFrequencyPreDs, we turn to target clock frequency(CurrClock[PPCLK_FCLK]). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: correct the way for retrieving current uclk frequencyEvan Quan
There is some problem with average frequency reading for now. So, we switch to the target frequency reading. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: correct the check for current link statusEvan Quan
The output from metrics table for current link status changed. We need to update our driver accordingly. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: enable UCLK DPM for SMU 13.0.0Evan Quan
Enable SMU 13.0.0 UCLK DPM. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: enable BACO support for SMU 13.0.0Evan Quan
Enable SMU 13.0.0 BACO support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0Evan Quan
Enable those features supported by latest PMFW 78.34.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu: add sysfs to shows psp vbflash statusLikun Gao
Add new sysfs interface to shows the status of psp vbflash status. V2: rename the sysfs interface, and set more return value. (0: not start; 1: in progress; MBX115 value when vbflash finish) V3: warning fixes Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10drm/amdgpu/psp: Add vbflash sysfs interface supportLikun Gao
Add sysfs interface to copy VBIOS. v2: squash in fix for proper vmalloc API (Alex) Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-07MAINTAINERS: Add Dmitry as MSM DRM driver co-maintainerDmitry Baryshkov
For the past several releases I have been assisting Rob by writing, collecting, testing and integrating patches for non-GPU and non-core parts of MSM DRM driver, while Rob is more interested in improving the GPU-related part. Let's note this in the MAINTAINERS file. While we are at it, per Rob's suggestion let's also promote Abhinav Kumar to M: (as he is actively working on the driver) and switch Sean Paul to R: (since he isn't doing much on msm these days). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Clark <robdclark@gmail.com> Link: https://lore.kernel.org/r/20220429215324.3729441-1-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-05-07drm/msm/dpu: remove NULL-ness check in dpu_hw_intr_destroyDmitry Baryshkov
There is no need to check that kfree() argument is not NULL. Remove extra check and call kfree() unconditionally. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220507114009.1696278-1-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-05-07drm/msm: Limit command submission when no IOMMURob Clark
Running the GPU without an IOMMU is not really a supported (or sane) configuration. Yet it can be useful during SoC bringup (ie. if the iommu driver doesn't work yet). Lets limit it to users who already have /dev/mem access, to avoid the chance that a user accidentially configures kernel without IOMMU support. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220502172908.3569799-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-05-07drm/msm/dsi: pll_7nm: remove unsupported dividers for DSI pixel clockDmitry Baryshkov
Remove dividers that are not recommended for DSI DPHY mode when setting up the clock tree for the DSI pixel clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/484333/ Link: https://lore.kernel.org/r/20220501195620.4135080-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm: Fix shutdownDouglas Anderson
When rebooting on my sc7280-herobrine based device, I got a crash. Upon debugging, I found that I was in msm_drv_shutdown() and my "pdev" was the one associated with mdss_probe(). From source, I found that mdss_probe() has the line: platform_set_drvdata(pdev, mdss); ...where "mdss" is of type "struct msm_mdss *". Also from source, I saw that in msm_drv_shutdown() we have the line: struct msm_drm_private *priv = platform_get_drvdata(pdev); This is a mismatch and is the root of the problem. Further digging made it apparent that msm_drv_shutdown() is only supposed to be used for parts of the msm display framework that also call msm_drv_probe() but mdss_probe() doesn't call msm_drv_probe(). Let's remove the shutdown functon from msm_mdss.c. Digging a little further, code inspection found that two drivers that use msm_drv_probe() weren't calling msm_drv_shutdown(). Let's add it to them. Fixes: 6874f48bb8b0 ("drm/msm: make mdp5/dpu devices master components") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/484975/ Link: https://lore.kernel.org/r/20220504163900.v2.1.Iaebd35e60160fc0f2a50fac3a0bf3b298c0637c8@changeid Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm: return an error pointer in msm_gem_prime_get_sg_table()Dan Carpenter
The msm_gem_prime_get_sg_table() needs to return error pointers on error. This is called from drm_gem_map_dma_buf() and returning a NULL will lead to a crash in that function. Fixes: ac45146733b0 ("drm/msm: fix msm_gem_prime_get_sg_table()") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/485023/ Link: https://lore.kernel.org/r/YnOmtS5tfENywR9m@kili Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/mdp5: Return error code in mdp5_mixer_release when deadlock is detectedJessica Zhang
There is a possibility for mdp5_get_global_state to return -EDEADLK when acquiring the modeset lock, but currently global_state in mdp5_mixer_release doesn't check for if an error is returned. To avoid a NULL dereference error, let's have mdp5_mixer_release check if an error is returned and propagate that error. Reported-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Fixes: 7907a0d77cb4 ("drm/msm/mdp5: Use the new private_obj state") Reviewed-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/485181/ Link: https://lore.kernel.org/r/20220505214051.155-2-quic_jesszhan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/mdp5: Return error code in mdp5_pipe_release when deadlock is detectedJessica Zhang
mdp5_get_global_state runs the risk of hitting a -EDEADLK when acquiring the modeset lock, but currently mdp5_pipe_release doesn't check for if an error is returned. Because of this, there is a possibility of mdp5_pipe_release hitting a NULL dereference error. To avoid this, let's have mdp5_pipe_release check if mdp5_get_global_state returns an error and propogate that error. Changes since v1: - Separated declaration and initialization of *new_state to avoid compiler warning - Fixed some spelling mistakes in commit message Changes since v2: - Return 0 in case where hwpipe is NULL as this is considered normal behavior - Added 2nd patch in series to fix a similar NULL dereference issue in mdp5_mixer_release Reported-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Fixes: 7907a0d77cb4 ("drm/msm/mdp5: Use the new private_obj state") Reviewed-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/485179/ Link: https://lore.kernel.org/r/20220505214051.155-1-quic_jesszhan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/dp: fix event thread stuck in wait_event after kthread_stop()Kuogee Hsieh
Event thread supposed to exit from its while loop after kthread_stop(). However there may has possibility that event thread is pending in the middle of wait_event due to condition checking never become true. To make sure event thread exit its loop after kthread_stop(), this patch OR kthread_should_stop() into wait_event's condition checking so that event thread will exit its loop after kernal_stop(). Changes in v2: -- correct spelling error at commit title Changes in v3: -- remove unnecessary parenthesis -- while(1) to replace while (!kthread_should_stop()) Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 570d3e5d28db ("drm/msm/dp: stop event kernel thread when DP unbind") Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/484576/ Link: https://lore.kernel.org/r/1651595136-24312-1-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/dsi: fix address for second DSI PHY on SDM660Dmitry Baryshkov
Correct a typo in the address of the second DSI PHY in the SDM660 device config. Fixes: 694dd304cc29 ("drm/msm/dsi: Add phy configuration for SDM630/636/660") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/484697/ Link: https://lore.kernel.org/r/20220503204340.935532-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/disp: dpu1: Properly sort qcm2290_dpu_capsKonrad Dybcio
Due to MSM8998 support having been stuck in review for so long, another struct was added nearby, which confused git and resulted in the definitions not being sorted alphabetically. Fix it. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/484296/ Link: https://lore.kernel.org/r/20220430161529.605843-3-konrad.dybcio@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/disp/dpu1: avoid clearing hw interrupts if hw_intr is null during ↵Vinod Polimera
drm uninit If edp modeset init is failed due to panel being not ready and probe defers during drm bind, avoid clearing irqs and dereference hw_intr when hw_intr is null. BUG: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 Call trace: dpu_core_irq_uninstall+0x50/0xb0 dpu_irq_uninstall+0x18/0x24 msm_drm_uninit+0xd8/0x16c msm_drm_bind+0x580/0x5fc try_to_bring_up_master+0x168/0x1c0 __component_add+0xb4/0x178 component_add+0x1c/0x28 dp_display_probe+0x38c/0x400 platform_probe+0xb0/0xd0 really_probe+0xcc/0x2c8 __driver_probe_device+0xbc/0xe8 driver_probe_device+0x48/0xf0 __device_attach_driver+0xa0/0xc8 bus_for_each_drv+0x8c/0xd8 __device_attach+0xc4/0x150 device_initial_probe+0x1c/0x28 Changes in V2: - Update commit message and coreect fixes tag. Fixes: f25f656608e3 ("drm/msm/dpu: merge struct dpu_irq into struct dpu_hw_intr") Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/484430/ Link: https://lore.kernel.org/r/1651509846-4842-1-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/dpu: don't access mode pointer before it is setDmitry Baryshkov
Move the initializer for the mode variable to the declaration point to remove unitialized variable access from the DEBUG_DPU macro. This fixes the following warning: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c:250:37: note: initialize the variable 'mode' to silence this warning Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/484346/ Link: https://lore.kernel.org/r/20220502082420.48409-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-07drm/msm/dpu: add missing break statement for update_pending_flush_wb()Abhinav Kumar
Add missing break statement for dpu_hw_ctl_update_pending_flush_wb(). Otherwise this leads to below build warning. drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c:273:2: warning: unannotated fall-through between switch labels default: ^ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c:273:2: note: insert 'break;' to avoid fall-through default: ^ break; 1 warning generated. Fixes: 6d084806c8c1 ("drm/msm/dpu: add changes to support writeback in hw_ctl") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/484337/ Link: https://lore.kernel.org/r/1651469981-21469-1-git-send-email-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-05-06drm/amdgpu/psp: Add VBIOS flash handlerAndrey Grodzovsky
Add psp vbflash function for psp v13. v2: fix warnings Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amd/psp: Add C2P registers to mp_13_0_2 headerAndrey Grodzovsky
Add additional registers. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdkfd: Return true/false (not 1/0) from bool functionsYang Li
Return boolean values ("true" or "false") instead of 1 or 0 from bool functions. This fixes the following warnings from coccicheck: ./drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c:244:9-10: WARNING: return of 0/1 in function 'event_interrupt_isr_v11' with return type bool Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu/gfx11: remove unneeded semicolonYang Li
Eliminate the following coccicheck warning: ./drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:1222:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu/vcn4: replace ip based software ring decode with common vcn ↵James Zhu
software ring decode Replace ip based software ring decode with common vcn software ring decode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian Koenig <Christian.Koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu/vcn3: replace ip based software ring decode with common vcn ↵James Zhu
software ring decode Replace ip based software ring decode with common vcn software ring decode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian Koenig <Christian.Koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu/vcn: add common vcn sofware ring decodeJames Zhu
Add common vcn sofware ring decode. v2: fixed compiling error Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian Koenig <Christian.Koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu: vi: disable ASPM on Intel Alder Lake based systemsRichard Gong
Active State Power Management (ASPM) feature is enabled since kernel 5.14. There are some AMD Volcanic Islands (VI) GFX cards, such as the WX3200 and RX640, that do not work with ASPM-enabled Intel Alder Lake based systems. Using these GFX cards as video/display output, Intel Alder Lake based systems will freeze after suspend/resume. The issue was originally reported on one system (Dell Precision 3660 with BIOS version 0.14.81), but was later confirmed to affect at least 4 pre-production Alder Lake based systems. Add an extra check to disable ASPM on Intel Alder Lake based systems with the problematic AMD Volcanic Islands GFX cards. Fixes: 0064b0ce85bb ("drm/amd/pm: enable ASPM by default") Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1885 Signed-off-by: Richard Gong <richard.gong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu: nuke dynamic gfx scratch reg allocationChristian König
It's over a decade ago that this was actually used for more than ring and IB tests. Just use the static register directly where needed and nuke the now useless infrastructure. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Lang Yu <Lang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu: simplify nv and soc21 read_register functionsAlex Deucher
Check of the base offset for the IP exists rather than explicitly checking for how many instances of a particular IP there are. This is what soc15.c already does. Expand this to nv.c and soc21.c. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu: flush delete wq after wait fenceYiqing Yao
[why] lru_list not empty warning in sw fini during repeated device bind unbind. There should be a amdgpu_fence_wait_empty() before the flush_delayed_work() call as Christian suggested. [how] Move to do flush_delayed_work for ttm bo delayed delete wq after fence_driver_hw_fini. Tested by: Yiqing Yao <yiqing.yao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Yiqing Yao <yiqing.yao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu/discovery: enable mes support for GC v11.0.1Huang Rui
GC v11.0.1 is using MES v11, so add IP block. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu/discovery: enable gfx v11 for GC 11.0.1Huang Rui
Enable gfx v11 for GC 11.0.1. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdgpu: enable imu firmware for GC 11.0.1Huang Rui
The GC 11.0.1 needs load IMU to power up the GFX before loads GFX firmware. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06drm/amdkfd: add GC 11.0.1 KFD supportHuang Rui
Add initial support for GC 11.0.1 in KFD compute driver. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 21:19:06 +0000