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2020-01-27Merge tag 'edac_for_5.6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras Pull EDAC updates from Borislav Petkov: "A totally boring branch this time around: a garden variety of small fixes all over the place" * tag 'edac_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: EDAC/amd64: Do not warn when removing instances EDAC/sifive: Fix return value check in ecc_register() EDAC/aspeed: Remove unneeded semicolon EDAC: remove set but not used variable 'ecc_loc' EDAC: skx_common: downgrade message importance on missing PCI device EDAC/Kconfig: Fix Kconfig indentation
2020-01-27Merge tag 'hwmon-for-v5.6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging Pull hwmon updates from Guenter Roeck: "core: - Add support for enable attributes to hwmon core - Add intrusion templates pmbus: - Support for Infineon Multi-phase xdpe122 family controllers - Support for Intel IMVP9 and AMD 6.25mV modes - Support for vid mode detection per page bases - Detect if chip is write protected - Support for MAX20730, MAX20734, MAX20743, MAX20796, UCD90320, TPS53688 - Various improvements to ibm-cffps driver k10temp: - Support for additional temperature sensors as well as voltage and current telemetry for Zen CPUs w83627ehf: - Remove support for NCT6775, NCT6776 (they have their own driver) New drivers: - ADM1177 - MAX31730 - Driver for disk and solid state drives with temperature sensors Other: - pwm-fan: stop fan on shutdown" * tag 'hwmon-for-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (35 commits) hwmon: (k10temp) Display up to eight sets of CCD temperatures hwmon: (k10temp) Add debugfs support hwmon: (k10temp) Don't show temperature limits on Ryzen (Zen) CPUs hwmon: (k10temp) Show core and SoC current and voltages on Ryzen CPUs hwmon: (k10temp) Report temperatures per CPU die hmon: (k10temp) Convert to use devm_hwmon_device_register_with_info hwmon: (k10temp) Use bitops hwmon: (pwm-fan) stop fan on shutdown MAINTAINERS: add entry for ADM1177 driver dt-binding: hwmon: Add documentation for ADM1177 hwmon: (adm1177) Add ADM1177 Hot Swap Controller and Digital Power Monitor driver docs: hwmon: Include 'xdpe12284.rst' into docs hwmon: (pmbus) Add support for Infineon Multi-phase xdpe122 family controllers hwmon: (pmbus/tps53679) Extend device list supported by driver hwmon: (pmbus/core) Add support for Intel IMVP9 and AMD 6.25mV modes hwmon: (pmbus/core) Add support for vid mode detection per page bases hwmon: (pmbus/ibm-cffps) Prevent writing on_off_config with bad data hwmon: (w83627ehf) Remove set but not used variable 'fan4min' hwmon: Driver for disk and solid state drives with temperature sensors hwmon: (pmbus/ibm-cffps) Fix the LED behavior when turned off ...
2020-01-27Merge tag 'tpmdd-next-20200122' of git://git.infradead.org/users/jjs/linux-tpmddLinus Torvalds
Pull tpm updates from Jarkko Sakkinen: "This adds a new sysfs file for querying TPM major version, which can be used by the user space the TPM protocol used to communicate with the chip" * tag 'tpmdd-next-20200122' of git://git.infradead.org/users/jjs/linux-tpmdd: tpm: Add tpm_version_major sysfs file tpm: Update mailing list contact information in sysfs-class-tpm
2020-01-27Merge tag 'm68k-for-v5.6-tag1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k Pull m68k updates from Geert Uytterhoeven: - wire up clone3() syscall - defconfig updates * tag 'm68k-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k: Implement copy_thread_tls() m68k: defconfig: Update defconfigs for v5.5-rc3 m68k: Wire up clone3() syscall
2020-01-27Merge tag 'arm64-upstream' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "The changes are a real mixed bag this time around. The only scary looking one from the diffstat is the uapi change to asm-generic/mman-common.h, but this has been acked by Arnd and is actually just adding a pair of comments in an attempt to prevent allocation of some PROT values which tend to get used for arch-specific purposes. We'll be using them for Branch Target Identification (a CFI-like hardening feature), which is currently under review on the mailing list. New architecture features: - Support for Armv8.5 E0PD, which benefits KASLR in the same way as KPTI but without the overhead. This allows KPTI to be disabled on CPUs that are not affected by Meltdown, even is KASLR is enabled. - Initial support for the Armv8.5 RNG instructions, which claim to provide access to a high bandwidth, cryptographically secure hardware random number generator. As well as exposing these to userspace, we also use them as part of the KASLR seed and to seed the crng once all CPUs have come online. - Advertise a bunch of new instructions to userspace, including support for Data Gathering Hint, Matrix Multiply and 16-bit floating point. Kexec: - Cleanups in preparation for relocating with the MMU enabled - Support for loading crash dump kernels with kexec_file_load() Perf and PMU drivers: - Cleanups and non-critical fixes for a couple of system PMU drivers FPU-less (aka broken) CPU support: - Considerable fixes to support CPUs without the FP/SIMD extensions, including their presence in heterogeneous systems. Good luck finding a 64-bit userspace that handles this. Modern assembly function annotations: - Start migrating our use of ENTRY() and ENDPROC() over to the new-fangled SYM_{CODE,FUNC}_{START,END} macros, which are intended to aid debuggers Kbuild: - Cleanup detection of LSE support in the assembler by introducing 'as-instr' - Remove compressed Image files when building clean targets IP checksumming: - Implement optimised IPv4 checksumming routine when hardware offload is not in use. An IPv6 version is in the works, pending testing. Hardware errata: - Work around Cortex-A55 erratum #1530923 Shadow call stack: - Work around some issues with Clang's integrated assembler not liking our perfectly reasonable assembly code - Avoid allocating the X18 register, so that it can be used to hold the shadow call stack pointer in future ACPI: - Fix ID count checking in IORT code. This may regress broken firmware that happened to work with the old implementation, in which case we'll have to revert it and try something else - Fix DAIF corruption on return from GHES handler with pseudo-NMIs Miscellaneous: - Whitelist some CPUs that are unaffected by Spectre-v2 - Reduce frequency of ASID rollover when KPTI is compiled in but inactive - Reserve a couple of arch-specific PROT flags that are already used by Sparc and PowerPC and are planned for later use with BTI on arm64 - Preparatory cleanup of our entry assembly code in preparation for moving more of it into C later on - Refactoring and cleanup" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (73 commits) arm64: acpi: fix DAIF manipulation with pNMI arm64: kconfig: Fix alignment of E0PD help text arm64: Use v8.5-RNG entropy for KASLR seed arm64: Implement archrandom.h for ARMv8.5-RNG arm64: kbuild: remove compressed images on 'make ARCH=arm64 (dist)clean' arm64: entry: Avoid empty alternatives entries arm64: Kconfig: select HAVE_FUTEX_CMPXCHG arm64: csum: Fix pathological zero-length calls arm64: entry: cleanup sp_el0 manipulation arm64: entry: cleanup el0 svc handler naming arm64: entry: mark all entry code as notrace arm64: assembler: remove smp_dmb macro arm64: assembler: remove inherit_daif macro ACPI/IORT: Fix 'Number of IDs' handling in iort_id_map() mm: Reserve asm-generic prot flags 0x10 and 0x20 for arch use arm64: Use macros instead of hard-coded constants for MAIR_EL1 arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list arm64: kernel: avoid x18 in __cpu_soft_restart arm64: kvm: stop treating register x18 as caller save arm64/lib: copy_page: avoid x18 register in assembler code ...
2020-01-27Merge tag 'asoc-v5.6' of ↵Takashi Iwai
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Updates for v5.6 A pretty big release this time around, a lot of new drivers and both Morimoto-san and Takashi were doing subsystem wide updates as well: - Further big refactorings from Morimoto-san simplifying the core interfaces and moving things to the component level. - Transition of drivers to managed buffer allocation and removal of redundant PCM ioctls. - New driver support for Ingenic JZ4770, Mediatek MT6660, Qualcomm WCD934x and WSA881x, and Realtek RT700, RT711, RT715, RT1011, RT1015 and RT1308.
2020-01-27tracing/kprobes: Have uname use __get_str() in print_fmtSteven Rostedt (VMware)
Thomas Richter reported: > Test case 66 'Use vfs_getname probe to get syscall args filenames' > is broken on s390, but works on x86. The test case fails with: > > [root@m35lp76 perf]# perf test -F 66 > 66: Use vfs_getname probe to get syscall args filenames > :Recording open file: > [ perf record: Woken up 1 times to write data ] > [ perf record: Captured and wrote 0.004 MB /tmp/__perf_test.perf.data.TCdYj\ > (20 samples) ] > Looking at perf.data file for vfs_getname records for the file we touched: > FAILED! > [root@m35lp76 perf]# The root cause was the print_fmt of the kprobe event that referenced the "ustring" > Setting up the kprobe event using perf command: > > # ./perf probe "vfs_getname=getname_flags:72 pathname=filename:ustring" > > generates this format file: > [root@m35lp76 perf]# cat /sys/kernel/debug/tracing/events/probe/\ > vfs_getname/format > name: vfs_getname > ID: 1172 > format: > field:unsigned short common_type; offset:0; size:2; signed:0; > field:unsigned char common_flags; offset:2; size:1; signed:0; > field:unsigned char common_preempt_count; offset:3; size:1; signed:0; > field:int common_pid; offset:4; size:4; signed:1; > > field:unsigned long __probe_ip; offset:8; size:8; signed:0; > field:__data_loc char[] pathname; offset:16; size:4; signed:1; > > print fmt: "(%lx) pathname=\"%s\"", REC->__probe_ip, REC->pathname Instead of using "__get_str(pathname)" it referenced it directly. Link: http://lkml.kernel.org/r/20200124100742.4050c15e@gandalf.local.home Cc: stable@vger.kernel.org Fixes: 88903c464321 ("tracing/probe: Add ustring type for user-space string") Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Reported-by: Thomas Richter <tmricht@linux.ibm.com> Tested-by: Thomas Richter <tmricht@linux.ibm.com> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2020-01-27Merge branch 'for-5.6/logitech' into for-linusJiri Kosina
- voltage support for newer Logitech HID++ devices, from Pedro Vanzella. - MX Master support improvements, from Adrian Freund and Mazin Rezk
2020-01-27Merge branch 'for-5.6/hidraw' into for-linusJiri Kosina
- support for uniq ioctl()
2020-01-27thermal: stm32: Fix low threshold interrupt floodPascal Paillet
With the STM32 thermal peripheral, it is not possible to dump the temperature that has caused the interrupt. When the temperature reaches the low threshold, we generally read a temperature that is a little bit higher than the low threshold. This maybe due to sampling precision, and also because the CPU becomes hotter when it quits WFI mode. In that case, the framework does not change the trip points. This leads to a lot of low threshold interrupts. The fix is to set the low threshold value 0.5 degrees Celsius below the actual request. The problem is not so frequent with the high threshold and it would no be a good idea to set the threshold value higher than the request. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200110101605.24984-7-p.paillet@st.com
2020-01-27thermal: stm32: Improve temperature computingPascal Paillet
Change the way of computing to avoid rounds by 1 or 2 degrees. Also simplify the sampling time management that is hard-coded to maximum value during probe. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200110101605.24984-6-p.paillet@st.com
2020-01-27thermal: stm32: Handle multiple trip pointsPascal Paillet
Let the thermal framework handle the trip points instead of custom code inside the driver. This is backward compatible, simplifies the driver and offers the possibility to the user to set any trip point he needs. stm_thermal_set_trips callback that is registered to set_trips ops to handle the low and high thresholds and replaces stm_thermal_set_threshold and stm_thermal_update_threshold functions. modify irq enable to handle the thresholds. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200110101605.24984-5-p.paillet@st.com
2020-01-27thermal: stm32: Disable interrupts at probePascal Paillet
In case of CPU reset, the interrupts could be enabled at boot time. Disable interrupts and clear flags. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200110101605.24984-4-p.paillet@st.com
2020-01-27thermal: stm32: Rework sensor mode managementPascal Paillet
Be sure get_temp returns an error while disabling or enabling the device. Set THERMAL_DEVICE_ENABLED state at the end of power on function. Set THERMAL_DEVICE_DISABLED state at the beginning of power off function. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200110101605.24984-3-p.paillet@st.com
2020-01-27thermal: stm32: Fix icifr register namePascal Paillet
Fix a mistake with the ICIFR register name. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200110101605.24984-2-p.paillet@st.com
2020-01-27thermal: of: Make thermal_zone_of_sensor_register return -ENODEV if a sensor ↵Peter Mamonov
OF node is missing When devm_thermal_zone_of_sensor_register() is called from hwmon_thermal_add_sensor() it is possible that the relevant sensor is missing an OF node. In this case thermal_zone_of_sensor_register() returns -EINVAL which causes hwmon_thermal_add_sensor() to fail as well. This patch changes relevant return code of thermal_zone_of_sensor_register() to -ENODEV, which is tolerated by hwmon_thermal_add_sensor(). Here is a particular case of such behaviour: the Marvell ethernet PHYs driver registers hwmon device for the built-in temperature sensor (see drivers/net/phy/marvell.c). Since the sensor doesn't have associated OF node devm_hwmon_device_register() returns error which ultimately causes failure of the PHY driver's probe function. Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20190827143952.19591-1-pmamonov@gmail.com
2020-01-27Merge branch 'qed-Utilize-FW-8.42.2.0'David S. Miller
Michal Kalderon says: ==================== qed*: Utilize FW 8.42.2.0 This FW contains several fixes and features, main ones listed below. We have taken into consideration past comments on previous FW versions that were uploaded and tried to separate this one to smaller patches to ease review. - RoCE - SRIOV support - Fixes in following flows: - latency optimization flow for inline WQEs - iwarp OOO packed DDPs flow - tx-dif workaround calculations flow - XRC-SRQ exceed cache num - iSCSI - Fixes: - iSCSI TCP out-of-order handling. - iscsi retransmit flow - Fcoe - Fixes: - upload + cleanup flows - Debug - Better handling of extracting data during traffic - ILT Dump -> dumping host memory used by chip - MDUMP -> collect debug data on system crash and extract after reboot Patches prefixed with FW 8.42.2.0 are required to work with binary 8.42.2.0 FW where as the rest are FW related but do not require the binary. Changes from V2 --------------- - Move FW version to the start of the series to maintain minimal compatibility - Fix some kbuild errors: - frame size larger than 1024 (Queue Manager patch - remove redundant field from struct) - sparse warning on endianity (Dmae patch fix - wrong use of __le32 for field used only on host, should be u32) - static should be used for some functions (Debug feature ilt and mdump) Reported-by: kbuild test robot <lkp@intel.com> Changes from V1 --------------- - Remove epoch + kernel version from device debug dump - don't bump driver version ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 debug featuresMichal Kalderon
Add to debug dump more information on the platform it was collected from (pci func, path id). Provide human readable reg fifo erros. Removed static debug arrays from HSI Functions, and move them to the hwfn. Some structures were slightly changed (removing reserved chip id for example) which lead to many long initializations being modified with one parameter less during initialization. This leads to some long diffs that don't really change anything. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: rt init valid initialization changedMichal Kalderon
The QM phase init tool can be invoked multiple times during the driver lifetime. Part of the init comes from the runtime array. The logic for setting the values did not init all values, basically assuming the runtime array was all zeroes. But if it was invoked multiple times, nobody was zeroing it after the first time. In this change we zero the runtime array right after using it. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: Debug feature: ilt and mdumpMichal Kalderon
Part of the FW drop includes new debug capabilities implemented in the qed_debug file. This patch dumps additional information during ethtool -d for better debugging. The data dumped is the ilt (internal logical table) and information gathered by the management firmware incase there was a crash and driver was not able to extract the information (mdump). Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 Add fw overlay featureMichal Kalderon
This feature enables the FW to page out FW code when required Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 HSI changesMichal Kalderon
This patch contains several HSI changes. The changes are part of features like RDMA VF and OVS, the patch also contains a fix to how the init code determines if the dmae is ready to be used. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 iscsi/fcoe changesMichal Kalderon
- Remove struct iscsi_slow_path_hdr and field fw_cid from several structs - Remove struct iscsi_spe_func_dstry - Remove fields pbe_page_size_log and pbl_page_size_log from struct iscsi_conn_offload_param Signed-off-by: Manish Rangankar <manish.rangankar@marvell.com> Signed-off-by: Saurav Kashyap <saurav.kashyap@marvell.com> Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: Add abstraction for different hsi values per chipMichal Kalderon
The number of BTB blocks was modified to be different between the two chip flavors supported (BB/K2) as a result, this lead to a re-write of selecting the default hsi value based on the chip. This patch creates a lookup table for hsi values per chip rather than ask again and again for every value. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 Additional ll2 typeMichal Kalderon
LL2 queues were a limited resource due to FW constraints. This FW introduced a new resource which is a context based ll2 queue (memory on host). The additional ll2 queues are required for RDMA SRIOV. The code refers to the previous ll2 queues as ram-based or legacy, and the new queues as ctx-based. This change decreased the "legacy" ram-based queues therefore the first ll2 queue used for iWARP was converted to the ctx-based ll2 queue. This feature also exposed a bug in the DIRECT_REG_WR64 macro implementation which didn't have an effect in other use cases. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: Use dmae to write to widebus registers in fw_funcsMichal Kalderon
There are several wide-bus registers written to by the fw_funcs that require using the dmae for atomicity. Therefore using the dmae channel functionality was added to the fw_funcs file, since the code is very similar to the previously used code, the structures used were moved to qed_hsi. Due to FW conventions, the names of the flags in the struct changed. Since this required slight modification in the places that set the flags the code was modified to use GET/SET FIELD macros. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 Parser offsets modifiedMichal Kalderon
Convert storm ram line to regpair rather than two distinct u32 to better represent the u64 width of the ram. Convert some defines to be hex instead of negative values these values also changed by FW from previous value. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 Queue Manager changesMichal Kalderon
This patch contains changes in initialization and usage of the QM blocks. Instead of setting a rate limiter per vport the rate limiters are now a global resource and set independentaly. The patch also contains a field name change: vport_wfq which is part of vport_params was renamed to wfq as the vport prefix is redundant. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 Expose new registers and change windowsMichal Kalderon
This patch contains register initialization related changes. - Modifications to the runtime offsets - these are defines used by the driver or firmware functions to set values that are used by the initialization functions to set device register values. - Global window values changes to provide different device register ranges. - Additional device registers addresses were added to the register file, used in later stages. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 Internal ram offsets modificationsMichal Kalderon
IRO stands for internal RAM offsets. Updating the FW binary produces different iro offsets. This file contains the different values, and a new representation of the values. Update the FW version Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27Merge branch 'octeontx2-pf-Add-network-driver-for-physical-function'David S. Miller
Sunil Goutham says: ==================== octeontx2-pf: Add network driver for physical function OcteonTX2 SOC's resource virtualization unit (RVU) supports multiple physical and virtual functions. Each of the PF's functionality is determined by what kind of resources are attached to it. If NPA and NIX blocks are attached to a PF it can function as a highly capable network device. This patch series add a network driver for the PF. Initial set of patches adds mailbox communication with admin function (RVU AF) and configuration of queues. Followed by Rx and tx pkts NAPI handler and then support for HW offloads like RSS, TSO, Rxhash etc. Ethtool support to extract stats, config RSS, queue sizes, queue count is also added. Added documentation to give a high level overview of HW and different drivers which will be upstreamed and how they interact. Changes from v5: * Fixed otx2_atomic64_add() non ARM64 fallback definition. - Suggested by David Miller Changes from v4: * Replaced pci_set_dma_mask and pci_set_consistent_dma_mask fn()s with dma_set_mask_and_coherent(). * Some additonal code cleanup. * Fixed receive buffer segmnetation logic in otx2_alloc_rbuf() * Removed all unused BIG_ENDIAN structure definitions. * Removed unnecessary memory barriers - Sugested by Jakub Kicinski * Fixed mailbox initalization failure handling * Removed unused function parameter in otx2_skb_add_frag() - Suggested by Maciej Fijalkowski Changes from v3: * Fixed receive side scaling reinitialization during interface DOWN and UP to retain user configured settings, if any. * Removed driver version from ethtool. * Fixed otx2_set_rss_hash_opts() to return error incase RSS is not enabled. - Sugested by Jakub Kicinski Changes from v2: * Removed frames, bytes, dropped packet stats from ethtool to avoid duplication of same stats in netlink and ethtool. - Sugested by Jakub Kicinski * Removed number of channels and ringparam upper bound checking in ethtool support. * Fixed RSS hash option setting to reject unsupported config. - Suggested by Michal Kubecek Changes from v1: * Made driver dependent on 64bit, to fix build errors related to non availability of writeq/readq APIs for 32bit platforms. - Reported by kbuild test robot ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27MAINTAINERS: Add entry for Marvell OcteonTX2 Physical Function driverSunil Goutham
Added maintainers entry for Marvell OcteonTX2 SOC's physical function NIC driver. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27Documentation: net: octeontx2: Add RVU HW and drivers overviewSunil Goutham
Added high level overview of OcteonTx2 RVU HW and functionality of various drivers which will be upstreamed. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: ethtool RSS config supportSunil Goutham
Added support to show or configure RSS hash key, indirection table, 2,4 tuple via ethtool. Also added debug msg_level support to dump messages when HW reports errors in packet received or transmitted. Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Add basic ethtool supportChristina Jacob
This patch adds ethtool support for - Driver stats, Tx/Rx perqueue and CGX LMAC stats - Set/show Rx/Tx queue count - Set/show Rx/Tx ring sizes - Set/show IRQ coalescing parameters Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Add ndo_get_stats64Geetha sowjanya
Added ndo_get_stats64 which returns stats maintained by HW. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: TCP segmentation offload supportSunil Goutham
Adds TCP segmentation offload (TSO) support. First version of the silicon didn't support TSO offload, for this driver level TSO support is added. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Receive side scaling supportSunil Goutham
Adds receive side scaling (RSS) support to distribute pkts/flows across multiple queues. Sets up key, indirection table etc. Also added extraction of HW calculated rxhash and adding to same to SKB ie NETIF_F_RXHASH offload support. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Error handling supportGeetha sowjanya
HW reports many errors on the receive and transmit paths. Such as incorrect queue configuration, pkt transmission errors, LMTST instruction errors, transmit queue full etc. These are reported via QINT interrupt. Most of the errors are fatal and needs reinitialization. Also added support to allocate receive buffers in non-atomic context when allocation fails in NAPI context. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Aleksey Makarov <amakarov@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: MTU, MAC and RX mode config supportSunil Goutham
This patch addes support to change interface MTU, MAC address retrieval and config, RX mode ie unicast, multicast and promiscuous. Also added link loopback support Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Register and handle link notificationsLinu Cherian
PF and AF (admin function) shares 64KB of reserved memory region for communication. This region is shared for - Messages sent by PF and responses sent by AF. - Notifications sent by AF and ACKs sent by PF. This patch adds infrastructure to handle notifications sent by AF and adds handlers to process them. One of the main usecase of notifications from AF is physical link changes. So this patch adds registration of PF with AF to receive link status change notifications and also adds the handler for that notification. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Add packet transmission supportSunil Goutham
This patch adds the packet transmission support. For a given skb prepares send queue descriptors (SQEs) and pushes them to HW. Here driver doesn't maintain it's own SQ rings, SQEs are pushed to HW using a silicon specific operations called LMTST. From the instuction HW derives the transmit queue number and queues the SQE to that queue. These LMTST instructions are designed to avoid queue maintenance in SW and lockless behavior ie when multiple cores are trying to add SQEs to same queue then HW will takecare of serialization, no need for SW to hold locks. Also supports scatter/gather. Co-developed-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Receive packet handling supportSunil Goutham
Added receive packet handling (NAPI) support, error stats, RX_ALL capability config option to passon error pkts to stack upon user request. In subsequent patches these error stats will be added to ethttool. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Setup interrupts and NAPI handlerSunil Goutham
Completion queue (CQ) is the one with which HW notifies SW on a packet reception or transmission. Each of the RQ and SQ are mapped to a unique CQ and again both CQs are mapped to same interrupt ie the CINT. So that each core has one interrupt source in whose handler both Rx and Tx notifications are processed. Also - Registered a NAPI handler for the CINT. - Setup coalescing parameters. - IRQ affinity hints etc Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Initialize and config queuesSunil Goutham
This patch does the initialization of all queues ie the receive buffer pools, receive and transmit queues, completion or notification queues etc. Allocates all required resources (eg transmit schedulers, receive buffers etc) and configures them for proper functioning of queues. Also sets up receive queue's RED dropping levels. Co-developed-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Attach NIX and NPA block LFsSunil Goutham
For a PF to function as a NIC, NPA (for Rx buffers, Tx descriptors etc) and NIX (for rcv, send and completion queues) are the minimum resources needed. So request admin function (AF) to attach one each of NIX and NPA block LFs (local functions). Only AF can configure a LF's contexts, so request AF to allocate memory for NPA aura/pool and NIX RQ/SQ/CQ HW contexts. Upon receiving response, save some of the HW constants like number of pointers per stack page, size of send queue buffer (SQBs, where SQEs are queued by HW) e.t.c which are later used to initialize queues. A HW context here is like a state machine maintained for a descriptor queue. eg size, head/tail pointers, irq etc etc. HW maintains this in memory. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Mailbox communication with AFSunil Goutham
In the resource virtualization unit (RVU) each of the PF and AF (admin function) share a 64KB of reserved memory region for communication. This patch initializes PF <=> AF mailbox IRQs, registers handlers for processing these communication messages. Also adds support to process these messages in both directions ie responses to PF initiated DOWN (PF => AF) messages and AF initiated UP messages (AF => PF). Mbox communication APIs and message formats are defined in AF driver (drivers/net/ethernet/marvell/octeontx2/af), mbox.h from AF driver is included here to avoid duplication. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Aleksey Makarov <amakarov@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27octeontx2-pf: Add Marvell OcteonTX2 NIC driverSunil Goutham
This patch adds template for the Marvell's OcteonTX2 network controller's physical function driver. Just the probe, PCI specific initialization and netdev registration. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller
Daniel Borkmann says: ==================== pull-request: bpf-next 2020-01-27 The following pull-request contains BPF updates for your *net-next* tree. We've added 20 non-merge commits during the last 5 day(s) which contain a total of 24 files changed, 433 insertions(+), 104 deletions(-). The main changes are: 1) Make BPF trampolines and dispatcher aware for the stack unwinder, from Jiri Olsa. 2) Improve handling of failed CO-RE relocations in libbpf, from Andrii Nakryiko. 3) Several fixes to BPF sockmap and reuseport selftests, from Lorenz Bauer. 4) Various cleanups in BPF devmap's XDP flush code, from John Fastabend. 5) Fix BPF flow dissector when used with port ranges, from Yoshiki Komachi. 6) Fix bpffs' map_seq_next callback to always inc position index, from Vasily Averin. 7) Allow overriding LLVM tooling for runqslower utility, from Andrey Ignatov. 8) Silence false-positive lockdep splats in devmap hash lookup, from Amol Grover. 9) Fix fentry/fexit selftests to initialize a variable before use, from John Sperbeck. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27Revert "pktgen: Allow configuration of IPv6 source address range"David S. Miller
This reverts commit 7786a1af2a6bceb07860ec720e74714004438834. It causes build failures on 32-bit, for example: net/core/pktgen.o: In function `mod_cur_headers': >> pktgen.c:(.text.mod_cur_headers+0xba0): undefined reference to `__umoddi3' Signed-off-by: David S. Miller <davem@davemloft.net>