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2023-01-11arm64: dts: qcom: sm8250: drop the virtual ipa-virt deviceDmitry Baryshkov
Drop the virtual ipa-virt device. The interconnects it provided are going to be represented as <&rpmhcc RPMH_IPA_CLK> clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109002935.244320-13-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sm8150: drop the virtual ipa-virt deviceDmitry Baryshkov
Drop the virtual ipa-virt device. The interconnects it provided are going to be represented as <&rpmhcc RPMH_IPA_CLK> clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109002935.244320-12-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: pm7250b: Add BAT_ID vadc channelLuca Weiss
Add a node describing the ADC5_BAT_ID_100K_PU channel with the properties taken from downstream kernel. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230106-pm7250b-bat_id-v1-2-82ca8f2db741@fairphone.com
2023-01-11arm64: dts: qcom: msm8916: Add DMA for all I2C controllersStephan Gerhold
i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi the DMA channels are already assigned to the SPI controllers but missing for I2C. Add them there as well. This also fixes confusing errors in dmesg for each I2C controller: i2c_qup 78b6000.i2c: tx channel not available Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107110958.5762-3-stephan@gerhold.net
2023-01-11arm64: dts: qcom: msm8916: Enable blsp_dma by defaultStephan Gerhold
Adding the "dmas" to the I2C controllers prevents probing them if blsp_dma is disabled (infinite probe deferral). Avoid this by enabling blsp_dma by default - it's an integral part of the SoC that is almost always used (even if just for UART). Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107110958.5762-2-stephan@gerhold.net
2023-01-11arm64: dts: qcom: msm8916-gplus-fl8005a: Add flash LEDLin, Meng-Bo
FL8005A uses Qualcomm GPIO flash LEDs which is compatible with SGM3140 Flash LED driver. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133235.139947-1-linmengbo0689@protonmail.com
2023-01-11arm64: dts: qcom: msm8916-gplus-fl8005a: Add touchscreenLin, Meng-Bo
FL8005A uses a Focaltech FT5402 touchscreen that is connected to blsp_i2c5. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133223.139893-1-linmengbo0689@protonmail.com
2023-01-11arm64: dts: qcom: msm8916-gplus-fl8005a: Add initial device treeLin, Meng-Bo
GPLUS FL8005A is a tablet using the MSM8916 SoC released in 2015. Add a device tree for with initial support for: - GPIO keys - GPIO LEDs - pm8916-vibrator - SDHCI (internal and external storage) - USB Device Mode - UART - WCNSS (WiFi/BT) - Regulators Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133210.139839-1-linmengbo0689@protonmail.com
2023-01-11arm64: dts: qcom: msm8996: mark apcs as clock providerDmitry Baryshkov
Now as we added the APCS clock controller support, mark apcs device as clock provider by adding #clock-cells property. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111191634.2509616-1-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sa8540p-pmics: rename pmic labelsJohan Hovold
The SA8540P PMICs are named PMM8540. Rename the devicetree source labels to reflect this. Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Eric Chanudet <echanude@redhat.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111160335.7175-3-johan+linaro@kernel.org
2023-01-11arm64: dts: qcom: sa8540p-pmics: add missing interrupt includeJohan Hovold
Add the missing interrupt-controller include which is needed by the RTC node. Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Eric Chanudet <echanude@redhat.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111160335.7175-2-johan+linaro@kernel.org
2023-01-11arm64: dts: qcom: sc8280xp-x13s: enable eDP displayJohan Hovold
Enable the eDP display on MDSS0 DP3, including backlight control. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111133128.31813-1-johan+linaro@kernel.org
2023-01-11arm64: dts: qcom: sa8295-adp: Enable DP instancesBjorn Andersson
The SA8295P ADP has, among other interfaces, six MiniDP connectors which are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3. Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers, DP PHYs and link them all together. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111035906.2975494-4-quic_bjorande@quicinc.com
2023-01-11arm64: dts: qcom: sc8280xp-crd: Enable EDPBjorn Andersson
The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes and link it together with the backlight control. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111035906.2975494-3-quic_bjorande@quicinc.com
2023-01-11arm64: dts: qcom: sc8280xp: Define some of the display blocksBjorn Andersson
Define the display clock controllers, the MDSS instances, the DP phys and connect these together. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111035906.2975494-2-quic_bjorande@quicinc.com
2023-01-10Revert "dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11"Bjorn Andersson
This reverts commit 92ad27fb925943d62deaaa659931ce85ddec99c8, as this was applied to the wrong branch and causes merge conflicts.
2023-01-10arm64: dts: qcom: msm8996-oneplus-common: drop vdda-supply from DSI PHYDmitry Baryshkov
14nm DSI PHY has the only supply, vcca. Drop the extra vdda-supply. Fixes: 5a134c940cd3 ("arm64: dts: qcom: msm8996: add support for oneplus3(t)") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109042406.312047-1-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: sdm845-tama: Add volume up and camera GPIO keysMarijn Suijten
Tama has four GPIO-wired keys: two for camera focus and shutter / snapshot, and two more for volume up and down. As per the comment these used to not work because the necessary pin bias was missing, which is now set via pinctrl on pm8998_gpios. The missing bias has also been added to the existing volume down button, which receives a node name and label cleanup at the same time to be more consistent with other DTS and the newly added buttons. Its deprecated gpio-key,wakeup property has also been replaced with wakeup-source. Note that volume up is also available through the usual PON RESIN node, but unlike other platforms only triggers when the power button is held down at the same time making it unsuitable to serve as KEY_VOLUMEUP. Fixes: 30a7f99befc6 ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109234133.365644-1-marijn.suijten@somainline.org
2023-01-10arm64: dts: qcom: sdm845: make DP node follow the schemaDmitry Baryshkov
Drop the #clock-cells (probably a leftover from the times before the DP PHY split) Fixes: eaac4e55a6f4 ("arm64: dts: qcom: sdm845: add displayport node") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230110042126.702147-1-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: msm8998: Use RPM XOKonrad Dybcio
Feed GCC and SDHC_2 with the RPM XO instead of the fixed-clock one. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230110143642.986799-1-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1Manivannan Sadhasivam
Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs received from endpoint devices to the CPU using GIC-ITS MSI controller. Add support for it. Currently, BDF (0:0.0) and BDF (1:0.0) are enabled and with the msi-map-mask of 0xff00, all the 32 devices under these two busses can share the same Device ID. The GIC-ITS MSI implementation provides an advantage over internal MSI implementation using Locality-specific Peripheral Interrupts (LPI) that would allow MSIs to be targeted for each CPU core. It should be noted that the MSIs for BDF (1:0.0) only works with Device ID of 0x5980 and 0x5a00. Hence, the IDs are swapped. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # Xperia 1 IV (WCN6855) Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102105821.28243-4-manivannan.sadhasivam@linaro.org
2023-01-10arm64: dts: qcom: add missing space before {Krzysztof Kozlowski
Add missingh whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221230140133.57885-2-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: msm8998: get rid of test clockDmitry Baryshkov
The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221228185237.3111988-17-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: sm8450: correct Soundwire wakeup interrupt nameKrzysztof Kozlowski
The bindings expect second Soundwire interrupt to be "wakeup" (Linux driver takes by index): sm8450-hdk.dtb: soundwire-controller@33b0000: interrupt-names:1: 'wakeup' was expected Fixes: 14341e76dbc7 ("arm64: dts: qcom: sm8450: add Soundwire and LPASS") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221223132121.81130-1-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: pm8941-rtc add alarm registerEric Chanudet
A few descriptions including a qcom,pm8941-rtc describe two reg-names for the "rtc" and "alarm" register banks, but only one offset. For consistency with reg-names, add the "alarm" register offset. No functional change is expected from this. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-5-echanude@redhat.com
2023-01-10arm64: dts: qcom: sa8295p-adp: use sa8540p-pmicsEric Chanudet
Include the dtsi to use a single pmic descriptions. Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-4-echanude@redhat.com
2023-01-10arm64: dts: qcom: sa8450p-pmics: add rtc nodeEric Chanudet
Add the rtc block on the first pmic to enable the rtc for sa8540p-ride. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-3-echanude@redhat.com
2023-01-10arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmicsEric Chanudet
pm8450a.dtsi was introduced for the descriptions of pmics used on sa8540p based boards. Rename the dtsi to make this relationship explicit. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-2-echanude@redhat.com
2023-01-10arm64: dts: qcom: sm8350: Drop standalone smem nodeKonrad Dybcio
SM8350 is one of the last SoCs whose DTSI escaped the smem node conversion. Use the newer memory-node binding instead of a memory *and* smem node. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219162618.873117-1-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sm8450-hdk: add missing PMIC includesDmitry Baryshkov
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks and thermal sensors available to the user of the platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-6-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: sm8450-hdk: add pmic filesVinod Koul
SM8450 HDK features bunch of PMICs, add the PMICs which we have already upstream files Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-5-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: sm8450-qrd: add missing PMIC includesDmitry Baryshkov
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks and thermal sensors available to the user of the platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-4-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: sm8450-qrd: add pmic filesVinod Koul
SM8450 QRD features bunch of PMICs, add the PMICs which we have already upstream files Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-3-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: replace underscores in node namesKrzysztof Kozlowski
Underscores should not be used in node names (dtc with W=2 warns about them), so replace them with hyphens. In few places adjust the name to match other nodes (e.g. xxx-regulator). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214110448.86268-1-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie with NVMeOwen Yang
Add DT for sc7280-herobrine-zombie with NVMe Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214114706.2.I1a0c709f8ec86cc5b38f0fe9f9b26694b1eb69d6@changeid
2023-01-10arm64: dts: qcom: sm8450: Add fallback CCI compatibleKonrad Dybcio
Add a fallback CCI compatible, as required by bindings. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213183305.544644-5-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sm8250: Add fallback CCI compatibleKonrad Dybcio
Add a fallback CCI compatible, as required by bindings. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213183305.544644-4-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sdm845: Add fallback CCI compatibleKonrad Dybcio
Add a fallback CCI compatible, as required by bindings. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213183305.544644-3-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: msm8916: Add fallback CCI compatibleKonrad Dybcio
Add a fallback CCI compatible, as required by bindings. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213183305.544644-2-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sm8450-nagara: Disable empty i2c busKonrad Dybcio
As much as it hurts me, there is no FM radio chips on these devices. It seems to be present on Japanese models, but these are not available globally and differ in a few more ways anyway (such as a super high-tech NFC chip). Since it's the only subdevice of its I2C host bus, disable said bus to save some power. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213132517.203609-3-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sm8350-sagami: Disable empty i2c busKonrad Dybcio
As much as it hurts me, there is no FM radio chips on these devices. It seems to be present on Japanese models, but these are not available globally and differ in a few more ways anyway (such as a super high-tech NFC chip). Since it's the only subdevice of its I2C host bus, disable said bus to save some power. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213132517.203609-2-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sm8250-edo: Remove misleading commentsKonrad Dybcio
As much as it hurts me, there is no FM radio chips on these devices. It seems to be present on Japanese models, but these are not available globally and differ in a few more ways anyway (such as a super high-tech NFC chip). Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213132517.203609-1-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: sc7180: Set performance state for audioSrinivasa Rao Mandadapu
Set a performance state for audio clks so that the minimally correct corner voltage is picked when audio is active. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1670932566-22923-1-git-send-email-quic_srivasam@quicinc.com
2023-01-10arm64: dts: qcom: rename AOSS QMP nodesKrzysztof Kozlowski
The Always On Subsystem (AOSS) QMP is not a power domain controller since commit 135780456218 ("arm64: dts: qcom: sc7180: Use QMP property to control load state") and few others. In fact, it was never a power domain controller but rather control of power state of remote processors. This power state control is now handled differently, thus the AOSS QMP nodes do not have power-domain-cells: sc7280-idp.dtb: power-controller@c300000: '#power-domain-cells' is a required property From schema: Documentation/devicetree/bindings/power/power-domain.yaml AOSS QMP is an interface to the actuall AOSS subsystem responsible for some of power management functions, thus let's call the nodes as "power-management". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213101921.47924-4-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: sc8280xp: correct SPMI bus address cellsKrzysztof Kozlowski
The SPMI bus uses two address cells and zero size cells (second reg entry - SPMI_USID - is not the size): spmi@c440000: #address-cells:0:0: 2 was expected Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213101921.47924-3-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: sc7280: correct SPMI bus address cellsKrzysztof Kozlowski
The SPMI bus uses two address cells and zero size cells (second reg entry - SPMI_USID - is not the size): spmi@c440000: #address-cells:0:0: 2 was expected Fixes: 14abf8dfe364 ("arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213101921.47924-2-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: sc7180: correct SPMI bus address cellsKrzysztof Kozlowski
The SPMI bus uses two address cells and zero size cells (second reg entry - SPMI_USID - is not the size): spmi@c440000: #address-cells:0:0: 2 was expected Fixes: 0f9dc5f09fbd ("arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213101921.47924-1-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: sa8540p-ride: enable pcie2a nodeShazad Hussain
Add the pcie2a, pcie2a_phy, and respective tlmm nodes that are needed to get pcie 2a controller enabled on Qdrive3. This patch enables 4GB 64bit memory space for PCIE_2A to have BAR allocations of 64bit pref mem needed on this Qdrive3 platform with dual SoCs for root port and switch NT-EP. Hence this ranges property is overridden in sa8540p-ride.dts only. Moved tlmm node at the end as it tends to become rahter long. Link: https://lore.kernel.org/lkml/Y49k1k8ayI9%2FrK+R@hovoldconsulting.com/ Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221213095922.11649-1-quic_shazhuss@quicinc.com
2023-01-10arm64: dts: qcom: sdm845: order top-level nodes alphabeticallyKrzysztof Kozlowski
Order top-level nodes like memory, reserved-memory, opp-table-cpu alphabetically for easier code maintenance. No functional change (same dtx_diff, except phandle changes). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221212100232.138519-2-krzysztof.kozlowski@linaro.org
2023-01-10arm64: dts: qcom: sc7180: order top-level nodes alphabeticallyKrzysztof Kozlowski
Order top-level nodes like memory, reserved-memory, opp-table-cpu alphabetically for easier code maintenance. No functional change (same dtx_diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221212100232.138519-1-krzysztof.kozlowski@linaro.org
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-30 20:18:52 +0000