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2022-11-21dt-bindings: PCI: tegra234: Add ECAM supportVidya Sagar
Add support for ECAM aperture that is only supported for Tegra234 devices. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Co-developed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: pwm: tegra: Document Tegra234 PWMSandipan Patra
Add compatible for nvidia,tegra234-pwm with nvidia,tegra194-pwm as a fallback. The PWM controller blocks are identical to the ones found on the Tegra194 SoC. No driver changes are required and compatible string "nvidia,tegra194-pwm" will be used as a fallback. Signed-off-by: Sandipan Patra <spatra@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: Add bindings for Tegra234 NVDECMikko Perttunen
Update NVDEC bindings for Tegra234. This new engine version only has two memory clients, but now requires three clocks, and as a bigger change the engine loads firmware from a secure carveout configured by the bootloader. For the latter, we need to add a phandle to the memory controller to query the location of this carveout, and several other properties containing offsets into the firmware inside the carveout. This carveout is not accessible by the CPU, but is needed by NVDEC, so we need this information to be relayed from the bootloader. As the binding was getting large with many conditional properties, also split the Tegra234 version out into a separate file. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: tegra: Update headers for Tegra234Jon Hunter
Update the device-tree clock, memory, power and reset headers for Tegra234 by adding the definitions for all the various devices. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphoneAngeloGioacchino Del Regno
Add a basic support for the Sony Xperia M5 (codename "Holly") smartphone, powered by a MediaTek Helio X10 SoC. This achieves a console boot. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221027095504.37432-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5AngeloGioacchino Del Regno
Add a compatible for the Sony Xperia M5 smartphone. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221027095504.37432-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllersAngeloGioacchino Del Regno
Add the mmc nodes to support all of the four controllers, used for eMMC, SD/MicroSD and SDIO storage. All of these controller nodes are left disabled by default, as usage is board dependent. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221027095504.37432-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART DMAsAngeloGioacchino Del Regno
This SoC has a DMA controller with tx/rx channels for all of the UART controller IPs: add the apdma node and wire up the DMAs on all controllers. When one of the UART controllers is used as a serial console, the DMA will be automatically ignored. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221027095504.37432-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfgAngeloGioacchino Del Regno
The UART nodes had a dummy clock for early bringup, as it is expected that these are left on by the bootloader: now that the pericfg clock controller is supported, we can replace them with the real clocks. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221027095504.37432-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resetsAngeloGioacchino Del Regno
Add nodes for topckgen, infracfg and pericfg, providing various clocks and resets and needed to support basic IPs of this SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221027095504.37432-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: cherry: Add edptx and dptx supportBo-Chen Chen
In cherry projects, we use edptx as the internal display interface and use dptx as the external display interface. To support this, we need to add more properties. - Add pinctrls for edptx and dptx. - Add ports for edptx and dptx. The port connections for the internal and external display: dp-intf0 -> edptx -> panel dp-intf1 -> dptx The edptx endpoint is kept empty for now, as the panel addition will come in a later commit. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221110063716.25677-5-rex-bc.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: cherry: Add dp-intf portsBo-Chen Chen
Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 ports. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221110063716.25677-4-rex-bc.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt8195: Add edptx and dptx nodesBo-Chen Chen
In MT8195, we use edptx as the internal display interface and use dptx as the external display interface. Therefore, we need to add these nodes to support the internal display and the external display. - Add dp calibration data in the efuse node. - Add edptx and dptx nodes for MT8195. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221110063716.25677-3-rex-bc.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt8195: Add dp-intf nodesBo-Chen Chen
Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 nodes. Dp-intf0 is for edptx and dp-intf1 is for dptx. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221110063716.25677-2-rex-bc.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: mt6797: Fix 26M oscillator unit nameAngeloGioacchino Del Regno
Update its unit name to oscillator-26m and remove the unneeded unit address to fix a unit_address_vs_reg warning. Fixes: 464c510f60c6 ("arm64: dts: mediatek: add mt6797 support") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-9-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: pumpkin-common: Fix devicetree warningsAngeloGioacchino Del Regno
Fix the pinctrl submodes and optee node to remove unneeded unit address, fixing all unit_address_vs_reg warnings. Fixes: 9983822c8cf9 ("arm64: dts: mediatek: add pumpkin board dts") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-8-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt2712-evb: Fix usb vbus regulators unit namesAngeloGioacchino Del Regno
Update the names to regulator-usb-p{0-3}-vbus to fix unit_address_vs_reg warnings for those. Fixes: 1724f4cc5133 ("arm64: dts: Add USB3 related nodes for MT2712") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt2712-evb: Fix vproc fixed regulators unit namesAngeloGioacchino Del Regno
Update the names to regulator-vproc-buck{0,1} to fix unit_addres_vs_reg warnings for those. Fixes: f75dd8bdd344 ("arm64: dts: mediatek: add mt2712 cpufreq related device nodes") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt2712e: Fix unit address for pinctrl nodeAngeloGioacchino Del Regno
The unit address for the pinctrl node is (0x)1000b000 and not (0x)10005000, which is the syscfg_pctl_a address instead. This fixes the following warning: arch/arm64/boot/dts/mediatek/mt2712e.dtsi:264.40-267.4: Warning (unique_unit_address): /syscfg_pctl_a@10005000: duplicate unit-address (also used in node /pinctrl@10005000) Fixes: f0c64340b748 ("arm64: dts: mt2712: add pintcrl device node.") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt2712e: Fix unit_address_vs_reg warning for oscillatorsAngeloGioacchino Del Regno
Rename the fixed-clock oscillators to remove the unit address. This solves unit_address_vs_reg warnings. Fixes: 5d4839709c8e ("arm64: dts: mt2712: Add clock controller device nodes") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt6779: Fix devicetree build warningsAngeloGioacchino Del Regno
Rename fixed-clock oscillators to oscillator-26m and oscillator-32k and remove the unit address to fix the unit_address_vs_reg warning; fix the unit address for interrupt and intpol controllers by removing a leading zero in their unit address. This commit fixes the following warnings: (unit_address_vs_reg): /oscillator@0: node has a unit name, but no reg or ranges property (unit_address_vs_reg): /oscillator@1: node has a unit name, but no reg or ranges property (simple_bus_reg): /soc/interrupt-controller@0c000000: simple-bus unit address format error, expected "c000000" (simple_bus_reg): /soc/intpol-controller@0c53a650: simple-bus unit address format error, expected "c53a650" Fixes: 4c7a6260775d ("arm64: dts: add dts nodes for MT6779") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mt7896a: Fix unit_address_vs_reg warning for oscillatorAngeloGioacchino Del Regno
Rename the oscillator fixed-clock to oscillator-40m and remove the unit address to fix warnings. arch/arm64/boot/dts/mediatek/mt7986a.dtsi:17.23-22.4: Warning (unit_address_vs_reg): /oscillator@0: node has a unit name, but no reg or ranges property Fixes: 1f9986b258c2 ("arm64: dts: mediatek: add clock support for mt7986a") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221013152212.416661-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21arm64: dts: mediatek: mt8195: Fix CPUs capacity-dmips-mhzAngeloGioacchino Del Regno
The capacity-dmips-mhz parameter was miscalculated: this SoC runs the first (Cortex-A55) cluster at a maximum of 2000MHz and the second (Cortex-A78) cluster at a maximum of 3000MHz. In order to calculate the right capacity-dmips-mhz, the following test was performed: 1. CPUFREQ governor was set to 'performance' on both clusters 2. Ran dhrystone with 500000000 iterations for 10 times on each cluster 3. Calculate the mean result for each cluster 4. Calculate DMIPS/MHz: dmips_mhz = dmips_per_second / cpu_mhz 5. Scale results to 1024: result_c0 = (dmips_mhz_c0 - min_dmips_mhz(c0, c1)) / (max_dmips_mhz(c0, c1) - min_dmips_mhz(c0, c1)) * 1024 The mean results for this SoC are: Cluster 0 (LITTLE): 11990400 Dhry/s Cluster 1 (BIG): 59809036 Dhry/s The calculated scaled results are: Cluster 0: 307,934312801831 (rounded to 308) Cluster 1: 1024 Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation board") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221005093404.33102-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21Merge branch 'dt/dtbo-rename' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into soc/dt * 'dt/dtbo-rename' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: kbuild: Cleanup DT Overlay intermediate files as appropriate staging: pi433: overlay: Rename overlay source file from .dts to .dtso of: overlay: rename overlay source files from .dts to .dtso kbuild: Allow DTB overlays to built into .dtbo.S files kbuild: Allow DTB overlays to built from .dtso named source files Link: https://lore.kernel.org/r/20221118211103.GA1334449-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'sunxi-dt-for-6.2-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt - Added H616 USB node - Enabled bluetooth on Pinebook A64 - Added f1c100s PWM, I2C, CIR and LRADC nodes - Added USB HCI0 PHYs property to H3/H5 * tag 'sunxi-dt-for-6.2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sunxi: H3/H5: Add phys property to USB HCI0 ARM: dts: suniv: f1c100s: add LRADC node ARM: dts: suniv: f1c100s: add CIR DT node dt-bindings: media: IR: Add F1C100s IR compatible string ARM: dts: suniv: f1c100s: add I2C DT nodes ARM: dts: suniv: f1c100s: add PWM node dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible arm64: dts: allwinner: a64: enable Bluetooth on Pinebook arm64: dts: allwinner: h616: X96 Mate: Add USB nodes arm64: dts: allwinner: h616: OrangePi Zero 2: Add USB nodes arm64: dts: allwinner: h616: Add USB nodes dt-bindings: usb: Add H616 compatible string ARM: dts: axp22x/axp809: Add GPIO controller nodes ARM: dts: axp803/axp81x: Drop GPIO LDO pinctrl nodes Link: https://lore.kernel.org/r/Y3fuAosinWbrj+Dy@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'at91-dt-6.2-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt AT91 DT for 6.2 #2 It contains: - one typo fix for a SAMA7G5 pin; the pin is not used anywhere in the device trees. * tag 'at91-dt-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama7g5: fix signal name of pin PD8 Link: https://lore.kernel.org/r/20221118131214.301678-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21ARM: dts: uniphier: Add Pro5 board supportKunihiko Hayashi
Initial version of devicetree sources for Pro5 EPCORE and ProEX boards. These boards have UART, I2C, USB, eMMC and PCI endpoint in common. Pro5 EPCORE board is a kind of Pro5 reference board with PCIe endpoint card edge connector. ProEX board shares peripherals with Linux and other systems, and some of these ports are available in Linux. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20221117163219.3673-3-hayashi.kunihiko@socionext.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21dt-bindings: arm: uniphier: Add Pro5 boardsKunihiko Hayashi
Add compatible string for Pro5 EP-Core board and ProEX board support. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221117163219.3673-2-hayashi.kunihiko@socionext.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'samsung-dt64-6.2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.2 Correct pin drive strength macros (names) and values used on Tesla FSD SoC. * tag 'samsung-dt64-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: fsd: fix drive strength values as per FSD HW UM arm64: dts: fsd: fix drive strength macros as per FSD HW UM Link: https://lore.kernel.org/r/20221116093010.18515-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21ARM: dts: exynos: Add new SoC specific compatible string for Exynos3250 SoCAakarsh Jain
Exynos3250 and Exynos5420 are using same compatible string for MFC codec device but they have different clock hierarchy and complexity. Add new compatible string followed by mfc-v7 fallback for Exynos3250 SoC. Suggested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Aakarsh Jain <aakarsh.jain@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> Link: https://lore.kernel.org/r/20221114115024.69591-4-aakarsh.jain@samsung.com Link: https://lore.kernel.org/r/20221116093010.18515-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-20Merge branch 'riscv-thead_c9xx' into riscv-dt-for-nextConor Dooley
The bouffalolabs stuff is going to need the thead,c906 compatible too, so there is no point waiting the D1 stuff to land for it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-20dt-bindings: riscv: Add T-HEAD C906 and C910 compatiblesSamuel Holland
The C906 and C910 are RISC-V CPU cores from T-HEAD Semiconductor. Notably, the C906 core is used in the Allwinner D1 SoC. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-19arm64: dts: freescale: Rename DTB overlay source files from .dts to .dtsoAndrew Davis
DTB Overlays (.dtbo) can now be built from source files with the extension (.dtso). This makes it clear what is the content of the files and differentiates them from base DTB source files. Convert the DTB overlay source files in the arm64/freescale directory. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19Merge remote-tracking branch 'robh/dt/dtbo-rename' into imx/dt64Shawn Guo
2022-11-19arm64: dts: imx8mm-evk: add vcc supply for pca6416Adrian Alonso
pca6146 requires vcc-supply to work on i.MX8MM-EVK board. Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8m[m,q]-evk: change to use off-on-delay-us in regulatorHaibo Chen
Some SD Card controller and power circuitry has increased capacitance, so the usual toggling of regulator to power the card off and on is insufficient. According to SD spec, for sd card power reset operation, the sd card supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. This patch add the off-on-delay-us, make sure the sd power reset behavior is align with the specification. Without this patch, when do quick system suspend/resume test, some sd card can't work at SD3.0 mode after system resume back. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: enable uart1Peng Fan
Enable uart1 for BT usage Configure the clock to source from IMX8MN_SYS_PLL1_80M, because the uart could only support max 1.5M buadrate if using OSC_24M as clock source. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: add i2c gpio recovery settingsPeng Fan
Add I2C gpio recovery iomuxc settings Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: set off-on-delay-us in regulatorPeng Fan
Some SD Card controller and power circuitry has increased capacitance, so the usual toggling of regulator to power the card off and on is insufficient. According to SD spec, for sd card power reset operation, the sd card supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. This patch add the off-on-delay-us, make sure the sd power reset behavior is align with the specification. Without this patch, when do quick system suspend/resume test, some sd card can't work at SD3.0 mode after system resume back. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: update vdd_soc dvs voltagePeng Fan
Per schematic, BUCK1 is for VDD_SOC&DRAM&PU_0V9. The nxp,dvs-run-voltage and nxp,dvs-standby-voltage need set for BUCK1, not BUCK2. BUCK2 is for A53, which is handled by DVFS, so no need dvs property. nxp,dvs-run-voltage is not needed, since bootloader must configure voltage to make system boot well. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp-evk: enable I2C2 nodePeng Fan
Enable I2C node for i.MX8MP-EVK Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp-evk: enable fspi nor on imx8mp evkHan Xu
enable fspi nor on imx8mp evk dts Reviewed-by: Frank Li <frank.li@nxp.com> Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp-evk: enable uart1/3 portsPeng Fan
Enable uart1/3 ports for evk board. Configure the clock to source from IMX8MP_SYS_PLL1_80M, because the uart could only support max 1.5M buadrate if using OSC_24M as clock source. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19ARM64: dts: imx8mp-evk: add pwm supportClark Wang
Enable pwm1/2/4 support. Enable pwm1 on pin GPIO1_IO01 for DSI_BL_PWM pwm2 on pin GPIO1_IO11 for LVDS_BL_PWM pwm4 on pin SAI5_RXFS for J21-32 Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp: add mlmix power domainPeng Fan
Add mlmix power domain Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19ARM: dts: colibri-imx6ull: Enable dual-role switchingPhilippe Schenker
The Colibri standard provides a GPIO called USBC_DET to switch from USB Host to USB Device and back. Make use of this GPIO by adding it with usb-connector framework. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mq: fix dtschema warning for imx7-csiMartin Kepplinger
According to dtschema for the csi bridge, compatible is an enum and only one must be used. Fixing this removes the following warning: compatible: 'oneOf' conditional failed, one must be fixed Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-18kbuild: Cleanup DT Overlay intermediate files as appropriateAndrew Davis
%.dtbo.o and %.dtbo.S files are used to build-in DT Overlay. They should should not be removed by Make or the kernel will be needlessly rebuilt. These should be removed by "clean" and ignored by git like other intermediate files. Reported-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Andrew Davis <afd@ti.com> Fixes: 941214a512d8 ("kbuild: Allow DTB overlays to built into .dtbo.S files") Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20221114205939.27994-1-afd@ti.com Signed-off-by: Rob Herring <robh@kernel.org>
2022-11-18arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc nodeDinh Nguyen
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be adjusted through the register in the system manager. Add the binding "altr,sysmgr-syscon" to the SDMMC node for the driver to access the system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to designate the smpsel and drvsel properties for the CIU clock. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-11-18arm: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc nodeDinh Nguyen
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be adjusted through the register in the system manager. Add the binding "altr,sysmgr-syscon" to the SDMMC node for the driver to access the system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to designate the smpsel and drvsel properties for the CIU clock. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-01 22:10:45 +0000